xen-asm_32.S 6.7 KB

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  1. /*
  2. * Asm versions of Xen pv-ops, suitable for either direct use or
  3. * inlining. The inline versions are the same as the direct-use
  4. * versions, with the pre- and post-amble chopped off.
  5. *
  6. * This code is encoded for size rather than absolute efficiency, with
  7. * a view to being able to inline as much as possible.
  8. *
  9. * We only bother with direct forms (ie, vcpu in pda) of the
  10. * operations here; the indirect forms are better handled in C, since
  11. * they're generally too large to inline anyway.
  12. */
  13. #include <asm/thread_info.h>
  14. #include <asm/processor-flags.h>
  15. #include <asm/segment.h>
  16. #include <xen/interface/xen.h>
  17. #include "xen-asm.h"
  18. /*
  19. * Force an event check by making a hypercall, but preserve regs
  20. * before making the call.
  21. */
  22. check_events:
  23. push %eax
  24. push %ecx
  25. push %edx
  26. call xen_force_evtchn_callback
  27. pop %edx
  28. pop %ecx
  29. pop %eax
  30. ret
  31. /*
  32. * We can't use sysexit directly, because we're not running in ring0.
  33. * But we can easily fake it up using iret. Assuming xen_sysexit is
  34. * jumped to with a standard stack frame, we can just strip it back to
  35. * a standard iret frame and use iret.
  36. */
  37. ENTRY(xen_sysexit)
  38. movl PT_EAX(%esp), %eax /* Shouldn't be necessary? */
  39. orl $X86_EFLAGS_IF, PT_EFLAGS(%esp)
  40. lea PT_EIP(%esp), %esp
  41. jmp xen_iret
  42. ENDPROC(xen_sysexit)
  43. /*
  44. * This is run where a normal iret would be run, with the same stack setup:
  45. * 8: eflags
  46. * 4: cs
  47. * esp-> 0: eip
  48. *
  49. * This attempts to make sure that any pending events are dealt with
  50. * on return to usermode, but there is a small window in which an
  51. * event can happen just before entering usermode. If the nested
  52. * interrupt ends up setting one of the TIF_WORK_MASK pending work
  53. * flags, they will not be tested again before returning to
  54. * usermode. This means that a process can end up with pending work,
  55. * which will be unprocessed until the process enters and leaves the
  56. * kernel again, which could be an unbounded amount of time. This
  57. * means that a pending signal or reschedule event could be
  58. * indefinitely delayed.
  59. *
  60. * The fix is to notice a nested interrupt in the critical window, and
  61. * if one occurs, then fold the nested interrupt into the current
  62. * interrupt stack frame, and re-process it iteratively rather than
  63. * recursively. This means that it will exit via the normal path, and
  64. * all pending work will be dealt with appropriately.
  65. *
  66. * Because the nested interrupt handler needs to deal with the current
  67. * stack state in whatever form its in, we keep things simple by only
  68. * using a single register which is pushed/popped on the stack.
  69. */
  70. ENTRY(xen_iret)
  71. /* test eflags for special cases */
  72. testl $(X86_EFLAGS_VM | XEN_EFLAGS_NMI), 8(%esp)
  73. jnz hyper_iret
  74. push %eax
  75. ESP_OFFSET=4 # bytes pushed onto stack
  76. /*
  77. * Store vcpu_info pointer for easy access. Do it this way to
  78. * avoid having to reload %fs
  79. */
  80. #ifdef CONFIG_SMP
  81. GET_THREAD_INFO(%eax)
  82. movl TI_cpu(%eax), %eax
  83. movl __per_cpu_offset(,%eax,4), %eax
  84. mov xen_vcpu(%eax), %eax
  85. #else
  86. movl xen_vcpu, %eax
  87. #endif
  88. /* check IF state we're restoring */
  89. testb $X86_EFLAGS_IF>>8, 8+1+ESP_OFFSET(%esp)
  90. /*
  91. * Maybe enable events. Once this happens we could get a
  92. * recursive event, so the critical region starts immediately
  93. * afterwards. However, if that happens we don't end up
  94. * resuming the code, so we don't have to be worried about
  95. * being preempted to another CPU.
  96. */
  97. setz XEN_vcpu_info_mask(%eax)
  98. xen_iret_start_crit:
  99. /* check for unmasked and pending */
  100. cmpw $0x0001, XEN_vcpu_info_pending(%eax)
  101. /*
  102. * If there's something pending, mask events again so we can
  103. * jump back into xen_hypervisor_callback. Otherwise do not
  104. * touch XEN_vcpu_info_mask.
  105. */
  106. jne 1f
  107. movb $1, XEN_vcpu_info_mask(%eax)
  108. 1: popl %eax
  109. /*
  110. * From this point on the registers are restored and the stack
  111. * updated, so we don't need to worry about it if we're
  112. * preempted
  113. */
  114. iret_restore_end:
  115. /*
  116. * Jump to hypervisor_callback after fixing up the stack.
  117. * Events are masked, so jumping out of the critical region is
  118. * OK.
  119. */
  120. je xen_hypervisor_callback
  121. 1: iret
  122. xen_iret_end_crit:
  123. .section __ex_table, "a"
  124. .align 4
  125. .long 1b, iret_exc
  126. .previous
  127. hyper_iret:
  128. /* put this out of line since its very rarely used */
  129. jmp hypercall_page + __HYPERVISOR_iret * 32
  130. .globl xen_iret_start_crit, xen_iret_end_crit
  131. /*
  132. * This is called by xen_hypervisor_callback in entry.S when it sees
  133. * that the EIP at the time of interrupt was between
  134. * xen_iret_start_crit and xen_iret_end_crit. We're passed the EIP in
  135. * %eax so we can do a more refined determination of what to do.
  136. *
  137. * The stack format at this point is:
  138. * ----------------
  139. * ss : (ss/esp may be present if we came from usermode)
  140. * esp :
  141. * eflags } outer exception info
  142. * cs }
  143. * eip }
  144. * ---------------- <- edi (copy dest)
  145. * eax : outer eax if it hasn't been restored
  146. * ----------------
  147. * eflags } nested exception info
  148. * cs } (no ss/esp because we're nested
  149. * eip } from the same ring)
  150. * orig_eax }<- esi (copy src)
  151. * - - - - - - - -
  152. * fs }
  153. * es }
  154. * ds } SAVE_ALL state
  155. * eax }
  156. * : :
  157. * ebx }<- esp
  158. * ----------------
  159. *
  160. * In order to deliver the nested exception properly, we need to shift
  161. * everything from the return addr up to the error code so it sits
  162. * just under the outer exception info. This means that when we
  163. * handle the exception, we do it in the context of the outer
  164. * exception rather than starting a new one.
  165. *
  166. * The only caveat is that if the outer eax hasn't been restored yet
  167. * (ie, it's still on stack), we need to insert its value into the
  168. * SAVE_ALL state before going on, since it's usermode state which we
  169. * eventually need to restore.
  170. */
  171. ENTRY(xen_iret_crit_fixup)
  172. /*
  173. * Paranoia: Make sure we're really coming from kernel space.
  174. * One could imagine a case where userspace jumps into the
  175. * critical range address, but just before the CPU delivers a
  176. * GP, it decides to deliver an interrupt instead. Unlikely?
  177. * Definitely. Easy to avoid? Yes. The Intel documents
  178. * explicitly say that the reported EIP for a bad jump is the
  179. * jump instruction itself, not the destination, but some
  180. * virtual environments get this wrong.
  181. */
  182. movl PT_CS(%esp), %ecx
  183. andl $SEGMENT_RPL_MASK, %ecx
  184. cmpl $USER_RPL, %ecx
  185. je 2f
  186. lea PT_ORIG_EAX(%esp), %esi
  187. lea PT_EFLAGS(%esp), %edi
  188. /*
  189. * If eip is before iret_restore_end then stack
  190. * hasn't been restored yet.
  191. */
  192. cmp $iret_restore_end, %eax
  193. jae 1f
  194. movl 0+4(%edi), %eax /* copy EAX (just above top of frame) */
  195. movl %eax, PT_EAX(%esp)
  196. lea ESP_OFFSET(%edi), %edi /* move dest up over saved regs */
  197. /* set up the copy */
  198. 1: std
  199. mov $PT_EIP / 4, %ecx /* saved regs up to orig_eax */
  200. rep movsl
  201. cld
  202. lea 4(%edi), %esp /* point esp to new frame */
  203. 2: jmp xen_do_upcall