mmu.c 57 KB

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  1. /*
  2. * Xen mmu operations
  3. *
  4. * This file contains the various mmu fetch and update operations.
  5. * The most important job they must perform is the mapping between the
  6. * domain's pfn and the overall machine mfns.
  7. *
  8. * Xen allows guests to directly update the pagetable, in a controlled
  9. * fashion. In other words, the guest modifies the same pagetable
  10. * that the CPU actually uses, which eliminates the overhead of having
  11. * a separate shadow pagetable.
  12. *
  13. * In order to allow this, it falls on the guest domain to map its
  14. * notion of a "physical" pfn - which is just a domain-local linear
  15. * address - into a real "machine address" which the CPU's MMU can
  16. * use.
  17. *
  18. * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
  19. * inserted directly into the pagetable. When creating a new
  20. * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
  21. * when reading the content back with __(pgd|pmd|pte)_val, it converts
  22. * the mfn back into a pfn.
  23. *
  24. * The other constraint is that all pages which make up a pagetable
  25. * must be mapped read-only in the guest. This prevents uncontrolled
  26. * guest updates to the pagetable. Xen strictly enforces this, and
  27. * will disallow any pagetable update which will end up mapping a
  28. * pagetable page RW, and will disallow using any writable page as a
  29. * pagetable.
  30. *
  31. * Naively, when loading %cr3 with the base of a new pagetable, Xen
  32. * would need to validate the whole pagetable before going on.
  33. * Naturally, this is quite slow. The solution is to "pin" a
  34. * pagetable, which enforces all the constraints on the pagetable even
  35. * when it is not actively in use. This menas that Xen can be assured
  36. * that it is still valid when you do load it into %cr3, and doesn't
  37. * need to revalidate it.
  38. *
  39. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  40. */
  41. #include <linux/sched.h>
  42. #include <linux/highmem.h>
  43. #include <linux/debugfs.h>
  44. #include <linux/bug.h>
  45. #include <linux/vmalloc.h>
  46. #include <linux/module.h>
  47. #include <linux/gfp.h>
  48. #include <linux/memblock.h>
  49. #include <linux/seq_file.h>
  50. #include <asm/pgtable.h>
  51. #include <asm/tlbflush.h>
  52. #include <asm/fixmap.h>
  53. #include <asm/mmu_context.h>
  54. #include <asm/setup.h>
  55. #include <asm/paravirt.h>
  56. #include <asm/e820.h>
  57. #include <asm/linkage.h>
  58. #include <asm/page.h>
  59. #include <asm/init.h>
  60. #include <asm/pat.h>
  61. #include <asm/smp.h>
  62. #include <asm/xen/hypercall.h>
  63. #include <asm/xen/hypervisor.h>
  64. #include <xen/xen.h>
  65. #include <xen/page.h>
  66. #include <xen/interface/xen.h>
  67. #include <xen/interface/hvm/hvm_op.h>
  68. #include <xen/interface/version.h>
  69. #include <xen/interface/memory.h>
  70. #include <xen/hvc-console.h>
  71. #include "multicalls.h"
  72. #include "mmu.h"
  73. #include "debugfs.h"
  74. /*
  75. * Protects atomic reservation decrease/increase against concurrent increases.
  76. * Also protects non-atomic updates of current_pages and balloon lists.
  77. */
  78. DEFINE_SPINLOCK(xen_reservation_lock);
  79. /*
  80. * Identity map, in addition to plain kernel map. This needs to be
  81. * large enough to allocate page table pages to allocate the rest.
  82. * Each page can map 2MB.
  83. */
  84. #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
  85. static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
  86. #ifdef CONFIG_X86_64
  87. /* l3 pud for userspace vsyscall mapping */
  88. static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
  89. #endif /* CONFIG_X86_64 */
  90. /*
  91. * Note about cr3 (pagetable base) values:
  92. *
  93. * xen_cr3 contains the current logical cr3 value; it contains the
  94. * last set cr3. This may not be the current effective cr3, because
  95. * its update may be being lazily deferred. However, a vcpu looking
  96. * at its own cr3 can use this value knowing that it everything will
  97. * be self-consistent.
  98. *
  99. * xen_current_cr3 contains the actual vcpu cr3; it is set once the
  100. * hypercall to set the vcpu cr3 is complete (so it may be a little
  101. * out of date, but it will never be set early). If one vcpu is
  102. * looking at another vcpu's cr3 value, it should use this variable.
  103. */
  104. DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
  105. DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
  106. /*
  107. * Just beyond the highest usermode address. STACK_TOP_MAX has a
  108. * redzone above it, so round it up to a PGD boundary.
  109. */
  110. #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
  111. unsigned long arbitrary_virt_to_mfn(void *vaddr)
  112. {
  113. xmaddr_t maddr = arbitrary_virt_to_machine(vaddr);
  114. return PFN_DOWN(maddr.maddr);
  115. }
  116. xmaddr_t arbitrary_virt_to_machine(void *vaddr)
  117. {
  118. unsigned long address = (unsigned long)vaddr;
  119. unsigned int level;
  120. pte_t *pte;
  121. unsigned offset;
  122. /*
  123. * if the PFN is in the linear mapped vaddr range, we can just use
  124. * the (quick) virt_to_machine() p2m lookup
  125. */
  126. if (virt_addr_valid(vaddr))
  127. return virt_to_machine(vaddr);
  128. /* otherwise we have to do a (slower) full page-table walk */
  129. pte = lookup_address(address, &level);
  130. BUG_ON(pte == NULL);
  131. offset = address & ~PAGE_MASK;
  132. return XMADDR(((phys_addr_t)pte_mfn(*pte) << PAGE_SHIFT) + offset);
  133. }
  134. EXPORT_SYMBOL_GPL(arbitrary_virt_to_machine);
  135. void make_lowmem_page_readonly(void *vaddr)
  136. {
  137. pte_t *pte, ptev;
  138. unsigned long address = (unsigned long)vaddr;
  139. unsigned int level;
  140. pte = lookup_address(address, &level);
  141. if (pte == NULL)
  142. return; /* vaddr missing */
  143. ptev = pte_wrprotect(*pte);
  144. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  145. BUG();
  146. }
  147. void make_lowmem_page_readwrite(void *vaddr)
  148. {
  149. pte_t *pte, ptev;
  150. unsigned long address = (unsigned long)vaddr;
  151. unsigned int level;
  152. pte = lookup_address(address, &level);
  153. if (pte == NULL)
  154. return; /* vaddr missing */
  155. ptev = pte_mkwrite(*pte);
  156. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  157. BUG();
  158. }
  159. static bool xen_page_pinned(void *ptr)
  160. {
  161. struct page *page = virt_to_page(ptr);
  162. return PagePinned(page);
  163. }
  164. void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
  165. {
  166. struct multicall_space mcs;
  167. struct mmu_update *u;
  168. mcs = xen_mc_entry(sizeof(*u));
  169. u = mcs.args;
  170. /* ptep might be kmapped when using 32-bit HIGHPTE */
  171. u->ptr = virt_to_machine(ptep).maddr;
  172. u->val = pte_val_ma(pteval);
  173. MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
  174. xen_mc_issue(PARAVIRT_LAZY_MMU);
  175. }
  176. EXPORT_SYMBOL_GPL(xen_set_domain_pte);
  177. static void xen_extend_mmu_update(const struct mmu_update *update)
  178. {
  179. struct multicall_space mcs;
  180. struct mmu_update *u;
  181. mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
  182. if (mcs.mc != NULL) {
  183. mcs.mc->args[1]++;
  184. } else {
  185. mcs = __xen_mc_entry(sizeof(*u));
  186. MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  187. }
  188. u = mcs.args;
  189. *u = *update;
  190. }
  191. static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
  192. {
  193. struct mmu_update u;
  194. preempt_disable();
  195. xen_mc_batch();
  196. /* ptr may be ioremapped for 64-bit pagetable setup */
  197. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  198. u.val = pmd_val_ma(val);
  199. xen_extend_mmu_update(&u);
  200. xen_mc_issue(PARAVIRT_LAZY_MMU);
  201. preempt_enable();
  202. }
  203. static void xen_set_pmd(pmd_t *ptr, pmd_t val)
  204. {
  205. /* If page is not pinned, we can just update the entry
  206. directly */
  207. if (!xen_page_pinned(ptr)) {
  208. *ptr = val;
  209. return;
  210. }
  211. xen_set_pmd_hyper(ptr, val);
  212. }
  213. /*
  214. * Associate a virtual page frame with a given physical page frame
  215. * and protection flags for that frame.
  216. */
  217. void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
  218. {
  219. set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
  220. }
  221. static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
  222. {
  223. struct mmu_update u;
  224. if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
  225. return false;
  226. xen_mc_batch();
  227. u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
  228. u.val = pte_val_ma(pteval);
  229. xen_extend_mmu_update(&u);
  230. xen_mc_issue(PARAVIRT_LAZY_MMU);
  231. return true;
  232. }
  233. static void xen_set_pte(pte_t *ptep, pte_t pteval)
  234. {
  235. if (!xen_batched_set_pte(ptep, pteval))
  236. native_set_pte(ptep, pteval);
  237. }
  238. static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
  239. pte_t *ptep, pte_t pteval)
  240. {
  241. xen_set_pte(ptep, pteval);
  242. }
  243. pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
  244. unsigned long addr, pte_t *ptep)
  245. {
  246. /* Just return the pte as-is. We preserve the bits on commit */
  247. return *ptep;
  248. }
  249. void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
  250. pte_t *ptep, pte_t pte)
  251. {
  252. struct mmu_update u;
  253. xen_mc_batch();
  254. u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
  255. u.val = pte_val_ma(pte);
  256. xen_extend_mmu_update(&u);
  257. xen_mc_issue(PARAVIRT_LAZY_MMU);
  258. }
  259. /* Assume pteval_t is equivalent to all the other *val_t types. */
  260. static pteval_t pte_mfn_to_pfn(pteval_t val)
  261. {
  262. if (val & _PAGE_PRESENT) {
  263. unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  264. pteval_t flags = val & PTE_FLAGS_MASK;
  265. val = ((pteval_t)mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
  266. }
  267. return val;
  268. }
  269. static pteval_t pte_pfn_to_mfn(pteval_t val)
  270. {
  271. if (val & _PAGE_PRESENT) {
  272. unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  273. pteval_t flags = val & PTE_FLAGS_MASK;
  274. unsigned long mfn;
  275. if (!xen_feature(XENFEAT_auto_translated_physmap))
  276. mfn = get_phys_to_machine(pfn);
  277. else
  278. mfn = pfn;
  279. /*
  280. * If there's no mfn for the pfn, then just create an
  281. * empty non-present pte. Unfortunately this loses
  282. * information about the original pfn, so
  283. * pte_mfn_to_pfn is asymmetric.
  284. */
  285. if (unlikely(mfn == INVALID_P2M_ENTRY)) {
  286. mfn = 0;
  287. flags = 0;
  288. } else {
  289. /*
  290. * Paramount to do this test _after_ the
  291. * INVALID_P2M_ENTRY as INVALID_P2M_ENTRY &
  292. * IDENTITY_FRAME_BIT resolves to true.
  293. */
  294. mfn &= ~FOREIGN_FRAME_BIT;
  295. if (mfn & IDENTITY_FRAME_BIT) {
  296. mfn &= ~IDENTITY_FRAME_BIT;
  297. flags |= _PAGE_IOMAP;
  298. }
  299. }
  300. val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
  301. }
  302. return val;
  303. }
  304. static pteval_t iomap_pte(pteval_t val)
  305. {
  306. if (val & _PAGE_PRESENT) {
  307. unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  308. pteval_t flags = val & PTE_FLAGS_MASK;
  309. /* We assume the pte frame number is a MFN, so
  310. just use it as-is. */
  311. val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
  312. }
  313. return val;
  314. }
  315. static pteval_t xen_pte_val(pte_t pte)
  316. {
  317. pteval_t pteval = pte.pte;
  318. /* If this is a WC pte, convert back from Xen WC to Linux WC */
  319. if ((pteval & (_PAGE_PAT | _PAGE_PCD | _PAGE_PWT)) == _PAGE_PAT) {
  320. WARN_ON(!pat_enabled);
  321. pteval = (pteval & ~_PAGE_PAT) | _PAGE_PWT;
  322. }
  323. if (xen_initial_domain() && (pteval & _PAGE_IOMAP))
  324. return pteval;
  325. return pte_mfn_to_pfn(pteval);
  326. }
  327. PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
  328. static pgdval_t xen_pgd_val(pgd_t pgd)
  329. {
  330. return pte_mfn_to_pfn(pgd.pgd);
  331. }
  332. PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
  333. /*
  334. * Xen's PAT setup is part of its ABI, though I assume entries 6 & 7
  335. * are reserved for now, to correspond to the Intel-reserved PAT
  336. * types.
  337. *
  338. * We expect Linux's PAT set as follows:
  339. *
  340. * Idx PTE flags Linux Xen Default
  341. * 0 WB WB WB
  342. * 1 PWT WC WT WT
  343. * 2 PCD UC- UC- UC-
  344. * 3 PCD PWT UC UC UC
  345. * 4 PAT WB WC WB
  346. * 5 PAT PWT WC WP WT
  347. * 6 PAT PCD UC- UC UC-
  348. * 7 PAT PCD PWT UC UC UC
  349. */
  350. void xen_set_pat(u64 pat)
  351. {
  352. /* We expect Linux to use a PAT setting of
  353. * UC UC- WC WB (ignoring the PAT flag) */
  354. WARN_ON(pat != 0x0007010600070106ull);
  355. }
  356. static pte_t xen_make_pte(pteval_t pte)
  357. {
  358. phys_addr_t addr = (pte & PTE_PFN_MASK);
  359. /* If Linux is trying to set a WC pte, then map to the Xen WC.
  360. * If _PAGE_PAT is set, then it probably means it is really
  361. * _PAGE_PSE, so avoid fiddling with the PAT mapping and hope
  362. * things work out OK...
  363. *
  364. * (We should never see kernel mappings with _PAGE_PSE set,
  365. * but we could see hugetlbfs mappings, I think.).
  366. */
  367. if (pat_enabled && !WARN_ON(pte & _PAGE_PAT)) {
  368. if ((pte & (_PAGE_PCD | _PAGE_PWT)) == _PAGE_PWT)
  369. pte = (pte & ~(_PAGE_PCD | _PAGE_PWT)) | _PAGE_PAT;
  370. }
  371. /*
  372. * Unprivileged domains are allowed to do IOMAPpings for
  373. * PCI passthrough, but not map ISA space. The ISA
  374. * mappings are just dummy local mappings to keep other
  375. * parts of the kernel happy.
  376. */
  377. if (unlikely(pte & _PAGE_IOMAP) &&
  378. (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
  379. pte = iomap_pte(pte);
  380. } else {
  381. pte &= ~_PAGE_IOMAP;
  382. pte = pte_pfn_to_mfn(pte);
  383. }
  384. return native_make_pte(pte);
  385. }
  386. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
  387. #ifdef CONFIG_XEN_DEBUG
  388. pte_t xen_make_pte_debug(pteval_t pte)
  389. {
  390. phys_addr_t addr = (pte & PTE_PFN_MASK);
  391. phys_addr_t other_addr;
  392. bool io_page = false;
  393. pte_t _pte;
  394. if (pte & _PAGE_IOMAP)
  395. io_page = true;
  396. _pte = xen_make_pte(pte);
  397. if (!addr)
  398. return _pte;
  399. if (io_page &&
  400. (xen_initial_domain() || addr >= ISA_END_ADDRESS)) {
  401. other_addr = pfn_to_mfn(addr >> PAGE_SHIFT) << PAGE_SHIFT;
  402. WARN_ONCE(addr != other_addr,
  403. "0x%lx is using VM_IO, but it is 0x%lx!\n",
  404. (unsigned long)addr, (unsigned long)other_addr);
  405. } else {
  406. pteval_t iomap_set = (_pte.pte & PTE_FLAGS_MASK) & _PAGE_IOMAP;
  407. other_addr = (_pte.pte & PTE_PFN_MASK);
  408. WARN_ONCE((addr == other_addr) && (!io_page) && (!iomap_set),
  409. "0x%lx is missing VM_IO (and wasn't fixed)!\n",
  410. (unsigned long)addr);
  411. }
  412. return _pte;
  413. }
  414. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_debug);
  415. #endif
  416. static pgd_t xen_make_pgd(pgdval_t pgd)
  417. {
  418. pgd = pte_pfn_to_mfn(pgd);
  419. return native_make_pgd(pgd);
  420. }
  421. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
  422. static pmdval_t xen_pmd_val(pmd_t pmd)
  423. {
  424. return pte_mfn_to_pfn(pmd.pmd);
  425. }
  426. PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
  427. static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
  428. {
  429. struct mmu_update u;
  430. preempt_disable();
  431. xen_mc_batch();
  432. /* ptr may be ioremapped for 64-bit pagetable setup */
  433. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  434. u.val = pud_val_ma(val);
  435. xen_extend_mmu_update(&u);
  436. xen_mc_issue(PARAVIRT_LAZY_MMU);
  437. preempt_enable();
  438. }
  439. static void xen_set_pud(pud_t *ptr, pud_t val)
  440. {
  441. /* If page is not pinned, we can just update the entry
  442. directly */
  443. if (!xen_page_pinned(ptr)) {
  444. *ptr = val;
  445. return;
  446. }
  447. xen_set_pud_hyper(ptr, val);
  448. }
  449. #ifdef CONFIG_X86_PAE
  450. static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
  451. {
  452. set_64bit((u64 *)ptep, native_pte_val(pte));
  453. }
  454. static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
  455. {
  456. if (!xen_batched_set_pte(ptep, native_make_pte(0)))
  457. native_pte_clear(mm, addr, ptep);
  458. }
  459. static void xen_pmd_clear(pmd_t *pmdp)
  460. {
  461. set_pmd(pmdp, __pmd(0));
  462. }
  463. #endif /* CONFIG_X86_PAE */
  464. static pmd_t xen_make_pmd(pmdval_t pmd)
  465. {
  466. pmd = pte_pfn_to_mfn(pmd);
  467. return native_make_pmd(pmd);
  468. }
  469. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
  470. #if PAGETABLE_LEVELS == 4
  471. static pudval_t xen_pud_val(pud_t pud)
  472. {
  473. return pte_mfn_to_pfn(pud.pud);
  474. }
  475. PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
  476. static pud_t xen_make_pud(pudval_t pud)
  477. {
  478. pud = pte_pfn_to_mfn(pud);
  479. return native_make_pud(pud);
  480. }
  481. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
  482. static pgd_t *xen_get_user_pgd(pgd_t *pgd)
  483. {
  484. pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
  485. unsigned offset = pgd - pgd_page;
  486. pgd_t *user_ptr = NULL;
  487. if (offset < pgd_index(USER_LIMIT)) {
  488. struct page *page = virt_to_page(pgd_page);
  489. user_ptr = (pgd_t *)page->private;
  490. if (user_ptr)
  491. user_ptr += offset;
  492. }
  493. return user_ptr;
  494. }
  495. static void __xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
  496. {
  497. struct mmu_update u;
  498. u.ptr = virt_to_machine(ptr).maddr;
  499. u.val = pgd_val_ma(val);
  500. xen_extend_mmu_update(&u);
  501. }
  502. /*
  503. * Raw hypercall-based set_pgd, intended for in early boot before
  504. * there's a page structure. This implies:
  505. * 1. The only existing pagetable is the kernel's
  506. * 2. It is always pinned
  507. * 3. It has no user pagetable attached to it
  508. */
  509. static void __init xen_set_pgd_hyper(pgd_t *ptr, pgd_t val)
  510. {
  511. preempt_disable();
  512. xen_mc_batch();
  513. __xen_set_pgd_hyper(ptr, val);
  514. xen_mc_issue(PARAVIRT_LAZY_MMU);
  515. preempt_enable();
  516. }
  517. static void xen_set_pgd(pgd_t *ptr, pgd_t val)
  518. {
  519. pgd_t *user_ptr = xen_get_user_pgd(ptr);
  520. /* If page is not pinned, we can just update the entry
  521. directly */
  522. if (!xen_page_pinned(ptr)) {
  523. *ptr = val;
  524. if (user_ptr) {
  525. WARN_ON(xen_page_pinned(user_ptr));
  526. *user_ptr = val;
  527. }
  528. return;
  529. }
  530. /* If it's pinned, then we can at least batch the kernel and
  531. user updates together. */
  532. xen_mc_batch();
  533. __xen_set_pgd_hyper(ptr, val);
  534. if (user_ptr)
  535. __xen_set_pgd_hyper(user_ptr, val);
  536. xen_mc_issue(PARAVIRT_LAZY_MMU);
  537. }
  538. #endif /* PAGETABLE_LEVELS == 4 */
  539. /*
  540. * (Yet another) pagetable walker. This one is intended for pinning a
  541. * pagetable. This means that it walks a pagetable and calls the
  542. * callback function on each page it finds making up the page table,
  543. * at every level. It walks the entire pagetable, but it only bothers
  544. * pinning pte pages which are below limit. In the normal case this
  545. * will be STACK_TOP_MAX, but at boot we need to pin up to
  546. * FIXADDR_TOP.
  547. *
  548. * For 32-bit the important bit is that we don't pin beyond there,
  549. * because then we start getting into Xen's ptes.
  550. *
  551. * For 64-bit, we must skip the Xen hole in the middle of the address
  552. * space, just after the big x86-64 virtual hole.
  553. */
  554. static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
  555. int (*func)(struct mm_struct *mm, struct page *,
  556. enum pt_level),
  557. unsigned long limit)
  558. {
  559. int flush = 0;
  560. unsigned hole_low, hole_high;
  561. unsigned pgdidx_limit, pudidx_limit, pmdidx_limit;
  562. unsigned pgdidx, pudidx, pmdidx;
  563. /* The limit is the last byte to be touched */
  564. limit--;
  565. BUG_ON(limit >= FIXADDR_TOP);
  566. if (xen_feature(XENFEAT_auto_translated_physmap))
  567. return 0;
  568. /*
  569. * 64-bit has a great big hole in the middle of the address
  570. * space, which contains the Xen mappings. On 32-bit these
  571. * will end up making a zero-sized hole and so is a no-op.
  572. */
  573. hole_low = pgd_index(USER_LIMIT);
  574. hole_high = pgd_index(PAGE_OFFSET);
  575. pgdidx_limit = pgd_index(limit);
  576. #if PTRS_PER_PUD > 1
  577. pudidx_limit = pud_index(limit);
  578. #else
  579. pudidx_limit = 0;
  580. #endif
  581. #if PTRS_PER_PMD > 1
  582. pmdidx_limit = pmd_index(limit);
  583. #else
  584. pmdidx_limit = 0;
  585. #endif
  586. for (pgdidx = 0; pgdidx <= pgdidx_limit; pgdidx++) {
  587. pud_t *pud;
  588. if (pgdidx >= hole_low && pgdidx < hole_high)
  589. continue;
  590. if (!pgd_val(pgd[pgdidx]))
  591. continue;
  592. pud = pud_offset(&pgd[pgdidx], 0);
  593. if (PTRS_PER_PUD > 1) /* not folded */
  594. flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
  595. for (pudidx = 0; pudidx < PTRS_PER_PUD; pudidx++) {
  596. pmd_t *pmd;
  597. if (pgdidx == pgdidx_limit &&
  598. pudidx > pudidx_limit)
  599. goto out;
  600. if (pud_none(pud[pudidx]))
  601. continue;
  602. pmd = pmd_offset(&pud[pudidx], 0);
  603. if (PTRS_PER_PMD > 1) /* not folded */
  604. flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
  605. for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++) {
  606. struct page *pte;
  607. if (pgdidx == pgdidx_limit &&
  608. pudidx == pudidx_limit &&
  609. pmdidx > pmdidx_limit)
  610. goto out;
  611. if (pmd_none(pmd[pmdidx]))
  612. continue;
  613. pte = pmd_page(pmd[pmdidx]);
  614. flush |= (*func)(mm, pte, PT_PTE);
  615. }
  616. }
  617. }
  618. out:
  619. /* Do the top level last, so that the callbacks can use it as
  620. a cue to do final things like tlb flushes. */
  621. flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
  622. return flush;
  623. }
  624. static int xen_pgd_walk(struct mm_struct *mm,
  625. int (*func)(struct mm_struct *mm, struct page *,
  626. enum pt_level),
  627. unsigned long limit)
  628. {
  629. return __xen_pgd_walk(mm, mm->pgd, func, limit);
  630. }
  631. /* If we're using split pte locks, then take the page's lock and
  632. return a pointer to it. Otherwise return NULL. */
  633. static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
  634. {
  635. spinlock_t *ptl = NULL;
  636. #if USE_SPLIT_PTLOCKS
  637. ptl = __pte_lockptr(page);
  638. spin_lock_nest_lock(ptl, &mm->page_table_lock);
  639. #endif
  640. return ptl;
  641. }
  642. static void xen_pte_unlock(void *v)
  643. {
  644. spinlock_t *ptl = v;
  645. spin_unlock(ptl);
  646. }
  647. static void xen_do_pin(unsigned level, unsigned long pfn)
  648. {
  649. struct mmuext_op *op;
  650. struct multicall_space mcs;
  651. mcs = __xen_mc_entry(sizeof(*op));
  652. op = mcs.args;
  653. op->cmd = level;
  654. op->arg1.mfn = pfn_to_mfn(pfn);
  655. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  656. }
  657. static int xen_pin_page(struct mm_struct *mm, struct page *page,
  658. enum pt_level level)
  659. {
  660. unsigned pgfl = TestSetPagePinned(page);
  661. int flush;
  662. if (pgfl)
  663. flush = 0; /* already pinned */
  664. else if (PageHighMem(page))
  665. /* kmaps need flushing if we found an unpinned
  666. highpage */
  667. flush = 1;
  668. else {
  669. void *pt = lowmem_page_address(page);
  670. unsigned long pfn = page_to_pfn(page);
  671. struct multicall_space mcs = __xen_mc_entry(0);
  672. spinlock_t *ptl;
  673. flush = 0;
  674. /*
  675. * We need to hold the pagetable lock between the time
  676. * we make the pagetable RO and when we actually pin
  677. * it. If we don't, then other users may come in and
  678. * attempt to update the pagetable by writing it,
  679. * which will fail because the memory is RO but not
  680. * pinned, so Xen won't do the trap'n'emulate.
  681. *
  682. * If we're using split pte locks, we can't hold the
  683. * entire pagetable's worth of locks during the
  684. * traverse, because we may wrap the preempt count (8
  685. * bits). The solution is to mark RO and pin each PTE
  686. * page while holding the lock. This means the number
  687. * of locks we end up holding is never more than a
  688. * batch size (~32 entries, at present).
  689. *
  690. * If we're not using split pte locks, we needn't pin
  691. * the PTE pages independently, because we're
  692. * protected by the overall pagetable lock.
  693. */
  694. ptl = NULL;
  695. if (level == PT_PTE)
  696. ptl = xen_pte_lock(page, mm);
  697. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  698. pfn_pte(pfn, PAGE_KERNEL_RO),
  699. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  700. if (ptl) {
  701. xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
  702. /* Queue a deferred unlock for when this batch
  703. is completed. */
  704. xen_mc_callback(xen_pte_unlock, ptl);
  705. }
  706. }
  707. return flush;
  708. }
  709. /* This is called just after a mm has been created, but it has not
  710. been used yet. We need to make sure that its pagetable is all
  711. read-only, and can be pinned. */
  712. static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
  713. {
  714. xen_mc_batch();
  715. if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
  716. /* re-enable interrupts for flushing */
  717. xen_mc_issue(0);
  718. kmap_flush_unused();
  719. xen_mc_batch();
  720. }
  721. #ifdef CONFIG_X86_64
  722. {
  723. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  724. xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
  725. if (user_pgd) {
  726. xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
  727. xen_do_pin(MMUEXT_PIN_L4_TABLE,
  728. PFN_DOWN(__pa(user_pgd)));
  729. }
  730. }
  731. #else /* CONFIG_X86_32 */
  732. #ifdef CONFIG_X86_PAE
  733. /* Need to make sure unshared kernel PMD is pinnable */
  734. xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
  735. PT_PMD);
  736. #endif
  737. xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
  738. #endif /* CONFIG_X86_64 */
  739. xen_mc_issue(0);
  740. }
  741. static void xen_pgd_pin(struct mm_struct *mm)
  742. {
  743. __xen_pgd_pin(mm, mm->pgd);
  744. }
  745. /*
  746. * On save, we need to pin all pagetables to make sure they get their
  747. * mfns turned into pfns. Search the list for any unpinned pgds and pin
  748. * them (unpinned pgds are not currently in use, probably because the
  749. * process is under construction or destruction).
  750. *
  751. * Expected to be called in stop_machine() ("equivalent to taking
  752. * every spinlock in the system"), so the locking doesn't really
  753. * matter all that much.
  754. */
  755. void xen_mm_pin_all(void)
  756. {
  757. struct page *page;
  758. spin_lock(&pgd_lock);
  759. list_for_each_entry(page, &pgd_list, lru) {
  760. if (!PagePinned(page)) {
  761. __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
  762. SetPageSavePinned(page);
  763. }
  764. }
  765. spin_unlock(&pgd_lock);
  766. }
  767. /*
  768. * The init_mm pagetable is really pinned as soon as its created, but
  769. * that's before we have page structures to store the bits. So do all
  770. * the book-keeping now.
  771. */
  772. static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
  773. enum pt_level level)
  774. {
  775. SetPagePinned(page);
  776. return 0;
  777. }
  778. static void __init xen_mark_init_mm_pinned(void)
  779. {
  780. xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
  781. }
  782. static int xen_unpin_page(struct mm_struct *mm, struct page *page,
  783. enum pt_level level)
  784. {
  785. unsigned pgfl = TestClearPagePinned(page);
  786. if (pgfl && !PageHighMem(page)) {
  787. void *pt = lowmem_page_address(page);
  788. unsigned long pfn = page_to_pfn(page);
  789. spinlock_t *ptl = NULL;
  790. struct multicall_space mcs;
  791. /*
  792. * Do the converse to pin_page. If we're using split
  793. * pte locks, we must be holding the lock for while
  794. * the pte page is unpinned but still RO to prevent
  795. * concurrent updates from seeing it in this
  796. * partially-pinned state.
  797. */
  798. if (level == PT_PTE) {
  799. ptl = xen_pte_lock(page, mm);
  800. if (ptl)
  801. xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
  802. }
  803. mcs = __xen_mc_entry(0);
  804. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  805. pfn_pte(pfn, PAGE_KERNEL),
  806. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  807. if (ptl) {
  808. /* unlock when batch completed */
  809. xen_mc_callback(xen_pte_unlock, ptl);
  810. }
  811. }
  812. return 0; /* never need to flush on unpin */
  813. }
  814. /* Release a pagetables pages back as normal RW */
  815. static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
  816. {
  817. xen_mc_batch();
  818. xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  819. #ifdef CONFIG_X86_64
  820. {
  821. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  822. if (user_pgd) {
  823. xen_do_pin(MMUEXT_UNPIN_TABLE,
  824. PFN_DOWN(__pa(user_pgd)));
  825. xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
  826. }
  827. }
  828. #endif
  829. #ifdef CONFIG_X86_PAE
  830. /* Need to make sure unshared kernel PMD is unpinned */
  831. xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
  832. PT_PMD);
  833. #endif
  834. __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
  835. xen_mc_issue(0);
  836. }
  837. static void xen_pgd_unpin(struct mm_struct *mm)
  838. {
  839. __xen_pgd_unpin(mm, mm->pgd);
  840. }
  841. /*
  842. * On resume, undo any pinning done at save, so that the rest of the
  843. * kernel doesn't see any unexpected pinned pagetables.
  844. */
  845. void xen_mm_unpin_all(void)
  846. {
  847. struct page *page;
  848. spin_lock(&pgd_lock);
  849. list_for_each_entry(page, &pgd_list, lru) {
  850. if (PageSavePinned(page)) {
  851. BUG_ON(!PagePinned(page));
  852. __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
  853. ClearPageSavePinned(page);
  854. }
  855. }
  856. spin_unlock(&pgd_lock);
  857. }
  858. static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
  859. {
  860. spin_lock(&next->page_table_lock);
  861. xen_pgd_pin(next);
  862. spin_unlock(&next->page_table_lock);
  863. }
  864. static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
  865. {
  866. spin_lock(&mm->page_table_lock);
  867. xen_pgd_pin(mm);
  868. spin_unlock(&mm->page_table_lock);
  869. }
  870. #ifdef CONFIG_SMP
  871. /* Another cpu may still have their %cr3 pointing at the pagetable, so
  872. we need to repoint it somewhere else before we can unpin it. */
  873. static void drop_other_mm_ref(void *info)
  874. {
  875. struct mm_struct *mm = info;
  876. struct mm_struct *active_mm;
  877. active_mm = percpu_read(cpu_tlbstate.active_mm);
  878. if (active_mm == mm && percpu_read(cpu_tlbstate.state) != TLBSTATE_OK)
  879. leave_mm(smp_processor_id());
  880. /* If this cpu still has a stale cr3 reference, then make sure
  881. it has been flushed. */
  882. if (percpu_read(xen_current_cr3) == __pa(mm->pgd))
  883. load_cr3(swapper_pg_dir);
  884. }
  885. static void xen_drop_mm_ref(struct mm_struct *mm)
  886. {
  887. cpumask_var_t mask;
  888. unsigned cpu;
  889. if (current->active_mm == mm) {
  890. if (current->mm == mm)
  891. load_cr3(swapper_pg_dir);
  892. else
  893. leave_mm(smp_processor_id());
  894. }
  895. /* Get the "official" set of cpus referring to our pagetable. */
  896. if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
  897. for_each_online_cpu(cpu) {
  898. if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
  899. && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
  900. continue;
  901. smp_call_function_single(cpu, drop_other_mm_ref, mm, 1);
  902. }
  903. return;
  904. }
  905. cpumask_copy(mask, mm_cpumask(mm));
  906. /* It's possible that a vcpu may have a stale reference to our
  907. cr3, because its in lazy mode, and it hasn't yet flushed
  908. its set of pending hypercalls yet. In this case, we can
  909. look at its actual current cr3 value, and force it to flush
  910. if needed. */
  911. for_each_online_cpu(cpu) {
  912. if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
  913. cpumask_set_cpu(cpu, mask);
  914. }
  915. if (!cpumask_empty(mask))
  916. smp_call_function_many(mask, drop_other_mm_ref, mm, 1);
  917. free_cpumask_var(mask);
  918. }
  919. #else
  920. static void xen_drop_mm_ref(struct mm_struct *mm)
  921. {
  922. if (current->active_mm == mm)
  923. load_cr3(swapper_pg_dir);
  924. }
  925. #endif
  926. /*
  927. * While a process runs, Xen pins its pagetables, which means that the
  928. * hypervisor forces it to be read-only, and it controls all updates
  929. * to it. This means that all pagetable updates have to go via the
  930. * hypervisor, which is moderately expensive.
  931. *
  932. * Since we're pulling the pagetable down, we switch to use init_mm,
  933. * unpin old process pagetable and mark it all read-write, which
  934. * allows further operations on it to be simple memory accesses.
  935. *
  936. * The only subtle point is that another CPU may be still using the
  937. * pagetable because of lazy tlb flushing. This means we need need to
  938. * switch all CPUs off this pagetable before we can unpin it.
  939. */
  940. static void xen_exit_mmap(struct mm_struct *mm)
  941. {
  942. get_cpu(); /* make sure we don't move around */
  943. xen_drop_mm_ref(mm);
  944. put_cpu();
  945. spin_lock(&mm->page_table_lock);
  946. /* pgd may not be pinned in the error exit path of execve */
  947. if (xen_page_pinned(mm->pgd))
  948. xen_pgd_unpin(mm);
  949. spin_unlock(&mm->page_table_lock);
  950. }
  951. static void __init xen_pagetable_setup_start(pgd_t *base)
  952. {
  953. }
  954. static __init void xen_mapping_pagetable_reserve(u64 start, u64 end)
  955. {
  956. /* reserve the range used */
  957. native_pagetable_reserve(start, end);
  958. /* set as RW the rest */
  959. printk(KERN_DEBUG "xen: setting RW the range %llx - %llx\n", end,
  960. PFN_PHYS(pgt_buf_top));
  961. while (end < PFN_PHYS(pgt_buf_top)) {
  962. make_lowmem_page_readwrite(__va(end));
  963. end += PAGE_SIZE;
  964. }
  965. }
  966. static void xen_post_allocator_init(void);
  967. static void __init xen_pagetable_setup_done(pgd_t *base)
  968. {
  969. xen_setup_shared_info();
  970. xen_post_allocator_init();
  971. }
  972. static void xen_write_cr2(unsigned long cr2)
  973. {
  974. percpu_read(xen_vcpu)->arch.cr2 = cr2;
  975. }
  976. static unsigned long xen_read_cr2(void)
  977. {
  978. return percpu_read(xen_vcpu)->arch.cr2;
  979. }
  980. unsigned long xen_read_cr2_direct(void)
  981. {
  982. return percpu_read(xen_vcpu_info.arch.cr2);
  983. }
  984. static void xen_flush_tlb(void)
  985. {
  986. struct mmuext_op *op;
  987. struct multicall_space mcs;
  988. preempt_disable();
  989. mcs = xen_mc_entry(sizeof(*op));
  990. op = mcs.args;
  991. op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
  992. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  993. xen_mc_issue(PARAVIRT_LAZY_MMU);
  994. preempt_enable();
  995. }
  996. static void xen_flush_tlb_single(unsigned long addr)
  997. {
  998. struct mmuext_op *op;
  999. struct multicall_space mcs;
  1000. preempt_disable();
  1001. mcs = xen_mc_entry(sizeof(*op));
  1002. op = mcs.args;
  1003. op->cmd = MMUEXT_INVLPG_LOCAL;
  1004. op->arg1.linear_addr = addr & PAGE_MASK;
  1005. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  1006. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1007. preempt_enable();
  1008. }
  1009. static void xen_flush_tlb_others(const struct cpumask *cpus,
  1010. struct mm_struct *mm, unsigned long va)
  1011. {
  1012. struct {
  1013. struct mmuext_op op;
  1014. #ifdef CONFIG_SMP
  1015. DECLARE_BITMAP(mask, num_processors);
  1016. #else
  1017. DECLARE_BITMAP(mask, NR_CPUS);
  1018. #endif
  1019. } *args;
  1020. struct multicall_space mcs;
  1021. if (cpumask_empty(cpus))
  1022. return; /* nothing to do */
  1023. mcs = xen_mc_entry(sizeof(*args));
  1024. args = mcs.args;
  1025. args->op.arg2.vcpumask = to_cpumask(args->mask);
  1026. /* Remove us, and any offline CPUS. */
  1027. cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
  1028. cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
  1029. if (va == TLB_FLUSH_ALL) {
  1030. args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
  1031. } else {
  1032. args->op.cmd = MMUEXT_INVLPG_MULTI;
  1033. args->op.arg1.linear_addr = va;
  1034. }
  1035. MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
  1036. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1037. }
  1038. static unsigned long xen_read_cr3(void)
  1039. {
  1040. return percpu_read(xen_cr3);
  1041. }
  1042. static void set_current_cr3(void *v)
  1043. {
  1044. percpu_write(xen_current_cr3, (unsigned long)v);
  1045. }
  1046. static void __xen_write_cr3(bool kernel, unsigned long cr3)
  1047. {
  1048. struct mmuext_op *op;
  1049. struct multicall_space mcs;
  1050. unsigned long mfn;
  1051. if (cr3)
  1052. mfn = pfn_to_mfn(PFN_DOWN(cr3));
  1053. else
  1054. mfn = 0;
  1055. WARN_ON(mfn == 0 && kernel);
  1056. mcs = __xen_mc_entry(sizeof(*op));
  1057. op = mcs.args;
  1058. op->cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
  1059. op->arg1.mfn = mfn;
  1060. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  1061. if (kernel) {
  1062. percpu_write(xen_cr3, cr3);
  1063. /* Update xen_current_cr3 once the batch has actually
  1064. been submitted. */
  1065. xen_mc_callback(set_current_cr3, (void *)cr3);
  1066. }
  1067. }
  1068. static void xen_write_cr3(unsigned long cr3)
  1069. {
  1070. BUG_ON(preemptible());
  1071. xen_mc_batch(); /* disables interrupts */
  1072. /* Update while interrupts are disabled, so its atomic with
  1073. respect to ipis */
  1074. percpu_write(xen_cr3, cr3);
  1075. __xen_write_cr3(true, cr3);
  1076. #ifdef CONFIG_X86_64
  1077. {
  1078. pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
  1079. if (user_pgd)
  1080. __xen_write_cr3(false, __pa(user_pgd));
  1081. else
  1082. __xen_write_cr3(false, 0);
  1083. }
  1084. #endif
  1085. xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
  1086. }
  1087. static int xen_pgd_alloc(struct mm_struct *mm)
  1088. {
  1089. pgd_t *pgd = mm->pgd;
  1090. int ret = 0;
  1091. BUG_ON(PagePinned(virt_to_page(pgd)));
  1092. #ifdef CONFIG_X86_64
  1093. {
  1094. struct page *page = virt_to_page(pgd);
  1095. pgd_t *user_pgd;
  1096. BUG_ON(page->private != 0);
  1097. ret = -ENOMEM;
  1098. user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
  1099. page->private = (unsigned long)user_pgd;
  1100. if (user_pgd != NULL) {
  1101. user_pgd[pgd_index(VSYSCALL_START)] =
  1102. __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
  1103. ret = 0;
  1104. }
  1105. BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
  1106. }
  1107. #endif
  1108. return ret;
  1109. }
  1110. static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
  1111. {
  1112. #ifdef CONFIG_X86_64
  1113. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  1114. if (user_pgd)
  1115. free_page((unsigned long)user_pgd);
  1116. #endif
  1117. }
  1118. #ifdef CONFIG_X86_32
  1119. static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
  1120. {
  1121. /* If there's an existing pte, then don't allow _PAGE_RW to be set */
  1122. if (pte_val_ma(*ptep) & _PAGE_PRESENT)
  1123. pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
  1124. pte_val_ma(pte));
  1125. return pte;
  1126. }
  1127. #else /* CONFIG_X86_64 */
  1128. static pte_t __init mask_rw_pte(pte_t *ptep, pte_t pte)
  1129. {
  1130. unsigned long pfn = pte_pfn(pte);
  1131. /*
  1132. * If the new pfn is within the range of the newly allocated
  1133. * kernel pagetable, and it isn't being mapped into an
  1134. * early_ioremap fixmap slot as a freshly allocated page, make sure
  1135. * it is RO.
  1136. */
  1137. if (((!is_early_ioremap_ptep(ptep) &&
  1138. pfn >= pgt_buf_start && pfn < pgt_buf_top)) ||
  1139. (is_early_ioremap_ptep(ptep) && pfn != (pgt_buf_end - 1)))
  1140. pte = pte_wrprotect(pte);
  1141. return pte;
  1142. }
  1143. #endif /* CONFIG_X86_64 */
  1144. /* Init-time set_pte while constructing initial pagetables, which
  1145. doesn't allow RO pagetable pages to be remapped RW */
  1146. static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
  1147. {
  1148. pte = mask_rw_pte(ptep, pte);
  1149. xen_set_pte(ptep, pte);
  1150. }
  1151. static void pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
  1152. {
  1153. struct mmuext_op op;
  1154. op.cmd = cmd;
  1155. op.arg1.mfn = pfn_to_mfn(pfn);
  1156. if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
  1157. BUG();
  1158. }
  1159. /* Early in boot, while setting up the initial pagetable, assume
  1160. everything is pinned. */
  1161. static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
  1162. {
  1163. #ifdef CONFIG_FLATMEM
  1164. BUG_ON(mem_map); /* should only be used early */
  1165. #endif
  1166. make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
  1167. pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
  1168. }
  1169. /* Used for pmd and pud */
  1170. static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
  1171. {
  1172. #ifdef CONFIG_FLATMEM
  1173. BUG_ON(mem_map); /* should only be used early */
  1174. #endif
  1175. make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
  1176. }
  1177. /* Early release_pte assumes that all pts are pinned, since there's
  1178. only init_mm and anything attached to that is pinned. */
  1179. static void __init xen_release_pte_init(unsigned long pfn)
  1180. {
  1181. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
  1182. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1183. }
  1184. static void __init xen_release_pmd_init(unsigned long pfn)
  1185. {
  1186. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1187. }
  1188. /* This needs to make sure the new pte page is pinned iff its being
  1189. attached to a pinned pagetable. */
  1190. static void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, unsigned level)
  1191. {
  1192. struct page *page = pfn_to_page(pfn);
  1193. if (PagePinned(virt_to_page(mm->pgd))) {
  1194. SetPagePinned(page);
  1195. if (!PageHighMem(page)) {
  1196. make_lowmem_page_readonly(__va(PFN_PHYS((unsigned long)pfn)));
  1197. if (level == PT_PTE && USE_SPLIT_PTLOCKS)
  1198. pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
  1199. } else {
  1200. /* make sure there are no stray mappings of
  1201. this page */
  1202. kmap_flush_unused();
  1203. }
  1204. }
  1205. }
  1206. static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
  1207. {
  1208. xen_alloc_ptpage(mm, pfn, PT_PTE);
  1209. }
  1210. static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
  1211. {
  1212. xen_alloc_ptpage(mm, pfn, PT_PMD);
  1213. }
  1214. /* This should never happen until we're OK to use struct page */
  1215. static void xen_release_ptpage(unsigned long pfn, unsigned level)
  1216. {
  1217. struct page *page = pfn_to_page(pfn);
  1218. if (PagePinned(page)) {
  1219. if (!PageHighMem(page)) {
  1220. if (level == PT_PTE && USE_SPLIT_PTLOCKS)
  1221. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
  1222. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1223. }
  1224. ClearPagePinned(page);
  1225. }
  1226. }
  1227. static void xen_release_pte(unsigned long pfn)
  1228. {
  1229. xen_release_ptpage(pfn, PT_PTE);
  1230. }
  1231. static void xen_release_pmd(unsigned long pfn)
  1232. {
  1233. xen_release_ptpage(pfn, PT_PMD);
  1234. }
  1235. #if PAGETABLE_LEVELS == 4
  1236. static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
  1237. {
  1238. xen_alloc_ptpage(mm, pfn, PT_PUD);
  1239. }
  1240. static void xen_release_pud(unsigned long pfn)
  1241. {
  1242. xen_release_ptpage(pfn, PT_PUD);
  1243. }
  1244. #endif
  1245. void __init xen_reserve_top(void)
  1246. {
  1247. #ifdef CONFIG_X86_32
  1248. unsigned long top = HYPERVISOR_VIRT_START;
  1249. struct xen_platform_parameters pp;
  1250. if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
  1251. top = pp.virt_start;
  1252. reserve_top_address(-top);
  1253. #endif /* CONFIG_X86_32 */
  1254. }
  1255. /*
  1256. * Like __va(), but returns address in the kernel mapping (which is
  1257. * all we have until the physical memory mapping has been set up.
  1258. */
  1259. static void *__ka(phys_addr_t paddr)
  1260. {
  1261. #ifdef CONFIG_X86_64
  1262. return (void *)(paddr + __START_KERNEL_map);
  1263. #else
  1264. return __va(paddr);
  1265. #endif
  1266. }
  1267. /* Convert a machine address to physical address */
  1268. static unsigned long m2p(phys_addr_t maddr)
  1269. {
  1270. phys_addr_t paddr;
  1271. maddr &= PTE_PFN_MASK;
  1272. paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
  1273. return paddr;
  1274. }
  1275. /* Convert a machine address to kernel virtual */
  1276. static void *m2v(phys_addr_t maddr)
  1277. {
  1278. return __ka(m2p(maddr));
  1279. }
  1280. /* Set the page permissions on an identity-mapped pages */
  1281. static void set_page_prot(void *addr, pgprot_t prot)
  1282. {
  1283. unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
  1284. pte_t pte = pfn_pte(pfn, prot);
  1285. if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, 0))
  1286. BUG();
  1287. }
  1288. static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
  1289. {
  1290. unsigned pmdidx, pteidx;
  1291. unsigned ident_pte;
  1292. unsigned long pfn;
  1293. level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
  1294. PAGE_SIZE);
  1295. ident_pte = 0;
  1296. pfn = 0;
  1297. for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
  1298. pte_t *pte_page;
  1299. /* Reuse or allocate a page of ptes */
  1300. if (pmd_present(pmd[pmdidx]))
  1301. pte_page = m2v(pmd[pmdidx].pmd);
  1302. else {
  1303. /* Check for free pte pages */
  1304. if (ident_pte == LEVEL1_IDENT_ENTRIES)
  1305. break;
  1306. pte_page = &level1_ident_pgt[ident_pte];
  1307. ident_pte += PTRS_PER_PTE;
  1308. pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
  1309. }
  1310. /* Install mappings */
  1311. for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
  1312. pte_t pte;
  1313. #ifdef CONFIG_X86_32
  1314. if (pfn > max_pfn_mapped)
  1315. max_pfn_mapped = pfn;
  1316. #endif
  1317. if (!pte_none(pte_page[pteidx]))
  1318. continue;
  1319. pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
  1320. pte_page[pteidx] = pte;
  1321. }
  1322. }
  1323. for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
  1324. set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
  1325. set_page_prot(pmd, PAGE_KERNEL_RO);
  1326. }
  1327. void __init xen_setup_machphys_mapping(void)
  1328. {
  1329. struct xen_machphys_mapping mapping;
  1330. if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
  1331. machine_to_phys_mapping = (unsigned long *)mapping.v_start;
  1332. machine_to_phys_nr = mapping.max_mfn + 1;
  1333. } else {
  1334. machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
  1335. }
  1336. #ifdef CONFIG_X86_32
  1337. if ((machine_to_phys_mapping + machine_to_phys_nr)
  1338. < machine_to_phys_mapping)
  1339. machine_to_phys_nr = (unsigned long *)NULL
  1340. - machine_to_phys_mapping;
  1341. #endif
  1342. }
  1343. #ifdef CONFIG_X86_64
  1344. static void convert_pfn_mfn(void *v)
  1345. {
  1346. pte_t *pte = v;
  1347. int i;
  1348. /* All levels are converted the same way, so just treat them
  1349. as ptes. */
  1350. for (i = 0; i < PTRS_PER_PTE; i++)
  1351. pte[i] = xen_make_pte(pte[i].pte);
  1352. }
  1353. /*
  1354. * Set up the initial kernel pagetable.
  1355. *
  1356. * We can construct this by grafting the Xen provided pagetable into
  1357. * head_64.S's preconstructed pagetables. We copy the Xen L2's into
  1358. * level2_ident_pgt, level2_kernel_pgt and level2_fixmap_pgt. This
  1359. * means that only the kernel has a physical mapping to start with -
  1360. * but that's enough to get __va working. We need to fill in the rest
  1361. * of the physical mapping once some sort of allocator has been set
  1362. * up.
  1363. */
  1364. pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
  1365. unsigned long max_pfn)
  1366. {
  1367. pud_t *l3;
  1368. pmd_t *l2;
  1369. /* max_pfn_mapped is the last pfn mapped in the initial memory
  1370. * mappings. Considering that on Xen after the kernel mappings we
  1371. * have the mappings of some pages that don't exist in pfn space, we
  1372. * set max_pfn_mapped to the last real pfn mapped. */
  1373. max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
  1374. /* Zap identity mapping */
  1375. init_level4_pgt[0] = __pgd(0);
  1376. /* Pre-constructed entries are in pfn, so convert to mfn */
  1377. convert_pfn_mfn(init_level4_pgt);
  1378. convert_pfn_mfn(level3_ident_pgt);
  1379. convert_pfn_mfn(level3_kernel_pgt);
  1380. l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
  1381. l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
  1382. memcpy(level2_ident_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
  1383. memcpy(level2_kernel_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
  1384. l3 = m2v(pgd[pgd_index(__START_KERNEL_map + PMD_SIZE)].pgd);
  1385. l2 = m2v(l3[pud_index(__START_KERNEL_map + PMD_SIZE)].pud);
  1386. memcpy(level2_fixmap_pgt, l2, sizeof(pmd_t) * PTRS_PER_PMD);
  1387. /* Set up identity map */
  1388. xen_map_identity_early(level2_ident_pgt, max_pfn);
  1389. /* Make pagetable pieces RO */
  1390. set_page_prot(init_level4_pgt, PAGE_KERNEL_RO);
  1391. set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
  1392. set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
  1393. set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
  1394. set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
  1395. set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
  1396. /* Pin down new L4 */
  1397. pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
  1398. PFN_DOWN(__pa_symbol(init_level4_pgt)));
  1399. /* Unpin Xen-provided one */
  1400. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  1401. /* Switch over */
  1402. pgd = init_level4_pgt;
  1403. /*
  1404. * At this stage there can be no user pgd, and no page
  1405. * structure to attach it to, so make sure we just set kernel
  1406. * pgd.
  1407. */
  1408. xen_mc_batch();
  1409. __xen_write_cr3(true, __pa(pgd));
  1410. xen_mc_issue(PARAVIRT_LAZY_CPU);
  1411. memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
  1412. __pa(xen_start_info->pt_base +
  1413. xen_start_info->nr_pt_frames * PAGE_SIZE),
  1414. "XEN PAGETABLES");
  1415. return pgd;
  1416. }
  1417. #else /* !CONFIG_X86_64 */
  1418. static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
  1419. static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
  1420. static void __init xen_write_cr3_init(unsigned long cr3)
  1421. {
  1422. unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
  1423. BUG_ON(read_cr3() != __pa(initial_page_table));
  1424. BUG_ON(cr3 != __pa(swapper_pg_dir));
  1425. /*
  1426. * We are switching to swapper_pg_dir for the first time (from
  1427. * initial_page_table) and therefore need to mark that page
  1428. * read-only and then pin it.
  1429. *
  1430. * Xen disallows sharing of kernel PMDs for PAE
  1431. * guests. Therefore we must copy the kernel PMD from
  1432. * initial_page_table into a new kernel PMD to be used in
  1433. * swapper_pg_dir.
  1434. */
  1435. swapper_kernel_pmd =
  1436. extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
  1437. memcpy(swapper_kernel_pmd, initial_kernel_pmd,
  1438. sizeof(pmd_t) * PTRS_PER_PMD);
  1439. swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
  1440. __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
  1441. set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
  1442. set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
  1443. xen_write_cr3(cr3);
  1444. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
  1445. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
  1446. PFN_DOWN(__pa(initial_page_table)));
  1447. set_page_prot(initial_page_table, PAGE_KERNEL);
  1448. set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
  1449. pv_mmu_ops.write_cr3 = &xen_write_cr3;
  1450. }
  1451. pgd_t * __init xen_setup_kernel_pagetable(pgd_t *pgd,
  1452. unsigned long max_pfn)
  1453. {
  1454. pmd_t *kernel_pmd;
  1455. initial_kernel_pmd =
  1456. extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
  1457. max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->pt_base) +
  1458. xen_start_info->nr_pt_frames * PAGE_SIZE +
  1459. 512*1024);
  1460. kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
  1461. memcpy(initial_kernel_pmd, kernel_pmd, sizeof(pmd_t) * PTRS_PER_PMD);
  1462. xen_map_identity_early(initial_kernel_pmd, max_pfn);
  1463. memcpy(initial_page_table, pgd, sizeof(pgd_t) * PTRS_PER_PGD);
  1464. initial_page_table[KERNEL_PGD_BOUNDARY] =
  1465. __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
  1466. set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
  1467. set_page_prot(initial_page_table, PAGE_KERNEL_RO);
  1468. set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
  1469. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  1470. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
  1471. PFN_DOWN(__pa(initial_page_table)));
  1472. xen_write_cr3(__pa(initial_page_table));
  1473. memblock_x86_reserve_range(__pa(xen_start_info->pt_base),
  1474. __pa(xen_start_info->pt_base +
  1475. xen_start_info->nr_pt_frames * PAGE_SIZE),
  1476. "XEN PAGETABLES");
  1477. return initial_page_table;
  1478. }
  1479. #endif /* CONFIG_X86_64 */
  1480. static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
  1481. static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
  1482. {
  1483. pte_t pte;
  1484. phys >>= PAGE_SHIFT;
  1485. switch (idx) {
  1486. case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
  1487. #ifdef CONFIG_X86_F00F_BUG
  1488. case FIX_F00F_IDT:
  1489. #endif
  1490. #ifdef CONFIG_X86_32
  1491. case FIX_WP_TEST:
  1492. case FIX_VDSO:
  1493. # ifdef CONFIG_HIGHMEM
  1494. case FIX_KMAP_BEGIN ... FIX_KMAP_END:
  1495. # endif
  1496. #else
  1497. case VSYSCALL_LAST_PAGE ... VSYSCALL_FIRST_PAGE:
  1498. #endif
  1499. case FIX_TEXT_POKE0:
  1500. case FIX_TEXT_POKE1:
  1501. /* All local page mappings */
  1502. pte = pfn_pte(phys, prot);
  1503. break;
  1504. #ifdef CONFIG_X86_LOCAL_APIC
  1505. case FIX_APIC_BASE: /* maps dummy local APIC */
  1506. pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
  1507. break;
  1508. #endif
  1509. #ifdef CONFIG_X86_IO_APIC
  1510. case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
  1511. /*
  1512. * We just don't map the IO APIC - all access is via
  1513. * hypercalls. Keep the address in the pte for reference.
  1514. */
  1515. pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
  1516. break;
  1517. #endif
  1518. case FIX_PARAVIRT_BOOTMAP:
  1519. /* This is an MFN, but it isn't an IO mapping from the
  1520. IO domain */
  1521. pte = mfn_pte(phys, prot);
  1522. break;
  1523. default:
  1524. /* By default, set_fixmap is used for hardware mappings */
  1525. pte = mfn_pte(phys, __pgprot(pgprot_val(prot) | _PAGE_IOMAP));
  1526. break;
  1527. }
  1528. __native_set_fixmap(idx, pte);
  1529. #ifdef CONFIG_X86_64
  1530. /* Replicate changes to map the vsyscall page into the user
  1531. pagetable vsyscall mapping. */
  1532. if (idx >= VSYSCALL_LAST_PAGE && idx <= VSYSCALL_FIRST_PAGE) {
  1533. unsigned long vaddr = __fix_to_virt(idx);
  1534. set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
  1535. }
  1536. #endif
  1537. }
  1538. void __init xen_ident_map_ISA(void)
  1539. {
  1540. unsigned long pa;
  1541. /*
  1542. * If we're dom0, then linear map the ISA machine addresses into
  1543. * the kernel's address space.
  1544. */
  1545. if (!xen_initial_domain())
  1546. return;
  1547. xen_raw_printk("Xen: setup ISA identity maps\n");
  1548. for (pa = ISA_START_ADDRESS; pa < ISA_END_ADDRESS; pa += PAGE_SIZE) {
  1549. pte_t pte = mfn_pte(PFN_DOWN(pa), PAGE_KERNEL_IO);
  1550. if (HYPERVISOR_update_va_mapping(PAGE_OFFSET + pa, pte, 0))
  1551. BUG();
  1552. }
  1553. xen_flush_tlb();
  1554. }
  1555. static void __init xen_post_allocator_init(void)
  1556. {
  1557. #ifdef CONFIG_XEN_DEBUG
  1558. pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte_debug);
  1559. #endif
  1560. pv_mmu_ops.set_pte = xen_set_pte;
  1561. pv_mmu_ops.set_pmd = xen_set_pmd;
  1562. pv_mmu_ops.set_pud = xen_set_pud;
  1563. #if PAGETABLE_LEVELS == 4
  1564. pv_mmu_ops.set_pgd = xen_set_pgd;
  1565. #endif
  1566. /* This will work as long as patching hasn't happened yet
  1567. (which it hasn't) */
  1568. pv_mmu_ops.alloc_pte = xen_alloc_pte;
  1569. pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
  1570. pv_mmu_ops.release_pte = xen_release_pte;
  1571. pv_mmu_ops.release_pmd = xen_release_pmd;
  1572. #if PAGETABLE_LEVELS == 4
  1573. pv_mmu_ops.alloc_pud = xen_alloc_pud;
  1574. pv_mmu_ops.release_pud = xen_release_pud;
  1575. #endif
  1576. #ifdef CONFIG_X86_64
  1577. SetPagePinned(virt_to_page(level3_user_vsyscall));
  1578. #endif
  1579. xen_mark_init_mm_pinned();
  1580. }
  1581. static void xen_leave_lazy_mmu(void)
  1582. {
  1583. preempt_disable();
  1584. xen_mc_flush();
  1585. paravirt_leave_lazy_mmu();
  1586. preempt_enable();
  1587. }
  1588. static const struct pv_mmu_ops xen_mmu_ops __initconst = {
  1589. .read_cr2 = xen_read_cr2,
  1590. .write_cr2 = xen_write_cr2,
  1591. .read_cr3 = xen_read_cr3,
  1592. #ifdef CONFIG_X86_32
  1593. .write_cr3 = xen_write_cr3_init,
  1594. #else
  1595. .write_cr3 = xen_write_cr3,
  1596. #endif
  1597. .flush_tlb_user = xen_flush_tlb,
  1598. .flush_tlb_kernel = xen_flush_tlb,
  1599. .flush_tlb_single = xen_flush_tlb_single,
  1600. .flush_tlb_others = xen_flush_tlb_others,
  1601. .pte_update = paravirt_nop,
  1602. .pte_update_defer = paravirt_nop,
  1603. .pgd_alloc = xen_pgd_alloc,
  1604. .pgd_free = xen_pgd_free,
  1605. .alloc_pte = xen_alloc_pte_init,
  1606. .release_pte = xen_release_pte_init,
  1607. .alloc_pmd = xen_alloc_pmd_init,
  1608. .release_pmd = xen_release_pmd_init,
  1609. .set_pte = xen_set_pte_init,
  1610. .set_pte_at = xen_set_pte_at,
  1611. .set_pmd = xen_set_pmd_hyper,
  1612. .ptep_modify_prot_start = __ptep_modify_prot_start,
  1613. .ptep_modify_prot_commit = __ptep_modify_prot_commit,
  1614. .pte_val = PV_CALLEE_SAVE(xen_pte_val),
  1615. .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
  1616. .make_pte = PV_CALLEE_SAVE(xen_make_pte),
  1617. .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
  1618. #ifdef CONFIG_X86_PAE
  1619. .set_pte_atomic = xen_set_pte_atomic,
  1620. .pte_clear = xen_pte_clear,
  1621. .pmd_clear = xen_pmd_clear,
  1622. #endif /* CONFIG_X86_PAE */
  1623. .set_pud = xen_set_pud_hyper,
  1624. .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
  1625. .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
  1626. #if PAGETABLE_LEVELS == 4
  1627. .pud_val = PV_CALLEE_SAVE(xen_pud_val),
  1628. .make_pud = PV_CALLEE_SAVE(xen_make_pud),
  1629. .set_pgd = xen_set_pgd_hyper,
  1630. .alloc_pud = xen_alloc_pmd_init,
  1631. .release_pud = xen_release_pmd_init,
  1632. #endif /* PAGETABLE_LEVELS == 4 */
  1633. .activate_mm = xen_activate_mm,
  1634. .dup_mmap = xen_dup_mmap,
  1635. .exit_mmap = xen_exit_mmap,
  1636. .lazy_mode = {
  1637. .enter = paravirt_enter_lazy_mmu,
  1638. .leave = xen_leave_lazy_mmu,
  1639. },
  1640. .set_fixmap = xen_set_fixmap,
  1641. };
  1642. void __init xen_init_mmu_ops(void)
  1643. {
  1644. x86_init.mapping.pagetable_reserve = xen_mapping_pagetable_reserve;
  1645. x86_init.paging.pagetable_setup_start = xen_pagetable_setup_start;
  1646. x86_init.paging.pagetable_setup_done = xen_pagetable_setup_done;
  1647. pv_mmu_ops = xen_mmu_ops;
  1648. memset(dummy_mapping, 0xff, PAGE_SIZE);
  1649. }
  1650. /* Protected by xen_reservation_lock. */
  1651. #define MAX_CONTIG_ORDER 9 /* 2MB */
  1652. static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
  1653. #define VOID_PTE (mfn_pte(0, __pgprot(0)))
  1654. static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
  1655. unsigned long *in_frames,
  1656. unsigned long *out_frames)
  1657. {
  1658. int i;
  1659. struct multicall_space mcs;
  1660. xen_mc_batch();
  1661. for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
  1662. mcs = __xen_mc_entry(0);
  1663. if (in_frames)
  1664. in_frames[i] = virt_to_mfn(vaddr);
  1665. MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
  1666. __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
  1667. if (out_frames)
  1668. out_frames[i] = virt_to_pfn(vaddr);
  1669. }
  1670. xen_mc_issue(0);
  1671. }
  1672. /*
  1673. * Update the pfn-to-mfn mappings for a virtual address range, either to
  1674. * point to an array of mfns, or contiguously from a single starting
  1675. * mfn.
  1676. */
  1677. static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
  1678. unsigned long *mfns,
  1679. unsigned long first_mfn)
  1680. {
  1681. unsigned i, limit;
  1682. unsigned long mfn;
  1683. xen_mc_batch();
  1684. limit = 1u << order;
  1685. for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
  1686. struct multicall_space mcs;
  1687. unsigned flags;
  1688. mcs = __xen_mc_entry(0);
  1689. if (mfns)
  1690. mfn = mfns[i];
  1691. else
  1692. mfn = first_mfn + i;
  1693. if (i < (limit - 1))
  1694. flags = 0;
  1695. else {
  1696. if (order == 0)
  1697. flags = UVMF_INVLPG | UVMF_ALL;
  1698. else
  1699. flags = UVMF_TLB_FLUSH | UVMF_ALL;
  1700. }
  1701. MULTI_update_va_mapping(mcs.mc, vaddr,
  1702. mfn_pte(mfn, PAGE_KERNEL), flags);
  1703. set_phys_to_machine(virt_to_pfn(vaddr), mfn);
  1704. }
  1705. xen_mc_issue(0);
  1706. }
  1707. /*
  1708. * Perform the hypercall to exchange a region of our pfns to point to
  1709. * memory with the required contiguous alignment. Takes the pfns as
  1710. * input, and populates mfns as output.
  1711. *
  1712. * Returns a success code indicating whether the hypervisor was able to
  1713. * satisfy the request or not.
  1714. */
  1715. static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
  1716. unsigned long *pfns_in,
  1717. unsigned long extents_out,
  1718. unsigned int order_out,
  1719. unsigned long *mfns_out,
  1720. unsigned int address_bits)
  1721. {
  1722. long rc;
  1723. int success;
  1724. struct xen_memory_exchange exchange = {
  1725. .in = {
  1726. .nr_extents = extents_in,
  1727. .extent_order = order_in,
  1728. .extent_start = pfns_in,
  1729. .domid = DOMID_SELF
  1730. },
  1731. .out = {
  1732. .nr_extents = extents_out,
  1733. .extent_order = order_out,
  1734. .extent_start = mfns_out,
  1735. .address_bits = address_bits,
  1736. .domid = DOMID_SELF
  1737. }
  1738. };
  1739. BUG_ON(extents_in << order_in != extents_out << order_out);
  1740. rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
  1741. success = (exchange.nr_exchanged == extents_in);
  1742. BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
  1743. BUG_ON(success && (rc != 0));
  1744. return success;
  1745. }
  1746. int xen_create_contiguous_region(unsigned long vstart, unsigned int order,
  1747. unsigned int address_bits)
  1748. {
  1749. unsigned long *in_frames = discontig_frames, out_frame;
  1750. unsigned long flags;
  1751. int success;
  1752. /*
  1753. * Currently an auto-translated guest will not perform I/O, nor will
  1754. * it require PAE page directories below 4GB. Therefore any calls to
  1755. * this function are redundant and can be ignored.
  1756. */
  1757. if (xen_feature(XENFEAT_auto_translated_physmap))
  1758. return 0;
  1759. if (unlikely(order > MAX_CONTIG_ORDER))
  1760. return -ENOMEM;
  1761. memset((void *) vstart, 0, PAGE_SIZE << order);
  1762. spin_lock_irqsave(&xen_reservation_lock, flags);
  1763. /* 1. Zap current PTEs, remembering MFNs. */
  1764. xen_zap_pfn_range(vstart, order, in_frames, NULL);
  1765. /* 2. Get a new contiguous memory extent. */
  1766. out_frame = virt_to_pfn(vstart);
  1767. success = xen_exchange_memory(1UL << order, 0, in_frames,
  1768. 1, order, &out_frame,
  1769. address_bits);
  1770. /* 3. Map the new extent in place of old pages. */
  1771. if (success)
  1772. xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
  1773. else
  1774. xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
  1775. spin_unlock_irqrestore(&xen_reservation_lock, flags);
  1776. return success ? 0 : -ENOMEM;
  1777. }
  1778. EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
  1779. void xen_destroy_contiguous_region(unsigned long vstart, unsigned int order)
  1780. {
  1781. unsigned long *out_frames = discontig_frames, in_frame;
  1782. unsigned long flags;
  1783. int success;
  1784. if (xen_feature(XENFEAT_auto_translated_physmap))
  1785. return;
  1786. if (unlikely(order > MAX_CONTIG_ORDER))
  1787. return;
  1788. memset((void *) vstart, 0, PAGE_SIZE << order);
  1789. spin_lock_irqsave(&xen_reservation_lock, flags);
  1790. /* 1. Find start MFN of contiguous extent. */
  1791. in_frame = virt_to_mfn(vstart);
  1792. /* 2. Zap current PTEs. */
  1793. xen_zap_pfn_range(vstart, order, NULL, out_frames);
  1794. /* 3. Do the exchange for non-contiguous MFNs. */
  1795. success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
  1796. 0, out_frames, 0);
  1797. /* 4. Map new pages in place of old pages. */
  1798. if (success)
  1799. xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
  1800. else
  1801. xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
  1802. spin_unlock_irqrestore(&xen_reservation_lock, flags);
  1803. }
  1804. EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
  1805. #ifdef CONFIG_XEN_PVHVM
  1806. static void xen_hvm_exit_mmap(struct mm_struct *mm)
  1807. {
  1808. struct xen_hvm_pagetable_dying a;
  1809. int rc;
  1810. a.domid = DOMID_SELF;
  1811. a.gpa = __pa(mm->pgd);
  1812. rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
  1813. WARN_ON_ONCE(rc < 0);
  1814. }
  1815. static int is_pagetable_dying_supported(void)
  1816. {
  1817. struct xen_hvm_pagetable_dying a;
  1818. int rc = 0;
  1819. a.domid = DOMID_SELF;
  1820. a.gpa = 0x00;
  1821. rc = HYPERVISOR_hvm_op(HVMOP_pagetable_dying, &a);
  1822. if (rc < 0) {
  1823. printk(KERN_DEBUG "HVMOP_pagetable_dying not supported\n");
  1824. return 0;
  1825. }
  1826. return 1;
  1827. }
  1828. void __init xen_hvm_init_mmu_ops(void)
  1829. {
  1830. if (is_pagetable_dying_supported())
  1831. pv_mmu_ops.exit_mmap = xen_hvm_exit_mmap;
  1832. }
  1833. #endif
  1834. #define REMAP_BATCH_SIZE 16
  1835. struct remap_data {
  1836. unsigned long mfn;
  1837. pgprot_t prot;
  1838. struct mmu_update *mmu_update;
  1839. };
  1840. static int remap_area_mfn_pte_fn(pte_t *ptep, pgtable_t token,
  1841. unsigned long addr, void *data)
  1842. {
  1843. struct remap_data *rmd = data;
  1844. pte_t pte = pte_mkspecial(pfn_pte(rmd->mfn++, rmd->prot));
  1845. rmd->mmu_update->ptr = virt_to_machine(ptep).maddr;
  1846. rmd->mmu_update->val = pte_val_ma(pte);
  1847. rmd->mmu_update++;
  1848. return 0;
  1849. }
  1850. int xen_remap_domain_mfn_range(struct vm_area_struct *vma,
  1851. unsigned long addr,
  1852. unsigned long mfn, int nr,
  1853. pgprot_t prot, unsigned domid)
  1854. {
  1855. struct remap_data rmd;
  1856. struct mmu_update mmu_update[REMAP_BATCH_SIZE];
  1857. int batch;
  1858. unsigned long range;
  1859. int err = 0;
  1860. prot = __pgprot(pgprot_val(prot) | _PAGE_IOMAP);
  1861. BUG_ON(!((vma->vm_flags & (VM_PFNMAP | VM_RESERVED | VM_IO)) ==
  1862. (VM_PFNMAP | VM_RESERVED | VM_IO)));
  1863. rmd.mfn = mfn;
  1864. rmd.prot = prot;
  1865. while (nr) {
  1866. batch = min(REMAP_BATCH_SIZE, nr);
  1867. range = (unsigned long)batch << PAGE_SHIFT;
  1868. rmd.mmu_update = mmu_update;
  1869. err = apply_to_page_range(vma->vm_mm, addr, range,
  1870. remap_area_mfn_pte_fn, &rmd);
  1871. if (err)
  1872. goto out;
  1873. err = -EFAULT;
  1874. if (HYPERVISOR_mmu_update(mmu_update, batch, NULL, domid) < 0)
  1875. goto out;
  1876. nr -= batch;
  1877. addr += range;
  1878. }
  1879. err = 0;
  1880. out:
  1881. flush_tlb_all();
  1882. return err;
  1883. }
  1884. EXPORT_SYMBOL_GPL(xen_remap_domain_mfn_range);
  1885. #ifdef CONFIG_XEN_DEBUG_FS
  1886. static int p2m_dump_open(struct inode *inode, struct file *filp)
  1887. {
  1888. return single_open(filp, p2m_dump_show, NULL);
  1889. }
  1890. static const struct file_operations p2m_dump_fops = {
  1891. .open = p2m_dump_open,
  1892. .read = seq_read,
  1893. .llseek = seq_lseek,
  1894. .release = single_release,
  1895. };
  1896. #endif /* CONFIG_XEN_DEBUG_FS */