pci-dma.c 6.2 KB

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  1. #include <linux/dma-mapping.h>
  2. #include <linux/dma-debug.h>
  3. #include <linux/dmar.h>
  4. #include <linux/bootmem.h>
  5. #include <linux/gfp.h>
  6. #include <linux/pci.h>
  7. #include <linux/kmemleak.h>
  8. #include <asm/proto.h>
  9. #include <asm/dma.h>
  10. #include <asm/iommu.h>
  11. #include <asm/gart.h>
  12. #include <asm/calgary.h>
  13. #include <asm/x86_init.h>
  14. #include <asm/iommu_table.h>
  15. static int forbid_dac __read_mostly;
  16. struct dma_map_ops *dma_ops = &nommu_dma_ops;
  17. EXPORT_SYMBOL(dma_ops);
  18. static int iommu_sac_force __read_mostly;
  19. #ifdef CONFIG_IOMMU_DEBUG
  20. int panic_on_overflow __read_mostly = 1;
  21. int force_iommu __read_mostly = 1;
  22. #else
  23. int panic_on_overflow __read_mostly = 0;
  24. int force_iommu __read_mostly = 0;
  25. #endif
  26. int iommu_merge __read_mostly = 0;
  27. int no_iommu __read_mostly;
  28. /* Set this to 1 if there is a HW IOMMU in the system */
  29. int iommu_detected __read_mostly = 0;
  30. /*
  31. * This variable becomes 1 if iommu=pt is passed on the kernel command line.
  32. * If this variable is 1, IOMMU implementations do no DMA translation for
  33. * devices and allow every device to access to whole physical memory. This is
  34. * useful if a user wants to use an IOMMU only for KVM device assignment to
  35. * guests and not for driver dma translation.
  36. */
  37. int iommu_pass_through __read_mostly;
  38. extern struct iommu_table_entry __iommu_table[], __iommu_table_end[];
  39. /* Dummy device used for NULL arguments (normally ISA). */
  40. struct device x86_dma_fallback_dev = {
  41. .init_name = "fallback device",
  42. .coherent_dma_mask = ISA_DMA_BIT_MASK,
  43. .dma_mask = &x86_dma_fallback_dev.coherent_dma_mask,
  44. };
  45. EXPORT_SYMBOL(x86_dma_fallback_dev);
  46. /* Number of entries preallocated for DMA-API debugging */
  47. #define PREALLOC_DMA_DEBUG_ENTRIES 32768
  48. int dma_set_mask(struct device *dev, u64 mask)
  49. {
  50. if (!dev->dma_mask || !dma_supported(dev, mask))
  51. return -EIO;
  52. *dev->dma_mask = mask;
  53. return 0;
  54. }
  55. EXPORT_SYMBOL(dma_set_mask);
  56. void __init pci_iommu_alloc(void)
  57. {
  58. struct iommu_table_entry *p;
  59. sort_iommu_table(__iommu_table, __iommu_table_end);
  60. check_iommu_entries(__iommu_table, __iommu_table_end);
  61. for (p = __iommu_table; p < __iommu_table_end; p++) {
  62. if (p && p->detect && p->detect() > 0) {
  63. p->flags |= IOMMU_DETECTED;
  64. if (p->early_init)
  65. p->early_init();
  66. if (p->flags & IOMMU_FINISH_IF_DETECTED)
  67. break;
  68. }
  69. }
  70. }
  71. void *dma_generic_alloc_coherent(struct device *dev, size_t size,
  72. dma_addr_t *dma_addr, gfp_t flag)
  73. {
  74. unsigned long dma_mask;
  75. struct page *page;
  76. dma_addr_t addr;
  77. dma_mask = dma_alloc_coherent_mask(dev, flag);
  78. flag |= __GFP_ZERO;
  79. again:
  80. page = alloc_pages_node(dev_to_node(dev), flag, get_order(size));
  81. if (!page)
  82. return NULL;
  83. addr = page_to_phys(page);
  84. if (addr + size > dma_mask) {
  85. __free_pages(page, get_order(size));
  86. if (dma_mask < DMA_BIT_MASK(32) && !(flag & GFP_DMA)) {
  87. flag = (flag & ~GFP_DMA32) | GFP_DMA;
  88. goto again;
  89. }
  90. return NULL;
  91. }
  92. *dma_addr = addr;
  93. return page_address(page);
  94. }
  95. /*
  96. * See <Documentation/x86_64/boot-options.txt> for the iommu kernel parameter
  97. * documentation.
  98. */
  99. static __init int iommu_setup(char *p)
  100. {
  101. iommu_merge = 1;
  102. if (!p)
  103. return -EINVAL;
  104. while (*p) {
  105. if (!strncmp(p, "off", 3))
  106. no_iommu = 1;
  107. /* gart_parse_options has more force support */
  108. if (!strncmp(p, "force", 5))
  109. force_iommu = 1;
  110. if (!strncmp(p, "noforce", 7)) {
  111. iommu_merge = 0;
  112. force_iommu = 0;
  113. }
  114. if (!strncmp(p, "biomerge", 8)) {
  115. iommu_merge = 1;
  116. force_iommu = 1;
  117. }
  118. if (!strncmp(p, "panic", 5))
  119. panic_on_overflow = 1;
  120. if (!strncmp(p, "nopanic", 7))
  121. panic_on_overflow = 0;
  122. if (!strncmp(p, "merge", 5)) {
  123. iommu_merge = 1;
  124. force_iommu = 1;
  125. }
  126. if (!strncmp(p, "nomerge", 7))
  127. iommu_merge = 0;
  128. if (!strncmp(p, "forcesac", 8))
  129. iommu_sac_force = 1;
  130. if (!strncmp(p, "allowdac", 8))
  131. forbid_dac = 0;
  132. if (!strncmp(p, "nodac", 5))
  133. forbid_dac = 1;
  134. if (!strncmp(p, "usedac", 6)) {
  135. forbid_dac = -1;
  136. return 1;
  137. }
  138. #ifdef CONFIG_SWIOTLB
  139. if (!strncmp(p, "soft", 4))
  140. swiotlb = 1;
  141. #endif
  142. if (!strncmp(p, "pt", 2))
  143. iommu_pass_through = 1;
  144. gart_parse_options(p);
  145. #ifdef CONFIG_CALGARY_IOMMU
  146. if (!strncmp(p, "calgary", 7))
  147. use_calgary = 1;
  148. #endif /* CONFIG_CALGARY_IOMMU */
  149. p += strcspn(p, ",");
  150. if (*p == ',')
  151. ++p;
  152. }
  153. return 0;
  154. }
  155. early_param("iommu", iommu_setup);
  156. int dma_supported(struct device *dev, u64 mask)
  157. {
  158. struct dma_map_ops *ops = get_dma_ops(dev);
  159. #ifdef CONFIG_PCI
  160. if (mask > 0xffffffff && forbid_dac > 0) {
  161. dev_info(dev, "PCI: Disallowing DAC for device\n");
  162. return 0;
  163. }
  164. #endif
  165. if (ops->dma_supported)
  166. return ops->dma_supported(dev, mask);
  167. /* Copied from i386. Doesn't make much sense, because it will
  168. only work for pci_alloc_coherent.
  169. The caller just has to use GFP_DMA in this case. */
  170. if (mask < DMA_BIT_MASK(24))
  171. return 0;
  172. /* Tell the device to use SAC when IOMMU force is on. This
  173. allows the driver to use cheaper accesses in some cases.
  174. Problem with this is that if we overflow the IOMMU area and
  175. return DAC as fallback address the device may not handle it
  176. correctly.
  177. As a special case some controllers have a 39bit address
  178. mode that is as efficient as 32bit (aic79xx). Don't force
  179. SAC for these. Assume all masks <= 40 bits are of this
  180. type. Normally this doesn't make any difference, but gives
  181. more gentle handling of IOMMU overflow. */
  182. if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
  183. dev_info(dev, "Force SAC with mask %Lx\n", mask);
  184. return 0;
  185. }
  186. return 1;
  187. }
  188. EXPORT_SYMBOL(dma_supported);
  189. static int __init pci_iommu_init(void)
  190. {
  191. struct iommu_table_entry *p;
  192. dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
  193. #ifdef CONFIG_PCI
  194. dma_debug_add_bus(&pci_bus_type);
  195. #endif
  196. x86_init.iommu.iommu_init();
  197. for (p = __iommu_table; p < __iommu_table_end; p++) {
  198. if (p && (p->flags & IOMMU_DETECTED) && p->late_init)
  199. p->late_init();
  200. }
  201. return 0;
  202. }
  203. /* Must execute after PCI subsystem */
  204. rootfs_initcall(pci_iommu_init);
  205. #ifdef CONFIG_PCI
  206. /* Many VIA bridges seem to corrupt data for DAC. Disable it here */
  207. static __devinit void via_no_dac(struct pci_dev *dev)
  208. {
  209. if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
  210. dev_info(&dev->dev, "disabling DAC on VIA PCI bridge\n");
  211. forbid_dac = 1;
  212. }
  213. }
  214. DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, via_no_dac);
  215. #endif