mpc85xx_ads.c 6.6 KB

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  1. /*
  2. * MPC85xx setup and early boot code plus other random bits.
  3. *
  4. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5. *
  6. * Copyright 2005 Freescale Semiconductor Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/stddef.h>
  14. #include <linux/kernel.h>
  15. #include <linux/pci.h>
  16. #include <linux/kdev_t.h>
  17. #include <linux/delay.h>
  18. #include <linux/seq_file.h>
  19. #include <linux/of_platform.h>
  20. #include <asm/system.h>
  21. #include <asm/time.h>
  22. #include <asm/machdep.h>
  23. #include <asm/pci-bridge.h>
  24. #include <asm/mpic.h>
  25. #include <mm/mmu_decl.h>
  26. #include <asm/udbg.h>
  27. #include <sysdev/fsl_soc.h>
  28. #include <sysdev/fsl_pci.h>
  29. #ifdef CONFIG_CPM2
  30. #include <asm/cpm2.h>
  31. #include <sysdev/cpm2_pic.h>
  32. #endif
  33. #ifdef CONFIG_PCI
  34. static int mpc85xx_exclude_device(struct pci_controller *hose,
  35. u_char bus, u_char devfn)
  36. {
  37. if (bus == 0 && PCI_SLOT(devfn) == 0)
  38. return PCIBIOS_DEVICE_NOT_FOUND;
  39. else
  40. return PCIBIOS_SUCCESSFUL;
  41. }
  42. #endif /* CONFIG_PCI */
  43. #ifdef CONFIG_CPM2
  44. static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
  45. {
  46. struct irq_chip *chip = irq_desc_get_chip(desc);
  47. int cascade_irq;
  48. while ((cascade_irq = cpm2_get_irq()) >= 0)
  49. generic_handle_irq(cascade_irq);
  50. chip->irq_eoi(&desc->irq_data);
  51. }
  52. #endif /* CONFIG_CPM2 */
  53. static void __init mpc85xx_ads_pic_init(void)
  54. {
  55. struct mpic *mpic;
  56. struct resource r;
  57. struct device_node *np = NULL;
  58. #ifdef CONFIG_CPM2
  59. int irq;
  60. #endif
  61. np = of_find_node_by_type(np, "open-pic");
  62. if (!np) {
  63. printk(KERN_ERR "Could not find open-pic node\n");
  64. return;
  65. }
  66. if (of_address_to_resource(np, 0, &r)) {
  67. printk(KERN_ERR "Could not map mpic register space\n");
  68. of_node_put(np);
  69. return;
  70. }
  71. mpic = mpic_alloc(np, r.start,
  72. MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
  73. 0, 256, " OpenPIC ");
  74. BUG_ON(mpic == NULL);
  75. of_node_put(np);
  76. mpic_init(mpic);
  77. #ifdef CONFIG_CPM2
  78. /* Setup CPM2 PIC */
  79. np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
  80. if (np == NULL) {
  81. printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
  82. return;
  83. }
  84. irq = irq_of_parse_and_map(np, 0);
  85. cpm2_pic_init(np);
  86. of_node_put(np);
  87. irq_set_chained_handler(irq, cpm2_cascade);
  88. #endif
  89. }
  90. /*
  91. * Setup the architecture
  92. */
  93. #ifdef CONFIG_CPM2
  94. struct cpm_pin {
  95. int port, pin, flags;
  96. };
  97. static const struct cpm_pin mpc8560_ads_pins[] = {
  98. /* SCC1 */
  99. {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  100. {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  101. {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  102. /* SCC2 */
  103. {2, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  104. {2, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  105. {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  106. {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  107. {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  108. /* FCC2 */
  109. {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  110. {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  111. {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  112. {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  113. {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  114. {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  115. {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  116. {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  117. {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  118. {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  119. {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  120. {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  121. {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  122. {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  123. {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
  124. {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
  125. /* FCC3 */
  126. {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  127. {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  128. {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  129. {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  130. {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  131. {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  132. {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  133. {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  134. {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  135. {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  136. {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  137. {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  138. {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
  139. {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK16 */
  140. {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK15 */
  141. {2, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
  142. };
  143. static void __init init_ioports(void)
  144. {
  145. int i;
  146. for (i = 0; i < ARRAY_SIZE(mpc8560_ads_pins); i++) {
  147. const struct cpm_pin *pin = &mpc8560_ads_pins[i];
  148. cpm2_set_pin(pin->port, pin->pin, pin->flags);
  149. }
  150. cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
  151. cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
  152. cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
  153. cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
  154. cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
  155. cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
  156. cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
  157. cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
  158. }
  159. #endif
  160. static void __init mpc85xx_ads_setup_arch(void)
  161. {
  162. #ifdef CONFIG_PCI
  163. struct device_node *np;
  164. #endif
  165. if (ppc_md.progress)
  166. ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
  167. #ifdef CONFIG_CPM2
  168. cpm2_reset();
  169. init_ioports();
  170. #endif
  171. #ifdef CONFIG_PCI
  172. for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
  173. fsl_add_bridge(np, 1);
  174. ppc_md.pci_exclude_device = mpc85xx_exclude_device;
  175. #endif
  176. }
  177. static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
  178. {
  179. uint pvid, svid, phid1;
  180. pvid = mfspr(SPRN_PVR);
  181. svid = mfspr(SPRN_SVR);
  182. seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
  183. seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
  184. seq_printf(m, "SVR\t\t: 0x%x\n", svid);
  185. /* Display cpu Pll setting */
  186. phid1 = mfspr(SPRN_HID1);
  187. seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
  188. }
  189. static struct of_device_id __initdata of_bus_ids[] = {
  190. { .name = "soc", },
  191. { .type = "soc", },
  192. { .name = "cpm", },
  193. { .name = "localbus", },
  194. { .compatible = "simple-bus", },
  195. { .compatible = "gianfar", },
  196. {},
  197. };
  198. static int __init declare_of_platform_devices(void)
  199. {
  200. of_platform_bus_probe(NULL, of_bus_ids, NULL);
  201. return 0;
  202. }
  203. machine_device_initcall(mpc85xx_ads, declare_of_platform_devices);
  204. /*
  205. * Called very early, device-tree isn't unflattened
  206. */
  207. static int __init mpc85xx_ads_probe(void)
  208. {
  209. unsigned long root = of_get_flat_dt_root();
  210. return of_flat_dt_is_compatible(root, "MPC85xxADS");
  211. }
  212. define_machine(mpc85xx_ads) {
  213. .name = "MPC85xx ADS",
  214. .probe = mpc85xx_ads_probe,
  215. .setup_arch = mpc85xx_ads_setup_arch,
  216. .init_IRQ = mpc85xx_ads_pic_init,
  217. .show_cpuinfo = mpc85xx_ads_show_cpuinfo,
  218. .get_irq = mpic_get_irq,
  219. .restart = fsl_rstcr_restart,
  220. .calibrate_decr = generic_calibrate_decr,
  221. .progress = udbg_progress,
  222. };