efika.c 5.9 KB

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  1. /*
  2. * Efika 5K2 platform code
  3. * Some code really inspired from the lite5200b platform.
  4. *
  5. * Copyright (C) 2006 bplan GmbH
  6. *
  7. * This file is licensed under the terms of the GNU General Public License
  8. * version 2. This program is licensed "as is" without any warranty of any
  9. * kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <generated/utsrelease.h>
  13. #include <linux/pci.h>
  14. #include <linux/of.h>
  15. #include <asm/prom.h>
  16. #include <asm/time.h>
  17. #include <asm/machdep.h>
  18. #include <asm/rtas.h>
  19. #include <asm/mpc52xx.h>
  20. #define EFIKA_PLATFORM_NAME "Efika"
  21. /* ------------------------------------------------------------------------ */
  22. /* PCI accesses thru RTAS */
  23. /* ------------------------------------------------------------------------ */
  24. #ifdef CONFIG_PCI
  25. /*
  26. * Access functions for PCI config space using RTAS calls.
  27. */
  28. static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
  29. int len, u32 * val)
  30. {
  31. struct pci_controller *hose = pci_bus_to_host(bus);
  32. unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
  33. | (((bus->number - hose->first_busno) & 0xff) << 16)
  34. | (hose->global_number << 24);
  35. int ret = -1;
  36. int rval;
  37. rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
  38. *val = ret;
  39. return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
  40. }
  41. static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
  42. int offset, int len, u32 val)
  43. {
  44. struct pci_controller *hose = pci_bus_to_host(bus);
  45. unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
  46. | (((bus->number - hose->first_busno) & 0xff) << 16)
  47. | (hose->global_number << 24);
  48. int rval;
  49. rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
  50. addr, len, val);
  51. return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
  52. }
  53. static struct pci_ops rtas_pci_ops = {
  54. .read = rtas_read_config,
  55. .write = rtas_write_config,
  56. };
  57. static void __init efika_pcisetup(void)
  58. {
  59. const int *bus_range;
  60. int len;
  61. struct pci_controller *hose;
  62. struct device_node *root;
  63. struct device_node *pcictrl;
  64. root = of_find_node_by_path("/");
  65. if (root == NULL) {
  66. printk(KERN_WARNING EFIKA_PLATFORM_NAME
  67. ": Unable to find the root node\n");
  68. return;
  69. }
  70. for (pcictrl = NULL;;) {
  71. pcictrl = of_get_next_child(root, pcictrl);
  72. if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0))
  73. break;
  74. }
  75. of_node_put(root);
  76. if (pcictrl == NULL) {
  77. printk(KERN_WARNING EFIKA_PLATFORM_NAME
  78. ": Unable to find the PCI bridge node\n");
  79. return;
  80. }
  81. bus_range = of_get_property(pcictrl, "bus-range", &len);
  82. if (bus_range == NULL || len < 2 * sizeof(int)) {
  83. printk(KERN_WARNING EFIKA_PLATFORM_NAME
  84. ": Can't get bus-range for %s\n", pcictrl->full_name);
  85. goto out_put;
  86. }
  87. if (bus_range[1] == bus_range[0])
  88. printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d",
  89. bus_range[0]);
  90. else
  91. printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d",
  92. bus_range[0], bus_range[1]);
  93. printk(" controlled by %s\n", pcictrl->full_name);
  94. printk("\n");
  95. hose = pcibios_alloc_controller(pcictrl);
  96. if (!hose) {
  97. printk(KERN_WARNING EFIKA_PLATFORM_NAME
  98. ": Can't allocate PCI controller structure for %s\n",
  99. pcictrl->full_name);
  100. goto out_put;
  101. }
  102. hose->first_busno = bus_range[0];
  103. hose->last_busno = bus_range[1];
  104. hose->ops = &rtas_pci_ops;
  105. pci_process_bridge_OF_ranges(hose, pcictrl, 0);
  106. return;
  107. out_put:
  108. of_node_put(pcictrl);
  109. }
  110. #else
  111. static void __init efika_pcisetup(void)
  112. {}
  113. #endif
  114. /* ------------------------------------------------------------------------ */
  115. /* Platform setup */
  116. /* ------------------------------------------------------------------------ */
  117. static void efika_show_cpuinfo(struct seq_file *m)
  118. {
  119. struct device_node *root;
  120. const char *revision;
  121. const char *codegendescription;
  122. const char *codegenvendor;
  123. root = of_find_node_by_path("/");
  124. if (!root)
  125. return;
  126. revision = of_get_property(root, "revision", NULL);
  127. codegendescription = of_get_property(root, "CODEGEN,description", NULL);
  128. codegenvendor = of_get_property(root, "CODEGEN,vendor", NULL);
  129. if (codegendescription)
  130. seq_printf(m, "machine\t\t: %s\n", codegendescription);
  131. else
  132. seq_printf(m, "machine\t\t: Efika\n");
  133. if (revision)
  134. seq_printf(m, "revision\t: %s\n", revision);
  135. if (codegenvendor)
  136. seq_printf(m, "vendor\t\t: %s\n", codegenvendor);
  137. of_node_put(root);
  138. }
  139. #ifdef CONFIG_PM
  140. static void efika_suspend_prepare(void __iomem *mbar)
  141. {
  142. u8 pin = 4; /* GPIO_WKUP_4 (GPIO_PSC6_0 - IRDA_RX) */
  143. u8 level = 1; /* wakeup on high level */
  144. /* IOW. to wake it up, short pins 1 and 3 on IRDA connector */
  145. mpc52xx_set_wakeup_gpio(pin, level);
  146. }
  147. #endif
  148. static void __init efika_setup_arch(void)
  149. {
  150. rtas_initialize();
  151. /* Map important registers from the internal memory map */
  152. mpc52xx_map_common_devices();
  153. efika_pcisetup();
  154. #ifdef CONFIG_PM
  155. mpc52xx_suspend.board_suspend_prepare = efika_suspend_prepare;
  156. mpc52xx_pm_init();
  157. #endif
  158. if (ppc_md.progress)
  159. ppc_md.progress("Linux/PPC " UTS_RELEASE " running on Efika ;-)\n", 0x0);
  160. }
  161. static int __init efika_probe(void)
  162. {
  163. char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
  164. "model", NULL);
  165. if (model == NULL)
  166. return 0;
  167. if (strcmp(model, "EFIKA5K2"))
  168. return 0;
  169. ISA_DMA_THRESHOLD = ~0L;
  170. DMA_MODE_READ = 0x44;
  171. DMA_MODE_WRITE = 0x48;
  172. return 1;
  173. }
  174. define_machine(efika)
  175. {
  176. .name = EFIKA_PLATFORM_NAME,
  177. .probe = efika_probe,
  178. .setup_arch = efika_setup_arch,
  179. .init = mpc52xx_declare_of_platform_devices,
  180. .show_cpuinfo = efika_show_cpuinfo,
  181. .init_IRQ = mpc52xx_init_irq,
  182. .get_irq = mpc52xx_get_irq,
  183. .restart = rtas_restart,
  184. .power_off = rtas_power_off,
  185. .halt = rtas_halt,
  186. .set_rtc_time = rtas_set_rtc_time,
  187. .get_rtc_time = rtas_get_rtc_time,
  188. .progress = rtas_progress,
  189. .get_boot_time = rtas_get_boot_time,
  190. .calibrate_decr = generic_calibrate_decr,
  191. #ifdef CONFIG_PCI
  192. .phys_mem_access_prot = pci_phys_mem_access_prot,
  193. #endif
  194. };