sequoia.dts 10 KB

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  1. /*
  2. * Device Tree Source for AMCC Sequoia
  3. *
  4. * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
  5. * Copyright (c) 2006, 2007 IBM Corp.
  6. *
  7. * FIXME: Draft only!
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without
  11. * any warranty of any kind, whether express or implied.
  12. *
  13. */
  14. /dts-v1/;
  15. / {
  16. #address-cells = <2>;
  17. #size-cells = <1>;
  18. model = "amcc,sequoia";
  19. compatible = "amcc,sequoia";
  20. dcr-parent = <&{/cpus/cpu@0}>;
  21. aliases {
  22. ethernet0 = &EMAC0;
  23. ethernet1 = &EMAC1;
  24. serial0 = &UART0;
  25. serial1 = &UART1;
  26. serial2 = &UART2;
  27. serial3 = &UART3;
  28. };
  29. cpus {
  30. #address-cells = <1>;
  31. #size-cells = <0>;
  32. cpu@0 {
  33. device_type = "cpu";
  34. model = "PowerPC,440EPx";
  35. reg = <0x00000000>;
  36. clock-frequency = <0>; /* Filled in by zImage */
  37. timebase-frequency = <0>; /* Filled in by zImage */
  38. i-cache-line-size = <32>;
  39. d-cache-line-size = <32>;
  40. i-cache-size = <32768>;
  41. d-cache-size = <32768>;
  42. dcr-controller;
  43. dcr-access-method = "native";
  44. };
  45. };
  46. memory {
  47. device_type = "memory";
  48. reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
  49. };
  50. UIC0: interrupt-controller0 {
  51. compatible = "ibm,uic-440epx","ibm,uic";
  52. interrupt-controller;
  53. cell-index = <0>;
  54. dcr-reg = <0x0c0 0x009>;
  55. #address-cells = <0>;
  56. #size-cells = <0>;
  57. #interrupt-cells = <2>;
  58. };
  59. UIC1: interrupt-controller1 {
  60. compatible = "ibm,uic-440epx","ibm,uic";
  61. interrupt-controller;
  62. cell-index = <1>;
  63. dcr-reg = <0x0d0 0x009>;
  64. #address-cells = <0>;
  65. #size-cells = <0>;
  66. #interrupt-cells = <2>;
  67. interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  68. interrupt-parent = <&UIC0>;
  69. };
  70. UIC2: interrupt-controller2 {
  71. compatible = "ibm,uic-440epx","ibm,uic";
  72. interrupt-controller;
  73. cell-index = <2>;
  74. dcr-reg = <0x0e0 0x009>;
  75. #address-cells = <0>;
  76. #size-cells = <0>;
  77. #interrupt-cells = <2>;
  78. interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
  79. interrupt-parent = <&UIC0>;
  80. };
  81. SDR0: sdr {
  82. compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
  83. dcr-reg = <0x00e 0x002>;
  84. };
  85. CPR0: cpr {
  86. compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
  87. dcr-reg = <0x00c 0x002>;
  88. };
  89. plb {
  90. compatible = "ibm,plb-440epx", "ibm,plb4";
  91. #address-cells = <2>;
  92. #size-cells = <1>;
  93. ranges;
  94. clock-frequency = <0>; /* Filled in by zImage */
  95. SDRAM0: sdram {
  96. compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
  97. dcr-reg = <0x010 0x002>;
  98. };
  99. DMA0: dma {
  100. compatible = "ibm,dma-440epx", "ibm,dma-4xx";
  101. dcr-reg = <0x100 0x027>;
  102. };
  103. MAL0: mcmal {
  104. compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
  105. dcr-reg = <0x180 0x062>;
  106. num-tx-chans = <2>;
  107. num-rx-chans = <2>;
  108. interrupt-parent = <&MAL0>;
  109. interrupts = <0x0 0x1 0x2 0x3 0x4>;
  110. #interrupt-cells = <1>;
  111. #address-cells = <0>;
  112. #size-cells = <0>;
  113. interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
  114. /*RXEOB*/ 0x1 &UIC0 0xb 0x4
  115. /*SERR*/ 0x2 &UIC1 0x0 0x4
  116. /*TXDE*/ 0x3 &UIC1 0x1 0x4
  117. /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
  118. interrupt-map-mask = <0xffffffff>;
  119. };
  120. USB1: usb@e0000400 {
  121. compatible = "ibm,usb-ohci-440epx", "ohci-be";
  122. reg = <0x00000000 0xe0000400 0x00000060>;
  123. interrupt-parent = <&UIC0>;
  124. interrupts = <0x15 0x8>;
  125. };
  126. USB0: ehci@e0000300 {
  127. compatible = "ibm,usb-ehci-440epx", "usb-ehci";
  128. interrupt-parent = <&UIC0>;
  129. interrupts = <0x1a 0x4>;
  130. reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>;
  131. big-endian;
  132. };
  133. POB0: opb {
  134. compatible = "ibm,opb-440epx", "ibm,opb";
  135. #address-cells = <1>;
  136. #size-cells = <1>;
  137. ranges = <0x00000000 0x00000001 0x00000000 0x80000000
  138. 0x80000000 0x00000001 0x80000000 0x80000000>;
  139. interrupt-parent = <&UIC1>;
  140. interrupts = <0x7 0x4>;
  141. clock-frequency = <0>; /* Filled in by zImage */
  142. EBC0: ebc {
  143. compatible = "ibm,ebc-440epx", "ibm,ebc";
  144. dcr-reg = <0x012 0x002>;
  145. #address-cells = <2>;
  146. #size-cells = <1>;
  147. clock-frequency = <0>; /* Filled in by zImage */
  148. interrupts = <0x5 0x1>;
  149. interrupt-parent = <&UIC1>;
  150. nor_flash@0,0 {
  151. compatible = "amd,s29gl256n", "cfi-flash";
  152. bank-width = <2>;
  153. reg = <0x00000000 0x00000000 0x04000000>;
  154. #address-cells = <1>;
  155. #size-cells = <1>;
  156. partition@0 {
  157. label = "Kernel";
  158. reg = <0x00000000 0x00180000>;
  159. };
  160. partition@180000 {
  161. label = "ramdisk";
  162. reg = <0x00180000 0x00200000>;
  163. };
  164. partition@380000 {
  165. label = "file system";
  166. reg = <0x00380000 0x03aa0000>;
  167. };
  168. partition@3e20000 {
  169. label = "kozio";
  170. reg = <0x03e20000 0x00140000>;
  171. };
  172. partition@3f60000 {
  173. label = "env";
  174. reg = <0x03f60000 0x00040000>;
  175. };
  176. partition@3fa0000 {
  177. label = "u-boot";
  178. reg = <0x03fa0000 0x00060000>;
  179. };
  180. };
  181. ndfc@3,0 {
  182. compatible = "ibm,ndfc";
  183. reg = <0x00000003 0x00000000 0x00002000>;
  184. ccr = <0x00001000>;
  185. bank-settings = <0x80002222>;
  186. #address-cells = <1>;
  187. #size-cells = <1>;
  188. nand {
  189. #address-cells = <1>;
  190. #size-cells = <1>;
  191. partition@0 {
  192. label = "u-boot";
  193. reg = <0x00000000 0x00084000>;
  194. };
  195. partition@84000 {
  196. label = "user";
  197. reg = <0x00000000 0x01f7c000>;
  198. };
  199. };
  200. };
  201. };
  202. UART0: serial@ef600300 {
  203. device_type = "serial";
  204. compatible = "ns16550";
  205. reg = <0xef600300 0x00000008>;
  206. virtual-reg = <0xef600300>;
  207. clock-frequency = <0>; /* Filled in by zImage */
  208. current-speed = <115200>;
  209. interrupt-parent = <&UIC0>;
  210. interrupts = <0x0 0x4>;
  211. };
  212. UART1: serial@ef600400 {
  213. device_type = "serial";
  214. compatible = "ns16550";
  215. reg = <0xef600400 0x00000008>;
  216. virtual-reg = <0xef600400>;
  217. clock-frequency = <0>;
  218. current-speed = <0>;
  219. interrupt-parent = <&UIC0>;
  220. interrupts = <0x1 0x4>;
  221. };
  222. UART2: serial@ef600500 {
  223. device_type = "serial";
  224. compatible = "ns16550";
  225. reg = <0xef600500 0x00000008>;
  226. virtual-reg = <0xef600500>;
  227. clock-frequency = <0>;
  228. current-speed = <0>;
  229. interrupt-parent = <&UIC1>;
  230. interrupts = <0x3 0x4>;
  231. };
  232. UART3: serial@ef600600 {
  233. device_type = "serial";
  234. compatible = "ns16550";
  235. reg = <0xef600600 0x00000008>;
  236. virtual-reg = <0xef600600>;
  237. clock-frequency = <0>;
  238. current-speed = <0>;
  239. interrupt-parent = <&UIC1>;
  240. interrupts = <0x4 0x4>;
  241. };
  242. IIC0: i2c@ef600700 {
  243. #address-cells = <1>;
  244. #size-cells = <0>;
  245. compatible = "ibm,iic-440epx", "ibm,iic";
  246. reg = <0xef600700 0x00000014>;
  247. interrupt-parent = <&UIC0>;
  248. interrupts = <0x2 0x4>;
  249. hwmon@48 {
  250. compatible = "adi,ad7414";
  251. reg = <0x48>;
  252. };
  253. };
  254. IIC1: i2c@ef600800 {
  255. #address-cells = <1>;
  256. #size-cells = <0>;
  257. compatible = "ibm,iic-440epx", "ibm,iic";
  258. reg = <0xef600800 0x00000014>;
  259. interrupt-parent = <&UIC0>;
  260. interrupts = <0x7 0x4>;
  261. };
  262. ZMII0: emac-zmii@ef600d00 {
  263. compatible = "ibm,zmii-440epx", "ibm,zmii";
  264. reg = <0xef600d00 0x0000000c>;
  265. };
  266. RGMII0: emac-rgmii@ef601000 {
  267. compatible = "ibm,rgmii-440epx", "ibm,rgmii";
  268. reg = <0xef601000 0x00000008>;
  269. has-mdio;
  270. };
  271. EMAC0: ethernet@ef600e00 {
  272. device_type = "network";
  273. compatible = "ibm,emac-440epx", "ibm,emac4";
  274. interrupt-parent = <&EMAC0>;
  275. interrupts = <0x0 0x1>;
  276. #interrupt-cells = <1>;
  277. #address-cells = <0>;
  278. #size-cells = <0>;
  279. interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
  280. /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
  281. reg = <0xef600e00 0x00000074>;
  282. local-mac-address = [000000000000];
  283. mal-device = <&MAL0>;
  284. mal-tx-channel = <0>;
  285. mal-rx-channel = <0>;
  286. cell-index = <0>;
  287. max-frame-size = <9000>;
  288. rx-fifo-size = <4096>;
  289. tx-fifo-size = <2048>;
  290. phy-mode = "rgmii";
  291. phy-map = <0x00000000>;
  292. zmii-device = <&ZMII0>;
  293. zmii-channel = <0>;
  294. rgmii-device = <&RGMII0>;
  295. rgmii-channel = <0>;
  296. has-inverted-stacr-oc;
  297. has-new-stacr-staopc;
  298. };
  299. EMAC1: ethernet@ef600f00 {
  300. device_type = "network";
  301. compatible = "ibm,emac-440epx", "ibm,emac4";
  302. interrupt-parent = <&EMAC1>;
  303. interrupts = <0x0 0x1>;
  304. #interrupt-cells = <1>;
  305. #address-cells = <0>;
  306. #size-cells = <0>;
  307. interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
  308. /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
  309. reg = <0xef600f00 0x00000074>;
  310. local-mac-address = [000000000000];
  311. mal-device = <&MAL0>;
  312. mal-tx-channel = <1>;
  313. mal-rx-channel = <1>;
  314. cell-index = <1>;
  315. max-frame-size = <9000>;
  316. rx-fifo-size = <4096>;
  317. tx-fifo-size = <2048>;
  318. phy-mode = "rgmii";
  319. phy-map = <0x00000000>;
  320. zmii-device = <&ZMII0>;
  321. zmii-channel = <1>;
  322. rgmii-device = <&RGMII0>;
  323. rgmii-channel = <1>;
  324. has-inverted-stacr-oc;
  325. has-new-stacr-staopc;
  326. };
  327. };
  328. PCI0: pci@1ec000000 {
  329. device_type = "pci";
  330. #interrupt-cells = <1>;
  331. #size-cells = <2>;
  332. #address-cells = <3>;
  333. compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
  334. primary;
  335. reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
  336. 0x00000001 0xeed00000 0x00000004 /* IACK */
  337. 0x00000001 0xeed00000 0x00000004 /* Special cycle */
  338. 0x00000001 0xef400000 0x00000040>; /* Internal registers */
  339. /* Outbound ranges, one memory and one IO,
  340. * later cannot be changed. Chip supports a second
  341. * IO range but we don't use it for now
  342. * From the 440EPx user manual:
  343. * PCI 1 Memory 1 8000 0000 1 BFFF FFFF 1GB
  344. * I/O 1 E800 0000 1 E800 FFFF 64KB
  345. * I/O 1 E880 0000 1 EBFF FFFF 56MB
  346. */
  347. ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000
  348. 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000
  349. 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>;
  350. /* Inbound 2GB range starting at 0 */
  351. dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
  352. /* All PCI interrupts are routed to IRQ 67 */
  353. interrupt-map-mask = <0x0 0x0 0x0 0x0>;
  354. interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
  355. };
  356. };
  357. chosen {
  358. linux,stdout-path = "/plb/opb/serial@ef600300";
  359. bootargs = "console=ttyS0,115200";
  360. };
  361. };