p2020rdb_camp_core0.dts 3.8 KB

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  1. /*
  2. * P2020 RDB Core0 Device Tree Source in CAMP mode.
  3. *
  4. * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
  5. * can be shared, all the other devices must be assigned to one core only.
  6. * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb,
  7. * eth1, eth2, sdhc, crypto, global-util, pci0.
  8. *
  9. * Copyright 2009-2011 Freescale Semiconductor Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify it
  12. * under the terms of the GNU General Public License as published by the
  13. * Free Software Foundation; either version 2 of the License, or (at your
  14. * option) any later version.
  15. */
  16. /include/ "p2020si.dtsi"
  17. / {
  18. model = "fsl,P2020RDB";
  19. compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP";
  20. aliases {
  21. ethernet1 = &enet1;
  22. ethernet2 = &enet2;
  23. serial0 = &serial0;
  24. pci0 = &pci0;
  25. };
  26. cpus {
  27. PowerPC,P2020@1 {
  28. status = "disabled";
  29. };
  30. };
  31. memory {
  32. device_type = "memory";
  33. };
  34. localbus@ffe05000 {
  35. status = "disabled";
  36. };
  37. soc@ffe00000 {
  38. i2c@3000 {
  39. rtc@68 {
  40. compatible = "dallas,ds1339";
  41. reg = <0x68>;
  42. };
  43. };
  44. serial1: serial@4600 {
  45. status = "disabled";
  46. };
  47. spi@7000 {
  48. fsl_m25p80@0 {
  49. #address-cells = <1>;
  50. #size-cells = <1>;
  51. compatible = "fsl,espi-flash";
  52. reg = <0>;
  53. linux,modalias = "fsl_m25p80";
  54. modal = "s25sl128b";
  55. spi-max-frequency = <50000000>;
  56. mode = <0>;
  57. partition@0 {
  58. /* 512KB for u-boot Bootloader Image */
  59. reg = <0x0 0x00080000>;
  60. label = "SPI (RO) U-Boot Image";
  61. read-only;
  62. };
  63. partition@80000 {
  64. /* 512KB for DTB Image */
  65. reg = <0x00080000 0x00080000>;
  66. label = "SPI (RO) DTB Image";
  67. read-only;
  68. };
  69. partition@100000 {
  70. /* 4MB for Linux Kernel Image */
  71. reg = <0x00100000 0x00400000>;
  72. label = "SPI (RO) Linux Kernel Image";
  73. read-only;
  74. };
  75. partition@500000 {
  76. /* 4MB for Compressed RFS Image */
  77. reg = <0x00500000 0x00400000>;
  78. label = "SPI (RO) Compressed RFS Image";
  79. read-only;
  80. };
  81. partition@900000 {
  82. /* 7MB for JFFS2 based RFS */
  83. reg = <0x00900000 0x00700000>;
  84. label = "SPI (RW) JFFS2 RFS";
  85. };
  86. };
  87. };
  88. dma@c300 {
  89. status = "disabled";
  90. };
  91. usb@22000 {
  92. phy_type = "ulpi";
  93. };
  94. mdio@24520 {
  95. phy0: ethernet-phy@0 {
  96. interrupt-parent = <&mpic>;
  97. interrupts = <3 1>;
  98. reg = <0x0>;
  99. };
  100. phy1: ethernet-phy@1 {
  101. interrupt-parent = <&mpic>;
  102. interrupts = <3 1>;
  103. reg = <0x1>;
  104. };
  105. };
  106. mdio@25520 {
  107. tbi0: tbi-phy@11 {
  108. reg = <0x11>;
  109. device_type = "tbi-phy";
  110. };
  111. };
  112. mdio@26520 {
  113. status = "disabled";
  114. };
  115. enet0: ethernet@24000 {
  116. status = "disabled";
  117. };
  118. enet1: ethernet@25000 {
  119. tbi-handle = <&tbi0>;
  120. phy-handle = <&phy0>;
  121. phy-connection-type = "sgmii";
  122. };
  123. enet2: ethernet@26000 {
  124. phy-handle = <&phy1>;
  125. phy-connection-type = "rgmii-id";
  126. };
  127. mpic: pic@40000 {
  128. protected-sources = <
  129. 42 76 77 78 79 /* serial1 , dma2 */
  130. 29 30 34 26 /* enet0, pci1 */
  131. 0xe0 0xe1 0xe2 0xe3 /* msi */
  132. 0xe4 0xe5 0xe6 0xe7
  133. >;
  134. };
  135. msi@41600 {
  136. status = "disabled";
  137. };
  138. };
  139. pci0: pcie@ffe08000 {
  140. status = "disabled";
  141. };
  142. pci1: pcie@ffe09000 {
  143. ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
  144. 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
  145. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  146. interrupt-map = <
  147. /* IDSEL 0x0 */
  148. 0000 0x0 0x0 0x1 &mpic 0x4 0x1
  149. 0000 0x0 0x0 0x2 &mpic 0x5 0x1
  150. 0000 0x0 0x0 0x3 &mpic 0x6 0x1
  151. 0000 0x0 0x0 0x4 &mpic 0x7 0x1
  152. >;
  153. pcie@0 {
  154. reg = <0x0 0x0 0x0 0x0 0x0>;
  155. #size-cells = <2>;
  156. #address-cells = <3>;
  157. device_type = "pci";
  158. ranges = <0x2000000 0x0 0xa0000000
  159. 0x2000000 0x0 0xa0000000
  160. 0x0 0x20000000
  161. 0x1000000 0x0 0x0
  162. 0x1000000 0x0 0x0
  163. 0x0 0x100000>;
  164. };
  165. };
  166. pci2: pcie@ffe0a000 {
  167. status = "disabled";
  168. };
  169. };