config.c 3.2 KB

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  1. /***************************************************************************/
  2. /*
  3. * linux/arch/m68knommu/platform/5407/config.c
  4. *
  5. * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
  6. * Copyright (C) 2000, Lineo (www.lineo.com)
  7. */
  8. /***************************************************************************/
  9. #include <linux/kernel.h>
  10. #include <linux/param.h>
  11. #include <linux/init.h>
  12. #include <linux/io.h>
  13. #include <asm/machdep.h>
  14. #include <asm/coldfire.h>
  15. #include <asm/mcfsim.h>
  16. #include <asm/mcfuart.h>
  17. /***************************************************************************/
  18. static struct mcf_platform_uart m5407_uart_platform[] = {
  19. {
  20. .mapbase = MCF_MBAR + MCFUART_BASE1,
  21. .irq = 73,
  22. },
  23. {
  24. .mapbase = MCF_MBAR + MCFUART_BASE2,
  25. .irq = 74,
  26. },
  27. { },
  28. };
  29. static struct platform_device m5407_uart = {
  30. .name = "mcfuart",
  31. .id = 0,
  32. .dev.platform_data = m5407_uart_platform,
  33. };
  34. static struct platform_device *m5407_devices[] __initdata = {
  35. &m5407_uart,
  36. };
  37. /***************************************************************************/
  38. static void __init m5407_uart_init_line(int line, int irq)
  39. {
  40. if (line == 0) {
  41. writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
  42. writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
  43. mcf_mapirq2imr(irq, MCFINTC_UART0);
  44. } else if (line == 1) {
  45. writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
  46. writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
  47. mcf_mapirq2imr(irq, MCFINTC_UART1);
  48. }
  49. }
  50. static void __init m5407_uarts_init(void)
  51. {
  52. const int nrlines = ARRAY_SIZE(m5407_uart_platform);
  53. int line;
  54. for (line = 0; (line < nrlines); line++)
  55. m5407_uart_init_line(line, m5407_uart_platform[line].irq);
  56. }
  57. /***************************************************************************/
  58. static void __init m5407_timers_init(void)
  59. {
  60. /* Timer1 is always used as system timer */
  61. writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
  62. MCF_MBAR + MCFSIM_TIMER1ICR);
  63. mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
  64. #ifdef CONFIG_HIGHPROFILE
  65. /* Timer2 is to be used as a high speed profile timer */
  66. writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
  67. MCF_MBAR + MCFSIM_TIMER2ICR);
  68. mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
  69. #endif
  70. }
  71. /***************************************************************************/
  72. void m5407_cpu_reset(void)
  73. {
  74. local_irq_disable();
  75. /* set watchdog to soft reset, and enabled */
  76. __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
  77. for (;;)
  78. /* wait for watchdog to timeout */;
  79. }
  80. /***************************************************************************/
  81. void __init config_BSP(char *commandp, int size)
  82. {
  83. mach_reset = m5407_cpu_reset;
  84. m5407_timers_init();
  85. m5407_uarts_init();
  86. /* Only support the external interrupts on their primary level */
  87. mcf_mapirq2imr(25, MCFINTC_EINT1);
  88. mcf_mapirq2imr(27, MCFINTC_EINT3);
  89. mcf_mapirq2imr(29, MCFINTC_EINT5);
  90. mcf_mapirq2imr(31, MCFINTC_EINT7);
  91. }
  92. /***************************************************************************/
  93. static int __init init_BSP(void)
  94. {
  95. platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
  96. return 0;
  97. }
  98. arch_initcall(init_BSP);
  99. /***************************************************************************/