atomic.h 7.2 KB

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  1. #ifndef _ASM_M32R_ATOMIC_H
  2. #define _ASM_M32R_ATOMIC_H
  3. /*
  4. * linux/include/asm-m32r/atomic.h
  5. *
  6. * M32R version:
  7. * Copyright (C) 2001, 2002 Hitoshi Yamamoto
  8. * Copyright (C) 2004 Hirokazu Takata <takata at linux-m32r.org>
  9. */
  10. #include <linux/types.h>
  11. #include <asm/assembler.h>
  12. #include <asm/system.h>
  13. /*
  14. * Atomic operations that C can't guarantee us. Useful for
  15. * resource counting etc..
  16. */
  17. #define ATOMIC_INIT(i) { (i) }
  18. /**
  19. * atomic_read - read atomic variable
  20. * @v: pointer of type atomic_t
  21. *
  22. * Atomically reads the value of @v.
  23. */
  24. #define atomic_read(v) (*(volatile int *)&(v)->counter)
  25. /**
  26. * atomic_set - set atomic variable
  27. * @v: pointer of type atomic_t
  28. * @i: required value
  29. *
  30. * Atomically sets the value of @v to @i.
  31. */
  32. #define atomic_set(v,i) (((v)->counter) = (i))
  33. /**
  34. * atomic_add_return - add integer to atomic variable and return it
  35. * @i: integer value to add
  36. * @v: pointer of type atomic_t
  37. *
  38. * Atomically adds @i to @v and return (@i + @v).
  39. */
  40. static __inline__ int atomic_add_return(int i, atomic_t *v)
  41. {
  42. unsigned long flags;
  43. int result;
  44. local_irq_save(flags);
  45. __asm__ __volatile__ (
  46. "# atomic_add_return \n\t"
  47. DCACHE_CLEAR("%0", "r4", "%1")
  48. M32R_LOCK" %0, @%1; \n\t"
  49. "add %0, %2; \n\t"
  50. M32R_UNLOCK" %0, @%1; \n\t"
  51. : "=&r" (result)
  52. : "r" (&v->counter), "r" (i)
  53. : "memory"
  54. #ifdef CONFIG_CHIP_M32700_TS1
  55. , "r4"
  56. #endif /* CONFIG_CHIP_M32700_TS1 */
  57. );
  58. local_irq_restore(flags);
  59. return result;
  60. }
  61. /**
  62. * atomic_sub_return - subtract integer from atomic variable and return it
  63. * @i: integer value to subtract
  64. * @v: pointer of type atomic_t
  65. *
  66. * Atomically subtracts @i from @v and return (@v - @i).
  67. */
  68. static __inline__ int atomic_sub_return(int i, atomic_t *v)
  69. {
  70. unsigned long flags;
  71. int result;
  72. local_irq_save(flags);
  73. __asm__ __volatile__ (
  74. "# atomic_sub_return \n\t"
  75. DCACHE_CLEAR("%0", "r4", "%1")
  76. M32R_LOCK" %0, @%1; \n\t"
  77. "sub %0, %2; \n\t"
  78. M32R_UNLOCK" %0, @%1; \n\t"
  79. : "=&r" (result)
  80. : "r" (&v->counter), "r" (i)
  81. : "memory"
  82. #ifdef CONFIG_CHIP_M32700_TS1
  83. , "r4"
  84. #endif /* CONFIG_CHIP_M32700_TS1 */
  85. );
  86. local_irq_restore(flags);
  87. return result;
  88. }
  89. /**
  90. * atomic_add - add integer to atomic variable
  91. * @i: integer value to add
  92. * @v: pointer of type atomic_t
  93. *
  94. * Atomically adds @i to @v.
  95. */
  96. #define atomic_add(i,v) ((void) atomic_add_return((i), (v)))
  97. /**
  98. * atomic_sub - subtract the atomic variable
  99. * @i: integer value to subtract
  100. * @v: pointer of type atomic_t
  101. *
  102. * Atomically subtracts @i from @v.
  103. */
  104. #define atomic_sub(i,v) ((void) atomic_sub_return((i), (v)))
  105. /**
  106. * atomic_sub_and_test - subtract value from variable and test result
  107. * @i: integer value to subtract
  108. * @v: pointer of type atomic_t
  109. *
  110. * Atomically subtracts @i from @v and returns
  111. * true if the result is zero, or false for all
  112. * other cases.
  113. */
  114. #define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
  115. /**
  116. * atomic_inc_return - increment atomic variable and return it
  117. * @v: pointer of type atomic_t
  118. *
  119. * Atomically increments @v by 1 and returns the result.
  120. */
  121. static __inline__ int atomic_inc_return(atomic_t *v)
  122. {
  123. unsigned long flags;
  124. int result;
  125. local_irq_save(flags);
  126. __asm__ __volatile__ (
  127. "# atomic_inc_return \n\t"
  128. DCACHE_CLEAR("%0", "r4", "%1")
  129. M32R_LOCK" %0, @%1; \n\t"
  130. "addi %0, #1; \n\t"
  131. M32R_UNLOCK" %0, @%1; \n\t"
  132. : "=&r" (result)
  133. : "r" (&v->counter)
  134. : "memory"
  135. #ifdef CONFIG_CHIP_M32700_TS1
  136. , "r4"
  137. #endif /* CONFIG_CHIP_M32700_TS1 */
  138. );
  139. local_irq_restore(flags);
  140. return result;
  141. }
  142. /**
  143. * atomic_dec_return - decrement atomic variable and return it
  144. * @v: pointer of type atomic_t
  145. *
  146. * Atomically decrements @v by 1 and returns the result.
  147. */
  148. static __inline__ int atomic_dec_return(atomic_t *v)
  149. {
  150. unsigned long flags;
  151. int result;
  152. local_irq_save(flags);
  153. __asm__ __volatile__ (
  154. "# atomic_dec_return \n\t"
  155. DCACHE_CLEAR("%0", "r4", "%1")
  156. M32R_LOCK" %0, @%1; \n\t"
  157. "addi %0, #-1; \n\t"
  158. M32R_UNLOCK" %0, @%1; \n\t"
  159. : "=&r" (result)
  160. : "r" (&v->counter)
  161. : "memory"
  162. #ifdef CONFIG_CHIP_M32700_TS1
  163. , "r4"
  164. #endif /* CONFIG_CHIP_M32700_TS1 */
  165. );
  166. local_irq_restore(flags);
  167. return result;
  168. }
  169. /**
  170. * atomic_inc - increment atomic variable
  171. * @v: pointer of type atomic_t
  172. *
  173. * Atomically increments @v by 1.
  174. */
  175. #define atomic_inc(v) ((void)atomic_inc_return(v))
  176. /**
  177. * atomic_dec - decrement atomic variable
  178. * @v: pointer of type atomic_t
  179. *
  180. * Atomically decrements @v by 1.
  181. */
  182. #define atomic_dec(v) ((void)atomic_dec_return(v))
  183. /**
  184. * atomic_inc_and_test - increment and test
  185. * @v: pointer of type atomic_t
  186. *
  187. * Atomically increments @v by 1
  188. * and returns true if the result is zero, or false for all
  189. * other cases.
  190. */
  191. #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
  192. /**
  193. * atomic_dec_and_test - decrement and test
  194. * @v: pointer of type atomic_t
  195. *
  196. * Atomically decrements @v by 1 and
  197. * returns true if the result is 0, or false for all
  198. * other cases.
  199. */
  200. #define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
  201. /**
  202. * atomic_add_negative - add and test if negative
  203. * @v: pointer of type atomic_t
  204. * @i: integer value to add
  205. *
  206. * Atomically adds @i to @v and returns true
  207. * if the result is negative, or false when
  208. * result is greater than or equal to zero.
  209. */
  210. #define atomic_add_negative(i,v) (atomic_add_return((i), (v)) < 0)
  211. #define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
  212. #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
  213. /**
  214. * atomic_add_unless - add unless the number is a given value
  215. * @v: pointer of type atomic_t
  216. * @a: the amount to add to v...
  217. * @u: ...unless v is equal to u.
  218. *
  219. * Atomically adds @a to @v, so long as it was not @u.
  220. * Returns non-zero if @v was not @u, and zero otherwise.
  221. */
  222. static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
  223. {
  224. int c, old;
  225. c = atomic_read(v);
  226. for (;;) {
  227. if (unlikely(c == (u)))
  228. break;
  229. old = atomic_cmpxchg((v), c, c + (a));
  230. if (likely(old == c))
  231. break;
  232. c = old;
  233. }
  234. return c != (u);
  235. }
  236. #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
  237. static __inline__ void atomic_clear_mask(unsigned long mask, atomic_t *addr)
  238. {
  239. unsigned long flags;
  240. unsigned long tmp;
  241. local_irq_save(flags);
  242. __asm__ __volatile__ (
  243. "# atomic_clear_mask \n\t"
  244. DCACHE_CLEAR("%0", "r5", "%1")
  245. M32R_LOCK" %0, @%1; \n\t"
  246. "and %0, %2; \n\t"
  247. M32R_UNLOCK" %0, @%1; \n\t"
  248. : "=&r" (tmp)
  249. : "r" (addr), "r" (~mask)
  250. : "memory"
  251. #ifdef CONFIG_CHIP_M32700_TS1
  252. , "r5"
  253. #endif /* CONFIG_CHIP_M32700_TS1 */
  254. );
  255. local_irq_restore(flags);
  256. }
  257. static __inline__ void atomic_set_mask(unsigned long mask, atomic_t *addr)
  258. {
  259. unsigned long flags;
  260. unsigned long tmp;
  261. local_irq_save(flags);
  262. __asm__ __volatile__ (
  263. "# atomic_set_mask \n\t"
  264. DCACHE_CLEAR("%0", "r5", "%1")
  265. M32R_LOCK" %0, @%1; \n\t"
  266. "or %0, %2; \n\t"
  267. M32R_UNLOCK" %0, @%1; \n\t"
  268. : "=&r" (tmp)
  269. : "r" (addr), "r" (mask)
  270. : "memory"
  271. #ifdef CONFIG_CHIP_M32700_TS1
  272. , "r5"
  273. #endif /* CONFIG_CHIP_M32700_TS1 */
  274. );
  275. local_irq_restore(flags);
  276. }
  277. /* Atomic operations are already serializing on m32r */
  278. #define smp_mb__before_atomic_dec() barrier()
  279. #define smp_mb__after_atomic_dec() barrier()
  280. #define smp_mb__before_atomic_inc() barrier()
  281. #define smp_mb__after_atomic_inc() barrier()
  282. #include <asm-generic/atomic-long.h>
  283. #endif /* _ASM_M32R_ATOMIC_H */