irq_comm.c 12 KB

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  1. /*
  2. * irq_comm.c: Common API for in kernel interrupt controller
  3. * Copyright (c) 2007, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
  16. * Place - Suite 330, Boston, MA 02111-1307 USA.
  17. * Authors:
  18. * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
  19. *
  20. * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  21. */
  22. #include <linux/kvm_host.h>
  23. #include <linux/slab.h>
  24. #include <trace/events/kvm.h>
  25. #include <asm/msidef.h>
  26. #ifdef CONFIG_IA64
  27. #include <asm/iosapic.h>
  28. #endif
  29. #include "irq.h"
  30. #include "ioapic.h"
  31. static inline int kvm_irq_line_state(unsigned long *irq_state,
  32. int irq_source_id, int level)
  33. {
  34. /* Logical OR for level trig interrupt */
  35. if (level)
  36. set_bit(irq_source_id, irq_state);
  37. else
  38. clear_bit(irq_source_id, irq_state);
  39. return !!(*irq_state);
  40. }
  41. static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
  42. struct kvm *kvm, int irq_source_id, int level)
  43. {
  44. #ifdef CONFIG_X86
  45. struct kvm_pic *pic = pic_irqchip(kvm);
  46. level = kvm_irq_line_state(&pic->irq_states[e->irqchip.pin],
  47. irq_source_id, level);
  48. return kvm_pic_set_irq(pic, e->irqchip.pin, level);
  49. #else
  50. return -1;
  51. #endif
  52. }
  53. static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
  54. struct kvm *kvm, int irq_source_id, int level)
  55. {
  56. struct kvm_ioapic *ioapic = kvm->arch.vioapic;
  57. level = kvm_irq_line_state(&ioapic->irq_states[e->irqchip.pin],
  58. irq_source_id, level);
  59. return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, level);
  60. }
  61. inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq)
  62. {
  63. #ifdef CONFIG_IA64
  64. return irq->delivery_mode ==
  65. (IOSAPIC_LOWEST_PRIORITY << IOSAPIC_DELIVERY_SHIFT);
  66. #else
  67. return irq->delivery_mode == APIC_DM_LOWEST;
  68. #endif
  69. }
  70. int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
  71. struct kvm_lapic_irq *irq)
  72. {
  73. int i, r = -1;
  74. struct kvm_vcpu *vcpu, *lowest = NULL;
  75. if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
  76. kvm_is_dm_lowest_prio(irq))
  77. printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
  78. kvm_for_each_vcpu(i, vcpu, kvm) {
  79. if (!kvm_apic_present(vcpu))
  80. continue;
  81. if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
  82. irq->dest_id, irq->dest_mode))
  83. continue;
  84. if (!kvm_is_dm_lowest_prio(irq)) {
  85. if (r < 0)
  86. r = 0;
  87. r += kvm_apic_set_irq(vcpu, irq);
  88. } else if (kvm_lapic_enabled(vcpu)) {
  89. if (!lowest)
  90. lowest = vcpu;
  91. else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
  92. lowest = vcpu;
  93. }
  94. }
  95. if (lowest)
  96. r = kvm_apic_set_irq(lowest, irq);
  97. return r;
  98. }
  99. int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
  100. struct kvm *kvm, int irq_source_id, int level)
  101. {
  102. struct kvm_lapic_irq irq;
  103. if (!level)
  104. return -1;
  105. trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
  106. irq.dest_id = (e->msi.address_lo &
  107. MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
  108. irq.vector = (e->msi.data &
  109. MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
  110. irq.dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
  111. irq.trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
  112. irq.delivery_mode = e->msi.data & 0x700;
  113. irq.level = 1;
  114. irq.shorthand = 0;
  115. /* TODO Deal with RH bit of MSI message address */
  116. return kvm_irq_delivery_to_apic(kvm, NULL, &irq);
  117. }
  118. /*
  119. * Return value:
  120. * < 0 Interrupt was ignored (masked or not delivered for other reasons)
  121. * = 0 Interrupt was coalesced (previous irq is still pending)
  122. * > 0 Number of CPUs interrupt was delivered to
  123. */
  124. int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level)
  125. {
  126. struct kvm_kernel_irq_routing_entry *e, irq_set[KVM_NR_IRQCHIPS];
  127. int ret = -1, i = 0;
  128. struct kvm_irq_routing_table *irq_rt;
  129. struct hlist_node *n;
  130. trace_kvm_set_irq(irq, level, irq_source_id);
  131. /* Not possible to detect if the guest uses the PIC or the
  132. * IOAPIC. So set the bit in both. The guest will ignore
  133. * writes to the unused one.
  134. */
  135. rcu_read_lock();
  136. irq_rt = rcu_dereference(kvm->irq_routing);
  137. if (irq < irq_rt->nr_rt_entries)
  138. hlist_for_each_entry(e, n, &irq_rt->map[irq], link)
  139. irq_set[i++] = *e;
  140. rcu_read_unlock();
  141. while(i--) {
  142. int r;
  143. r = irq_set[i].set(&irq_set[i], kvm, irq_source_id, level);
  144. if (r < 0)
  145. continue;
  146. ret = r + ((ret < 0) ? 0 : ret);
  147. }
  148. return ret;
  149. }
  150. void kvm_notify_acked_irq(struct kvm *kvm, unsigned irqchip, unsigned pin)
  151. {
  152. struct kvm_irq_ack_notifier *kian;
  153. struct hlist_node *n;
  154. int gsi;
  155. trace_kvm_ack_irq(irqchip, pin);
  156. rcu_read_lock();
  157. gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
  158. if (gsi != -1)
  159. hlist_for_each_entry_rcu(kian, n, &kvm->irq_ack_notifier_list,
  160. link)
  161. if (kian->gsi == gsi)
  162. kian->irq_acked(kian);
  163. rcu_read_unlock();
  164. }
  165. void kvm_register_irq_ack_notifier(struct kvm *kvm,
  166. struct kvm_irq_ack_notifier *kian)
  167. {
  168. mutex_lock(&kvm->irq_lock);
  169. hlist_add_head_rcu(&kian->link, &kvm->irq_ack_notifier_list);
  170. mutex_unlock(&kvm->irq_lock);
  171. }
  172. void kvm_unregister_irq_ack_notifier(struct kvm *kvm,
  173. struct kvm_irq_ack_notifier *kian)
  174. {
  175. mutex_lock(&kvm->irq_lock);
  176. hlist_del_init_rcu(&kian->link);
  177. mutex_unlock(&kvm->irq_lock);
  178. synchronize_rcu();
  179. }
  180. int kvm_request_irq_source_id(struct kvm *kvm)
  181. {
  182. unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
  183. int irq_source_id;
  184. mutex_lock(&kvm->irq_lock);
  185. irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
  186. if (irq_source_id >= BITS_PER_LONG) {
  187. printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
  188. irq_source_id = -EFAULT;
  189. goto unlock;
  190. }
  191. ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
  192. set_bit(irq_source_id, bitmap);
  193. unlock:
  194. mutex_unlock(&kvm->irq_lock);
  195. return irq_source_id;
  196. }
  197. void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
  198. {
  199. int i;
  200. ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
  201. mutex_lock(&kvm->irq_lock);
  202. if (irq_source_id < 0 ||
  203. irq_source_id >= BITS_PER_LONG) {
  204. printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
  205. goto unlock;
  206. }
  207. clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
  208. if (!irqchip_in_kernel(kvm))
  209. goto unlock;
  210. for (i = 0; i < KVM_IOAPIC_NUM_PINS; i++) {
  211. clear_bit(irq_source_id, &kvm->arch.vioapic->irq_states[i]);
  212. if (i >= 16)
  213. continue;
  214. #ifdef CONFIG_X86
  215. clear_bit(irq_source_id, &pic_irqchip(kvm)->irq_states[i]);
  216. #endif
  217. }
  218. unlock:
  219. mutex_unlock(&kvm->irq_lock);
  220. }
  221. void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
  222. struct kvm_irq_mask_notifier *kimn)
  223. {
  224. mutex_lock(&kvm->irq_lock);
  225. kimn->irq = irq;
  226. hlist_add_head_rcu(&kimn->link, &kvm->mask_notifier_list);
  227. mutex_unlock(&kvm->irq_lock);
  228. }
  229. void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
  230. struct kvm_irq_mask_notifier *kimn)
  231. {
  232. mutex_lock(&kvm->irq_lock);
  233. hlist_del_rcu(&kimn->link);
  234. mutex_unlock(&kvm->irq_lock);
  235. synchronize_rcu();
  236. }
  237. void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
  238. bool mask)
  239. {
  240. struct kvm_irq_mask_notifier *kimn;
  241. struct hlist_node *n;
  242. int gsi;
  243. rcu_read_lock();
  244. gsi = rcu_dereference(kvm->irq_routing)->chip[irqchip][pin];
  245. if (gsi != -1)
  246. hlist_for_each_entry_rcu(kimn, n, &kvm->mask_notifier_list, link)
  247. if (kimn->irq == gsi)
  248. kimn->func(kimn, mask);
  249. rcu_read_unlock();
  250. }
  251. void kvm_free_irq_routing(struct kvm *kvm)
  252. {
  253. /* Called only during vm destruction. Nobody can use the pointer
  254. at this stage */
  255. kfree(kvm->irq_routing);
  256. }
  257. static int setup_routing_entry(struct kvm_irq_routing_table *rt,
  258. struct kvm_kernel_irq_routing_entry *e,
  259. const struct kvm_irq_routing_entry *ue)
  260. {
  261. int r = -EINVAL;
  262. int delta;
  263. unsigned max_pin;
  264. struct kvm_kernel_irq_routing_entry *ei;
  265. struct hlist_node *n;
  266. /*
  267. * Do not allow GSI to be mapped to the same irqchip more than once.
  268. * Allow only one to one mapping between GSI and MSI.
  269. */
  270. hlist_for_each_entry(ei, n, &rt->map[ue->gsi], link)
  271. if (ei->type == KVM_IRQ_ROUTING_MSI ||
  272. ue->u.irqchip.irqchip == ei->irqchip.irqchip)
  273. return r;
  274. e->gsi = ue->gsi;
  275. e->type = ue->type;
  276. switch (ue->type) {
  277. case KVM_IRQ_ROUTING_IRQCHIP:
  278. delta = 0;
  279. switch (ue->u.irqchip.irqchip) {
  280. case KVM_IRQCHIP_PIC_MASTER:
  281. e->set = kvm_set_pic_irq;
  282. max_pin = 16;
  283. break;
  284. case KVM_IRQCHIP_PIC_SLAVE:
  285. e->set = kvm_set_pic_irq;
  286. max_pin = 16;
  287. delta = 8;
  288. break;
  289. case KVM_IRQCHIP_IOAPIC:
  290. max_pin = KVM_IOAPIC_NUM_PINS;
  291. e->set = kvm_set_ioapic_irq;
  292. break;
  293. default:
  294. goto out;
  295. }
  296. e->irqchip.irqchip = ue->u.irqchip.irqchip;
  297. e->irqchip.pin = ue->u.irqchip.pin + delta;
  298. if (e->irqchip.pin >= max_pin)
  299. goto out;
  300. rt->chip[ue->u.irqchip.irqchip][e->irqchip.pin] = ue->gsi;
  301. break;
  302. case KVM_IRQ_ROUTING_MSI:
  303. e->set = kvm_set_msi;
  304. e->msi.address_lo = ue->u.msi.address_lo;
  305. e->msi.address_hi = ue->u.msi.address_hi;
  306. e->msi.data = ue->u.msi.data;
  307. break;
  308. default:
  309. goto out;
  310. }
  311. hlist_add_head(&e->link, &rt->map[e->gsi]);
  312. r = 0;
  313. out:
  314. return r;
  315. }
  316. int kvm_set_irq_routing(struct kvm *kvm,
  317. const struct kvm_irq_routing_entry *ue,
  318. unsigned nr,
  319. unsigned flags)
  320. {
  321. struct kvm_irq_routing_table *new, *old;
  322. u32 i, j, nr_rt_entries = 0;
  323. int r;
  324. for (i = 0; i < nr; ++i) {
  325. if (ue[i].gsi >= KVM_MAX_IRQ_ROUTES)
  326. return -EINVAL;
  327. nr_rt_entries = max(nr_rt_entries, ue[i].gsi);
  328. }
  329. nr_rt_entries += 1;
  330. new = kzalloc(sizeof(*new) + (nr_rt_entries * sizeof(struct hlist_head))
  331. + (nr * sizeof(struct kvm_kernel_irq_routing_entry)),
  332. GFP_KERNEL);
  333. if (!new)
  334. return -ENOMEM;
  335. new->rt_entries = (void *)&new->map[nr_rt_entries];
  336. new->nr_rt_entries = nr_rt_entries;
  337. for (i = 0; i < 3; i++)
  338. for (j = 0; j < KVM_IOAPIC_NUM_PINS; j++)
  339. new->chip[i][j] = -1;
  340. for (i = 0; i < nr; ++i) {
  341. r = -EINVAL;
  342. if (ue->flags)
  343. goto out;
  344. r = setup_routing_entry(new, &new->rt_entries[i], ue);
  345. if (r)
  346. goto out;
  347. ++ue;
  348. }
  349. mutex_lock(&kvm->irq_lock);
  350. old = kvm->irq_routing;
  351. kvm_irq_routing_update(kvm, new);
  352. mutex_unlock(&kvm->irq_lock);
  353. synchronize_rcu();
  354. new = old;
  355. r = 0;
  356. out:
  357. kfree(new);
  358. return r;
  359. }
  360. #define IOAPIC_ROUTING_ENTRY(irq) \
  361. { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
  362. .u.irqchip.irqchip = KVM_IRQCHIP_IOAPIC, .u.irqchip.pin = (irq) }
  363. #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
  364. #ifdef CONFIG_X86
  365. # define PIC_ROUTING_ENTRY(irq) \
  366. { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
  367. .u.irqchip.irqchip = SELECT_PIC(irq), .u.irqchip.pin = (irq) % 8 }
  368. # define ROUTING_ENTRY2(irq) \
  369. IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
  370. #else
  371. # define ROUTING_ENTRY2(irq) \
  372. IOAPIC_ROUTING_ENTRY(irq)
  373. #endif
  374. static const struct kvm_irq_routing_entry default_routing[] = {
  375. ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
  376. ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
  377. ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
  378. ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
  379. ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
  380. ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
  381. ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
  382. ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
  383. ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
  384. ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
  385. ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
  386. ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
  387. #ifdef CONFIG_IA64
  388. ROUTING_ENTRY1(24), ROUTING_ENTRY1(25),
  389. ROUTING_ENTRY1(26), ROUTING_ENTRY1(27),
  390. ROUTING_ENTRY1(28), ROUTING_ENTRY1(29),
  391. ROUTING_ENTRY1(30), ROUTING_ENTRY1(31),
  392. ROUTING_ENTRY1(32), ROUTING_ENTRY1(33),
  393. ROUTING_ENTRY1(34), ROUTING_ENTRY1(35),
  394. ROUTING_ENTRY1(36), ROUTING_ENTRY1(37),
  395. ROUTING_ENTRY1(38), ROUTING_ENTRY1(39),
  396. ROUTING_ENTRY1(40), ROUTING_ENTRY1(41),
  397. ROUTING_ENTRY1(42), ROUTING_ENTRY1(43),
  398. ROUTING_ENTRY1(44), ROUTING_ENTRY1(45),
  399. ROUTING_ENTRY1(46), ROUTING_ENTRY1(47),
  400. #endif
  401. };
  402. int kvm_setup_default_irq_routing(struct kvm *kvm)
  403. {
  404. return kvm_set_irq_routing(kvm, default_routing,
  405. ARRAY_SIZE(default_routing), 0);
  406. }