omap-pcm.c 12 KB

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  1. /*
  2. * omap-pcm.c -- ALSA PCM interface for the OMAP SoC
  3. *
  4. * Copyright (C) 2008 Nokia Corporation
  5. *
  6. * Contact: Jarkko Nikula <jhnikula@gmail.com>
  7. * Peter Ujfalusi <peter.ujfalusi@ti.com>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  21. * 02110-1301 USA
  22. *
  23. */
  24. #include <linux/dma-mapping.h>
  25. #include <linux/slab.h>
  26. #include <sound/core.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/soc.h>
  30. #include <plat/dma.h>
  31. #include "omap-pcm.h"
  32. static const struct snd_pcm_hardware omap_pcm_hardware = {
  33. .info = SNDRV_PCM_INFO_MMAP |
  34. SNDRV_PCM_INFO_MMAP_VALID |
  35. SNDRV_PCM_INFO_INTERLEAVED |
  36. SNDRV_PCM_INFO_PAUSE |
  37. SNDRV_PCM_INFO_RESUME |
  38. SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
  39. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  40. SNDRV_PCM_FMTBIT_S32_LE,
  41. .period_bytes_min = 32,
  42. .period_bytes_max = 64 * 1024,
  43. .periods_min = 2,
  44. .periods_max = 255,
  45. .buffer_bytes_max = 128 * 1024,
  46. };
  47. struct omap_runtime_data {
  48. spinlock_t lock;
  49. struct omap_pcm_dma_data *dma_data;
  50. int dma_ch;
  51. int period_index;
  52. };
  53. static void omap_pcm_dma_irq(int ch, u16 stat, void *data)
  54. {
  55. struct snd_pcm_substream *substream = data;
  56. struct snd_pcm_runtime *runtime = substream->runtime;
  57. struct omap_runtime_data *prtd = runtime->private_data;
  58. unsigned long flags;
  59. if ((cpu_is_omap1510())) {
  60. /*
  61. * OMAP1510 doesn't fully support DMA progress counter
  62. * and there is no software emulation implemented yet,
  63. * so have to maintain our own progress counters
  64. * that can be used by omap_pcm_pointer() instead.
  65. */
  66. spin_lock_irqsave(&prtd->lock, flags);
  67. if ((stat == OMAP_DMA_LAST_IRQ) &&
  68. (prtd->period_index == runtime->periods - 1)) {
  69. /* we are in sync, do nothing */
  70. spin_unlock_irqrestore(&prtd->lock, flags);
  71. return;
  72. }
  73. if (prtd->period_index >= 0) {
  74. if (stat & OMAP_DMA_BLOCK_IRQ) {
  75. /* end of buffer reached, loop back */
  76. prtd->period_index = 0;
  77. } else if (stat & OMAP_DMA_LAST_IRQ) {
  78. /* update the counter for the last period */
  79. prtd->period_index = runtime->periods - 1;
  80. } else if (++prtd->period_index >= runtime->periods) {
  81. /* end of buffer missed? loop back */
  82. prtd->period_index = 0;
  83. }
  84. }
  85. spin_unlock_irqrestore(&prtd->lock, flags);
  86. }
  87. snd_pcm_period_elapsed(substream);
  88. }
  89. /* this may get called several times by oss emulation */
  90. static int omap_pcm_hw_params(struct snd_pcm_substream *substream,
  91. struct snd_pcm_hw_params *params)
  92. {
  93. struct snd_pcm_runtime *runtime = substream->runtime;
  94. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  95. struct omap_runtime_data *prtd = runtime->private_data;
  96. struct omap_pcm_dma_data *dma_data;
  97. int err = 0;
  98. dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  99. /* return if this is a bufferless transfer e.g.
  100. * codec <--> BT codec or GSM modem -- lg FIXME */
  101. if (!dma_data)
  102. return 0;
  103. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  104. runtime->dma_bytes = params_buffer_bytes(params);
  105. if (prtd->dma_data)
  106. return 0;
  107. prtd->dma_data = dma_data;
  108. err = omap_request_dma(dma_data->dma_req, dma_data->name,
  109. omap_pcm_dma_irq, substream, &prtd->dma_ch);
  110. if (!err) {
  111. /*
  112. * Link channel with itself so DMA doesn't need any
  113. * reprogramming while looping the buffer
  114. */
  115. omap_dma_link_lch(prtd->dma_ch, prtd->dma_ch);
  116. }
  117. return err;
  118. }
  119. static int omap_pcm_hw_free(struct snd_pcm_substream *substream)
  120. {
  121. struct snd_pcm_runtime *runtime = substream->runtime;
  122. struct omap_runtime_data *prtd = runtime->private_data;
  123. if (prtd->dma_data == NULL)
  124. return 0;
  125. omap_dma_unlink_lch(prtd->dma_ch, prtd->dma_ch);
  126. omap_free_dma(prtd->dma_ch);
  127. prtd->dma_data = NULL;
  128. snd_pcm_set_runtime_buffer(substream, NULL);
  129. return 0;
  130. }
  131. static int omap_pcm_prepare(struct snd_pcm_substream *substream)
  132. {
  133. struct snd_pcm_runtime *runtime = substream->runtime;
  134. struct omap_runtime_data *prtd = runtime->private_data;
  135. struct omap_pcm_dma_data *dma_data = prtd->dma_data;
  136. struct omap_dma_channel_params dma_params;
  137. int bytes;
  138. /* return if this is a bufferless transfer e.g.
  139. * codec <--> BT codec or GSM modem -- lg FIXME */
  140. if (!prtd->dma_data)
  141. return 0;
  142. memset(&dma_params, 0, sizeof(dma_params));
  143. dma_params.data_type = dma_data->data_type;
  144. dma_params.trigger = dma_data->dma_req;
  145. dma_params.sync_mode = dma_data->sync_mode;
  146. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  147. dma_params.src_amode = OMAP_DMA_AMODE_POST_INC;
  148. dma_params.dst_amode = OMAP_DMA_AMODE_CONSTANT;
  149. dma_params.src_or_dst_synch = OMAP_DMA_DST_SYNC;
  150. dma_params.src_start = runtime->dma_addr;
  151. dma_params.dst_start = dma_data->port_addr;
  152. dma_params.dst_port = OMAP_DMA_PORT_MPUI;
  153. dma_params.dst_fi = dma_data->packet_size;
  154. } else {
  155. dma_params.src_amode = OMAP_DMA_AMODE_CONSTANT;
  156. dma_params.dst_amode = OMAP_DMA_AMODE_POST_INC;
  157. dma_params.src_or_dst_synch = OMAP_DMA_SRC_SYNC;
  158. dma_params.src_start = dma_data->port_addr;
  159. dma_params.dst_start = runtime->dma_addr;
  160. dma_params.src_port = OMAP_DMA_PORT_MPUI;
  161. dma_params.src_fi = dma_data->packet_size;
  162. }
  163. /*
  164. * Set DMA transfer frame size equal to ALSA period size and frame
  165. * count as no. of ALSA periods. Then with DMA frame interrupt enabled,
  166. * we can transfer the whole ALSA buffer with single DMA transfer but
  167. * still can get an interrupt at each period bounary
  168. */
  169. bytes = snd_pcm_lib_period_bytes(substream);
  170. dma_params.elem_count = bytes >> dma_data->data_type;
  171. dma_params.frame_count = runtime->periods;
  172. omap_set_dma_params(prtd->dma_ch, &dma_params);
  173. if ((cpu_is_omap1510()))
  174. omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ |
  175. OMAP_DMA_LAST_IRQ | OMAP_DMA_BLOCK_IRQ);
  176. else if (!substream->runtime->no_period_wakeup)
  177. omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ);
  178. if (!(cpu_class_is_omap1())) {
  179. omap_set_dma_src_burst_mode(prtd->dma_ch,
  180. OMAP_DMA_DATA_BURST_16);
  181. omap_set_dma_dest_burst_mode(prtd->dma_ch,
  182. OMAP_DMA_DATA_BURST_16);
  183. }
  184. return 0;
  185. }
  186. static int omap_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  187. {
  188. struct snd_pcm_runtime *runtime = substream->runtime;
  189. struct omap_runtime_data *prtd = runtime->private_data;
  190. struct omap_pcm_dma_data *dma_data = prtd->dma_data;
  191. unsigned long flags;
  192. int ret = 0;
  193. spin_lock_irqsave(&prtd->lock, flags);
  194. switch (cmd) {
  195. case SNDRV_PCM_TRIGGER_START:
  196. case SNDRV_PCM_TRIGGER_RESUME:
  197. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  198. prtd->period_index = 0;
  199. /* Configure McBSP internal buffer usage */
  200. if (dma_data->set_threshold)
  201. dma_data->set_threshold(substream);
  202. omap_start_dma(prtd->dma_ch);
  203. break;
  204. case SNDRV_PCM_TRIGGER_STOP:
  205. case SNDRV_PCM_TRIGGER_SUSPEND:
  206. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  207. prtd->period_index = -1;
  208. omap_stop_dma(prtd->dma_ch);
  209. break;
  210. default:
  211. ret = -EINVAL;
  212. }
  213. spin_unlock_irqrestore(&prtd->lock, flags);
  214. return ret;
  215. }
  216. static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream)
  217. {
  218. struct snd_pcm_runtime *runtime = substream->runtime;
  219. struct omap_runtime_data *prtd = runtime->private_data;
  220. dma_addr_t ptr;
  221. snd_pcm_uframes_t offset;
  222. if (cpu_is_omap1510()) {
  223. offset = prtd->period_index * runtime->period_size;
  224. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  225. ptr = omap_get_dma_dst_pos(prtd->dma_ch);
  226. offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
  227. } else {
  228. ptr = omap_get_dma_src_pos(prtd->dma_ch);
  229. offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
  230. }
  231. if (offset >= runtime->buffer_size)
  232. offset = 0;
  233. return offset;
  234. }
  235. static int omap_pcm_open(struct snd_pcm_substream *substream)
  236. {
  237. struct snd_pcm_runtime *runtime = substream->runtime;
  238. struct omap_runtime_data *prtd;
  239. int ret;
  240. snd_soc_set_runtime_hwparams(substream, &omap_pcm_hardware);
  241. /* Ensure that buffer size is a multiple of period size */
  242. ret = snd_pcm_hw_constraint_integer(runtime,
  243. SNDRV_PCM_HW_PARAM_PERIODS);
  244. if (ret < 0)
  245. goto out;
  246. prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
  247. if (prtd == NULL) {
  248. ret = -ENOMEM;
  249. goto out;
  250. }
  251. spin_lock_init(&prtd->lock);
  252. runtime->private_data = prtd;
  253. out:
  254. return ret;
  255. }
  256. static int omap_pcm_close(struct snd_pcm_substream *substream)
  257. {
  258. struct snd_pcm_runtime *runtime = substream->runtime;
  259. kfree(runtime->private_data);
  260. return 0;
  261. }
  262. static int omap_pcm_mmap(struct snd_pcm_substream *substream,
  263. struct vm_area_struct *vma)
  264. {
  265. struct snd_pcm_runtime *runtime = substream->runtime;
  266. return dma_mmap_writecombine(substream->pcm->card->dev, vma,
  267. runtime->dma_area,
  268. runtime->dma_addr,
  269. runtime->dma_bytes);
  270. }
  271. static struct snd_pcm_ops omap_pcm_ops = {
  272. .open = omap_pcm_open,
  273. .close = omap_pcm_close,
  274. .ioctl = snd_pcm_lib_ioctl,
  275. .hw_params = omap_pcm_hw_params,
  276. .hw_free = omap_pcm_hw_free,
  277. .prepare = omap_pcm_prepare,
  278. .trigger = omap_pcm_trigger,
  279. .pointer = omap_pcm_pointer,
  280. .mmap = omap_pcm_mmap,
  281. };
  282. static u64 omap_pcm_dmamask = DMA_BIT_MASK(64);
  283. static int omap_pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
  284. int stream)
  285. {
  286. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  287. struct snd_dma_buffer *buf = &substream->dma_buffer;
  288. size_t size = omap_pcm_hardware.buffer_bytes_max;
  289. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  290. buf->dev.dev = pcm->card->dev;
  291. buf->private_data = NULL;
  292. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  293. &buf->addr, GFP_KERNEL);
  294. if (!buf->area)
  295. return -ENOMEM;
  296. buf->bytes = size;
  297. return 0;
  298. }
  299. static void omap_pcm_free_dma_buffers(struct snd_pcm *pcm)
  300. {
  301. struct snd_pcm_substream *substream;
  302. struct snd_dma_buffer *buf;
  303. int stream;
  304. for (stream = 0; stream < 2; stream++) {
  305. substream = pcm->streams[stream].substream;
  306. if (!substream)
  307. continue;
  308. buf = &substream->dma_buffer;
  309. if (!buf->area)
  310. continue;
  311. dma_free_writecombine(pcm->card->dev, buf->bytes,
  312. buf->area, buf->addr);
  313. buf->area = NULL;
  314. }
  315. }
  316. static int omap_pcm_new(struct snd_card *card, struct snd_soc_dai *dai,
  317. struct snd_pcm *pcm)
  318. {
  319. int ret = 0;
  320. if (!card->dev->dma_mask)
  321. card->dev->dma_mask = &omap_pcm_dmamask;
  322. if (!card->dev->coherent_dma_mask)
  323. card->dev->coherent_dma_mask = DMA_BIT_MASK(64);
  324. if (dai->driver->playback.channels_min) {
  325. ret = omap_pcm_preallocate_dma_buffer(pcm,
  326. SNDRV_PCM_STREAM_PLAYBACK);
  327. if (ret)
  328. goto out;
  329. }
  330. if (dai->driver->capture.channels_min) {
  331. ret = omap_pcm_preallocate_dma_buffer(pcm,
  332. SNDRV_PCM_STREAM_CAPTURE);
  333. if (ret)
  334. goto out;
  335. }
  336. out:
  337. return ret;
  338. }
  339. static struct snd_soc_platform_driver omap_soc_platform = {
  340. .ops = &omap_pcm_ops,
  341. .pcm_new = omap_pcm_new,
  342. .pcm_free = omap_pcm_free_dma_buffers,
  343. };
  344. static __devinit int omap_pcm_probe(struct platform_device *pdev)
  345. {
  346. return snd_soc_register_platform(&pdev->dev,
  347. &omap_soc_platform);
  348. }
  349. static int __devexit omap_pcm_remove(struct platform_device *pdev)
  350. {
  351. snd_soc_unregister_platform(&pdev->dev);
  352. return 0;
  353. }
  354. static struct platform_driver omap_pcm_driver = {
  355. .driver = {
  356. .name = "omap-pcm-audio",
  357. .owner = THIS_MODULE,
  358. },
  359. .probe = omap_pcm_probe,
  360. .remove = __devexit_p(omap_pcm_remove),
  361. };
  362. static int __init snd_omap_pcm_init(void)
  363. {
  364. return platform_driver_register(&omap_pcm_driver);
  365. }
  366. module_init(snd_omap_pcm_init);
  367. static void __exit snd_omap_pcm_exit(void)
  368. {
  369. platform_driver_unregister(&omap_pcm_driver);
  370. }
  371. module_exit(snd_omap_pcm_exit);
  372. MODULE_AUTHOR("Jarkko Nikula <jhnikula@gmail.com>");
  373. MODULE_DESCRIPTION("OMAP PCM DMA module");
  374. MODULE_LICENSE("GPL");