vx_uer.c 7.7 KB

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  1. /*
  2. * Driver for Digigram VX soundcards
  3. *
  4. * IEC958 stuff
  5. *
  6. * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/delay.h>
  23. #include <sound/core.h>
  24. #include <sound/vx_core.h>
  25. #include "vx_cmd.h"
  26. /*
  27. * vx_modify_board_clock - tell the board that its clock has been modified
  28. * @sync: DSP needs to resynchronize its FIFO
  29. */
  30. static int vx_modify_board_clock(struct vx_core *chip, int sync)
  31. {
  32. struct vx_rmh rmh;
  33. vx_init_rmh(&rmh, CMD_MODIFY_CLOCK);
  34. /* Ask the DSP to resynchronize its FIFO. */
  35. if (sync)
  36. rmh.Cmd[0] |= CMD_MODIFY_CLOCK_S_BIT;
  37. return vx_send_msg(chip, &rmh);
  38. }
  39. /*
  40. * vx_modify_board_inputs - resync audio inputs
  41. */
  42. static int vx_modify_board_inputs(struct vx_core *chip)
  43. {
  44. struct vx_rmh rmh;
  45. vx_init_rmh(&rmh, CMD_RESYNC_AUDIO_INPUTS);
  46. rmh.Cmd[0] |= 1 << 0; /* reference: AUDIO 0 */
  47. return vx_send_msg(chip, &rmh);
  48. }
  49. /*
  50. * vx_read_one_cbit - read one bit from UER config
  51. * @index: the bit index
  52. * returns 0 or 1.
  53. */
  54. static int vx_read_one_cbit(struct vx_core *chip, int index)
  55. {
  56. unsigned long flags;
  57. int val;
  58. spin_lock_irqsave(&chip->lock, flags);
  59. if (chip->type >= VX_TYPE_VXPOCKET) {
  60. vx_outb(chip, CSUER, 1); /* read */
  61. vx_outb(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK);
  62. val = (vx_inb(chip, RUER) >> 7) & 0x01;
  63. } else {
  64. vx_outl(chip, CSUER, 1); /* read */
  65. vx_outl(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK);
  66. val = (vx_inl(chip, RUER) >> 7) & 0x01;
  67. }
  68. spin_unlock_irqrestore(&chip->lock, flags);
  69. return val;
  70. }
  71. /*
  72. * vx_write_one_cbit - write one bit to UER config
  73. * @index: the bit index
  74. * @val: bit value, 0 or 1
  75. */
  76. static void vx_write_one_cbit(struct vx_core *chip, int index, int val)
  77. {
  78. unsigned long flags;
  79. val = !!val; /* 0 or 1 */
  80. spin_lock_irqsave(&chip->lock, flags);
  81. if (vx_is_pcmcia(chip)) {
  82. vx_outb(chip, CSUER, 0); /* write */
  83. vx_outb(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK));
  84. } else {
  85. vx_outl(chip, CSUER, 0); /* write */
  86. vx_outl(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK));
  87. }
  88. spin_unlock_irqrestore(&chip->lock, flags);
  89. }
  90. /*
  91. * vx_read_uer_status - read the current UER status
  92. * @mode: pointer to store the UER mode, VX_UER_MODE_XXX
  93. *
  94. * returns the frequency of UER, or 0 if not sync,
  95. * or a negative error code.
  96. */
  97. static int vx_read_uer_status(struct vx_core *chip, unsigned int *mode)
  98. {
  99. int val, freq;
  100. /* Default values */
  101. freq = 0;
  102. /* Read UER status */
  103. if (vx_is_pcmcia(chip))
  104. val = vx_inb(chip, CSUER);
  105. else
  106. val = vx_inl(chip, CSUER);
  107. if (val < 0)
  108. return val;
  109. /* If clock is present, read frequency */
  110. if (val & VX_SUER_CLOCK_PRESENT_MASK) {
  111. switch (val & VX_SUER_FREQ_MASK) {
  112. case VX_SUER_FREQ_32KHz_MASK:
  113. freq = 32000;
  114. break;
  115. case VX_SUER_FREQ_44KHz_MASK:
  116. freq = 44100;
  117. break;
  118. case VX_SUER_FREQ_48KHz_MASK:
  119. freq = 48000;
  120. break;
  121. }
  122. }
  123. if (val & VX_SUER_DATA_PRESENT_MASK)
  124. /* bit 0 corresponds to consumer/professional bit */
  125. *mode = vx_read_one_cbit(chip, 0) ?
  126. VX_UER_MODE_PROFESSIONAL : VX_UER_MODE_CONSUMER;
  127. else
  128. *mode = VX_UER_MODE_NOT_PRESENT;
  129. return freq;
  130. }
  131. /*
  132. * compute the sample clock value from frequency
  133. *
  134. * The formula is as follows:
  135. *
  136. * HexFreq = (dword) ((double) ((double) 28224000 / (double) Frequency))
  137. * switch ( HexFreq & 0x00000F00 )
  138. * case 0x00000100: ;
  139. * case 0x00000200:
  140. * case 0x00000300: HexFreq -= 0x00000201 ;
  141. * case 0x00000400:
  142. * case 0x00000500:
  143. * case 0x00000600:
  144. * case 0x00000700: HexFreq = (dword) (((double) 28224000 / (double) (Frequency*2)) - 1)
  145. * default : HexFreq = (dword) ((double) 28224000 / (double) (Frequency*4)) - 0x000001FF
  146. */
  147. static int vx_calc_clock_from_freq(struct vx_core *chip, int freq)
  148. {
  149. int hexfreq;
  150. if (snd_BUG_ON(freq <= 0))
  151. return 0;
  152. hexfreq = (28224000 * 10) / freq;
  153. hexfreq = (hexfreq + 5) / 10;
  154. /* max freq = 55125 Hz */
  155. if (snd_BUG_ON(hexfreq <= 0x00000200))
  156. return 0;
  157. if (hexfreq <= 0x03ff)
  158. return hexfreq - 0x00000201;
  159. if (hexfreq <= 0x07ff)
  160. return (hexfreq / 2) - 1;
  161. if (hexfreq <= 0x0fff)
  162. return (hexfreq / 4) + 0x000001ff;
  163. return 0x5fe; /* min freq = 6893 Hz */
  164. }
  165. /*
  166. * vx_change_clock_source - change the clock source
  167. * @source: the new source
  168. */
  169. static void vx_change_clock_source(struct vx_core *chip, int source)
  170. {
  171. unsigned long flags;
  172. /* we mute DAC to prevent clicks */
  173. vx_toggle_dac_mute(chip, 1);
  174. spin_lock_irqsave(&chip->lock, flags);
  175. chip->ops->set_clock_source(chip, source);
  176. chip->clock_source = source;
  177. spin_unlock_irqrestore(&chip->lock, flags);
  178. /* unmute */
  179. vx_toggle_dac_mute(chip, 0);
  180. }
  181. /*
  182. * set the internal clock
  183. */
  184. void vx_set_internal_clock(struct vx_core *chip, unsigned int freq)
  185. {
  186. int clock;
  187. unsigned long flags;
  188. /* Get real clock value */
  189. clock = vx_calc_clock_from_freq(chip, freq);
  190. snd_printdd(KERN_DEBUG "set internal clock to 0x%x from freq %d\n", clock, freq);
  191. spin_lock_irqsave(&chip->lock, flags);
  192. if (vx_is_pcmcia(chip)) {
  193. vx_outb(chip, HIFREQ, (clock >> 8) & 0x0f);
  194. vx_outb(chip, LOFREQ, clock & 0xff);
  195. } else {
  196. vx_outl(chip, HIFREQ, (clock >> 8) & 0x0f);
  197. vx_outl(chip, LOFREQ, clock & 0xff);
  198. }
  199. spin_unlock_irqrestore(&chip->lock, flags);
  200. }
  201. /*
  202. * set the iec958 status bits
  203. * @bits: 32-bit status bits
  204. */
  205. void vx_set_iec958_status(struct vx_core *chip, unsigned int bits)
  206. {
  207. int i;
  208. if (chip->chip_status & VX_STAT_IS_STALE)
  209. return;
  210. for (i = 0; i < 32; i++)
  211. vx_write_one_cbit(chip, i, bits & (1 << i));
  212. }
  213. /*
  214. * vx_set_clock - change the clock and audio source if necessary
  215. */
  216. int vx_set_clock(struct vx_core *chip, unsigned int freq)
  217. {
  218. int src_changed = 0;
  219. if (chip->chip_status & VX_STAT_IS_STALE)
  220. return 0;
  221. /* change the audio source if possible */
  222. vx_sync_audio_source(chip);
  223. if (chip->clock_mode == VX_CLOCK_MODE_EXTERNAL ||
  224. (chip->clock_mode == VX_CLOCK_MODE_AUTO &&
  225. chip->audio_source == VX_AUDIO_SRC_DIGITAL)) {
  226. if (chip->clock_source != UER_SYNC) {
  227. vx_change_clock_source(chip, UER_SYNC);
  228. mdelay(6);
  229. src_changed = 1;
  230. }
  231. } else if (chip->clock_mode == VX_CLOCK_MODE_INTERNAL ||
  232. (chip->clock_mode == VX_CLOCK_MODE_AUTO &&
  233. chip->audio_source != VX_AUDIO_SRC_DIGITAL)) {
  234. if (chip->clock_source != INTERNAL_QUARTZ) {
  235. vx_change_clock_source(chip, INTERNAL_QUARTZ);
  236. src_changed = 1;
  237. }
  238. if (chip->freq == freq)
  239. return 0;
  240. vx_set_internal_clock(chip, freq);
  241. if (src_changed)
  242. vx_modify_board_inputs(chip);
  243. }
  244. if (chip->freq == freq)
  245. return 0;
  246. chip->freq = freq;
  247. vx_modify_board_clock(chip, 1);
  248. return 0;
  249. }
  250. /*
  251. * vx_change_frequency - called from interrupt handler
  252. */
  253. int vx_change_frequency(struct vx_core *chip)
  254. {
  255. int freq;
  256. if (chip->chip_status & VX_STAT_IS_STALE)
  257. return 0;
  258. if (chip->clock_source == INTERNAL_QUARTZ)
  259. return 0;
  260. /*
  261. * Read the real UER board frequency
  262. */
  263. freq = vx_read_uer_status(chip, &chip->uer_detected);
  264. if (freq < 0)
  265. return freq;
  266. /*
  267. * The frequency computed by the DSP is good and
  268. * is different from the previous computed.
  269. */
  270. if (freq == 48000 || freq == 44100 || freq == 32000)
  271. chip->freq_detected = freq;
  272. return 0;
  273. }