shwdt.c 12 KB

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  1. /*
  2. * drivers/watchdog/shwdt.c
  3. *
  4. * Watchdog driver for integrated watchdog in the SuperH processors.
  5. *
  6. * Copyright (C) 2001 - 2010 Paul Mundt <lethal@linux-sh.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. * 14-Dec-2001 Matt Domsch <Matt_Domsch@dell.com>
  14. * Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
  15. *
  16. * 19-Apr-2002 Rob Radez <rob@osinvestor.com>
  17. * Added expect close support, made emulated timeout runtime changeable
  18. * general cleanups, add some ioctls
  19. */
  20. #include <linux/module.h>
  21. #include <linux/moduleparam.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/init.h>
  24. #include <linux/types.h>
  25. #include <linux/miscdevice.h>
  26. #include <linux/watchdog.h>
  27. #include <linux/reboot.h>
  28. #include <linux/notifier.h>
  29. #include <linux/ioport.h>
  30. #include <linux/fs.h>
  31. #include <linux/mm.h>
  32. #include <linux/slab.h>
  33. #include <linux/io.h>
  34. #include <linux/uaccess.h>
  35. #include <asm/watchdog.h>
  36. #define DRV_NAME "sh-wdt"
  37. /*
  38. * Default clock division ratio is 5.25 msecs. For an additional table of
  39. * values, consult the asm-sh/watchdog.h. Overload this at module load
  40. * time.
  41. *
  42. * In order for this to work reliably we need to have HZ set to 1000 or
  43. * something quite higher than 100 (or we need a proper high-res timer
  44. * implementation that will deal with this properly), otherwise the 10ms
  45. * resolution of a jiffy is enough to trigger the overflow. For things like
  46. * the SH-4 and SH-5, this isn't necessarily that big of a problem, though
  47. * for the SH-2 and SH-3, this isn't recommended unless the WDT is absolutely
  48. * necssary.
  49. *
  50. * As a result of this timing problem, the only modes that are particularly
  51. * feasible are the 4096 and the 2048 divisors, which yield 5.25 and 2.62ms
  52. * overflow periods respectively.
  53. *
  54. * Also, since we can't really expect userspace to be responsive enough
  55. * before the overflow happens, we maintain two separate timers .. One in
  56. * the kernel for clearing out WOVF every 2ms or so (again, this depends on
  57. * HZ == 1000), and another for monitoring userspace writes to the WDT device.
  58. *
  59. * As such, we currently use a configurable heartbeat interval which defaults
  60. * to 30s. In this case, the userspace daemon is only responsible for periodic
  61. * writes to the device before the next heartbeat is scheduled. If the daemon
  62. * misses its deadline, the kernel timer will allow the WDT to overflow.
  63. */
  64. static int clock_division_ratio = WTCSR_CKS_4096;
  65. #define next_ping_period(cks) (jiffies + msecs_to_jiffies(cks - 4))
  66. static const struct watchdog_info sh_wdt_info;
  67. static struct platform_device *sh_wdt_dev;
  68. static DEFINE_SPINLOCK(shwdt_lock);
  69. #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */
  70. static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
  71. static int nowayout = WATCHDOG_NOWAYOUT;
  72. static unsigned long next_heartbeat;
  73. struct sh_wdt {
  74. void __iomem *base;
  75. struct device *dev;
  76. struct timer_list timer;
  77. unsigned long enabled;
  78. char expect_close;
  79. };
  80. static void sh_wdt_start(struct sh_wdt *wdt)
  81. {
  82. unsigned long flags;
  83. u8 csr;
  84. spin_lock_irqsave(&shwdt_lock, flags);
  85. next_heartbeat = jiffies + (heartbeat * HZ);
  86. mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
  87. csr = sh_wdt_read_csr();
  88. csr |= WTCSR_WT | clock_division_ratio;
  89. sh_wdt_write_csr(csr);
  90. sh_wdt_write_cnt(0);
  91. /*
  92. * These processors have a bit of an inconsistent initialization
  93. * process.. starting with SH-3, RSTS was moved to WTCSR, and the
  94. * RSTCSR register was removed.
  95. *
  96. * On the SH-2 however, in addition with bits being in different
  97. * locations, we must deal with RSTCSR outright..
  98. */
  99. csr = sh_wdt_read_csr();
  100. csr |= WTCSR_TME;
  101. csr &= ~WTCSR_RSTS;
  102. sh_wdt_write_csr(csr);
  103. #ifdef CONFIG_CPU_SH2
  104. csr = sh_wdt_read_rstcsr();
  105. csr &= ~RSTCSR_RSTS;
  106. sh_wdt_write_rstcsr(csr);
  107. #endif
  108. spin_unlock_irqrestore(&shwdt_lock, flags);
  109. }
  110. static void sh_wdt_stop(struct sh_wdt *wdt)
  111. {
  112. unsigned long flags;
  113. u8 csr;
  114. spin_lock_irqsave(&shwdt_lock, flags);
  115. del_timer(&wdt->timer);
  116. csr = sh_wdt_read_csr();
  117. csr &= ~WTCSR_TME;
  118. sh_wdt_write_csr(csr);
  119. spin_unlock_irqrestore(&shwdt_lock, flags);
  120. }
  121. static inline void sh_wdt_keepalive(struct sh_wdt *wdt)
  122. {
  123. unsigned long flags;
  124. spin_lock_irqsave(&shwdt_lock, flags);
  125. next_heartbeat = jiffies + (heartbeat * HZ);
  126. spin_unlock_irqrestore(&shwdt_lock, flags);
  127. }
  128. static int sh_wdt_set_heartbeat(int t)
  129. {
  130. unsigned long flags;
  131. if (unlikely(t < 1 || t > 3600)) /* arbitrary upper limit */
  132. return -EINVAL;
  133. spin_lock_irqsave(&shwdt_lock, flags);
  134. heartbeat = t;
  135. spin_unlock_irqrestore(&shwdt_lock, flags);
  136. return 0;
  137. }
  138. static void sh_wdt_ping(unsigned long data)
  139. {
  140. struct sh_wdt *wdt = (struct sh_wdt *)data;
  141. unsigned long flags;
  142. spin_lock_irqsave(&shwdt_lock, flags);
  143. if (time_before(jiffies, next_heartbeat)) {
  144. u8 csr;
  145. csr = sh_wdt_read_csr();
  146. csr &= ~WTCSR_IOVF;
  147. sh_wdt_write_csr(csr);
  148. sh_wdt_write_cnt(0);
  149. mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
  150. } else
  151. dev_warn(wdt->dev, "Heartbeat lost! Will not ping "
  152. "the watchdog\n");
  153. spin_unlock_irqrestore(&shwdt_lock, flags);
  154. }
  155. static int sh_wdt_open(struct inode *inode, struct file *file)
  156. {
  157. struct sh_wdt *wdt = platform_get_drvdata(sh_wdt_dev);
  158. if (test_and_set_bit(0, &wdt->enabled))
  159. return -EBUSY;
  160. if (nowayout)
  161. __module_get(THIS_MODULE);
  162. file->private_data = wdt;
  163. sh_wdt_start(wdt);
  164. return nonseekable_open(inode, file);
  165. }
  166. static int sh_wdt_close(struct inode *inode, struct file *file)
  167. {
  168. struct sh_wdt *wdt = file->private_data;
  169. if (wdt->expect_close == 42) {
  170. sh_wdt_stop(wdt);
  171. } else {
  172. dev_crit(wdt->dev, "Unexpected close, not "
  173. "stopping watchdog!\n");
  174. sh_wdt_keepalive(wdt);
  175. }
  176. clear_bit(0, &wdt->enabled);
  177. wdt->expect_close = 0;
  178. return 0;
  179. }
  180. static ssize_t sh_wdt_write(struct file *file, const char *buf,
  181. size_t count, loff_t *ppos)
  182. {
  183. struct sh_wdt *wdt = file->private_data;
  184. if (count) {
  185. if (!nowayout) {
  186. size_t i;
  187. wdt->expect_close = 0;
  188. for (i = 0; i != count; i++) {
  189. char c;
  190. if (get_user(c, buf + i))
  191. return -EFAULT;
  192. if (c == 'V')
  193. wdt->expect_close = 42;
  194. }
  195. }
  196. sh_wdt_keepalive(wdt);
  197. }
  198. return count;
  199. }
  200. static long sh_wdt_ioctl(struct file *file, unsigned int cmd,
  201. unsigned long arg)
  202. {
  203. struct sh_wdt *wdt = file->private_data;
  204. int new_heartbeat;
  205. int options, retval = -EINVAL;
  206. switch (cmd) {
  207. case WDIOC_GETSUPPORT:
  208. return copy_to_user((struct watchdog_info *)arg,
  209. &sh_wdt_info, sizeof(sh_wdt_info)) ? -EFAULT : 0;
  210. case WDIOC_GETSTATUS:
  211. case WDIOC_GETBOOTSTATUS:
  212. return put_user(0, (int *)arg);
  213. case WDIOC_SETOPTIONS:
  214. if (get_user(options, (int *)arg))
  215. return -EFAULT;
  216. if (options & WDIOS_DISABLECARD) {
  217. sh_wdt_stop(wdt);
  218. retval = 0;
  219. }
  220. if (options & WDIOS_ENABLECARD) {
  221. sh_wdt_start(wdt);
  222. retval = 0;
  223. }
  224. return retval;
  225. case WDIOC_KEEPALIVE:
  226. sh_wdt_keepalive(wdt);
  227. return 0;
  228. case WDIOC_SETTIMEOUT:
  229. if (get_user(new_heartbeat, (int *)arg))
  230. return -EFAULT;
  231. if (sh_wdt_set_heartbeat(new_heartbeat))
  232. return -EINVAL;
  233. sh_wdt_keepalive(wdt);
  234. /* Fall */
  235. case WDIOC_GETTIMEOUT:
  236. return put_user(heartbeat, (int *)arg);
  237. default:
  238. return -ENOTTY;
  239. }
  240. return 0;
  241. }
  242. static int sh_wdt_notify_sys(struct notifier_block *this,
  243. unsigned long code, void *unused)
  244. {
  245. struct sh_wdt *wdt = platform_get_drvdata(sh_wdt_dev);
  246. if (code == SYS_DOWN || code == SYS_HALT)
  247. sh_wdt_stop(wdt);
  248. return NOTIFY_DONE;
  249. }
  250. static const struct file_operations sh_wdt_fops = {
  251. .owner = THIS_MODULE,
  252. .llseek = no_llseek,
  253. .write = sh_wdt_write,
  254. .unlocked_ioctl = sh_wdt_ioctl,
  255. .open = sh_wdt_open,
  256. .release = sh_wdt_close,
  257. };
  258. static const struct watchdog_info sh_wdt_info = {
  259. .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
  260. WDIOF_MAGICCLOSE,
  261. .firmware_version = 1,
  262. .identity = "SH WDT",
  263. };
  264. static struct notifier_block sh_wdt_notifier = {
  265. .notifier_call = sh_wdt_notify_sys,
  266. };
  267. static struct miscdevice sh_wdt_miscdev = {
  268. .minor = WATCHDOG_MINOR,
  269. .name = "watchdog",
  270. .fops = &sh_wdt_fops,
  271. };
  272. static int __devinit sh_wdt_probe(struct platform_device *pdev)
  273. {
  274. struct sh_wdt *wdt;
  275. struct resource *res;
  276. int rc;
  277. /*
  278. * As this driver only covers the global watchdog case, reject
  279. * any attempts to register per-CPU watchdogs.
  280. */
  281. if (pdev->id != -1)
  282. return -EINVAL;
  283. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  284. if (unlikely(!res))
  285. return -EINVAL;
  286. if (!devm_request_mem_region(&pdev->dev, res->start,
  287. resource_size(res), DRV_NAME))
  288. return -EBUSY;
  289. wdt = devm_kzalloc(&pdev->dev, sizeof(struct sh_wdt), GFP_KERNEL);
  290. if (unlikely(!wdt)) {
  291. rc = -ENOMEM;
  292. goto out_release;
  293. }
  294. wdt->dev = &pdev->dev;
  295. wdt->base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
  296. if (unlikely(!wdt->base)) {
  297. rc = -ENXIO;
  298. goto out_err;
  299. }
  300. rc = register_reboot_notifier(&sh_wdt_notifier);
  301. if (unlikely(rc)) {
  302. dev_err(&pdev->dev,
  303. "Can't register reboot notifier (err=%d)\n", rc);
  304. goto out_unmap;
  305. }
  306. sh_wdt_miscdev.parent = wdt->dev;
  307. rc = misc_register(&sh_wdt_miscdev);
  308. if (unlikely(rc)) {
  309. dev_err(&pdev->dev,
  310. "Can't register miscdev on minor=%d (err=%d)\n",
  311. sh_wdt_miscdev.minor, rc);
  312. goto out_unreg;
  313. }
  314. init_timer(&wdt->timer);
  315. wdt->timer.function = sh_wdt_ping;
  316. wdt->timer.data = (unsigned long)wdt;
  317. wdt->timer.expires = next_ping_period(clock_division_ratio);
  318. platform_set_drvdata(pdev, wdt);
  319. sh_wdt_dev = pdev;
  320. dev_info(&pdev->dev, "initialized.\n");
  321. return 0;
  322. out_unreg:
  323. unregister_reboot_notifier(&sh_wdt_notifier);
  324. out_unmap:
  325. devm_iounmap(&pdev->dev, wdt->base);
  326. out_err:
  327. devm_kfree(&pdev->dev, wdt);
  328. out_release:
  329. devm_release_mem_region(&pdev->dev, res->start, resource_size(res));
  330. return rc;
  331. }
  332. static int __devexit sh_wdt_remove(struct platform_device *pdev)
  333. {
  334. struct sh_wdt *wdt = platform_get_drvdata(pdev);
  335. struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  336. platform_set_drvdata(pdev, NULL);
  337. misc_deregister(&sh_wdt_miscdev);
  338. sh_wdt_dev = NULL;
  339. unregister_reboot_notifier(&sh_wdt_notifier);
  340. devm_release_mem_region(&pdev->dev, res->start, resource_size(res));
  341. devm_iounmap(&pdev->dev, wdt->base);
  342. devm_kfree(&pdev->dev, wdt);
  343. return 0;
  344. }
  345. static struct platform_driver sh_wdt_driver = {
  346. .driver = {
  347. .name = DRV_NAME,
  348. .owner = THIS_MODULE,
  349. },
  350. .probe = sh_wdt_probe,
  351. .remove = __devexit_p(sh_wdt_remove),
  352. };
  353. static int __init sh_wdt_init(void)
  354. {
  355. int rc;
  356. if (unlikely(clock_division_ratio < 0x5 ||
  357. clock_division_ratio > 0x7)) {
  358. clock_division_ratio = WTCSR_CKS_4096;
  359. pr_info("%s: divisor must be 0x5<=x<=0x7, using %d\n",
  360. DRV_NAME, clock_division_ratio);
  361. }
  362. rc = sh_wdt_set_heartbeat(heartbeat);
  363. if (unlikely(rc)) {
  364. heartbeat = WATCHDOG_HEARTBEAT;
  365. pr_info("%s: heartbeat value must be 1<=x<=3600, using %d\n",
  366. DRV_NAME, heartbeat);
  367. }
  368. pr_info("%s: configured with heartbeat=%d sec (nowayout=%d)\n",
  369. DRV_NAME, heartbeat, nowayout);
  370. return platform_driver_register(&sh_wdt_driver);
  371. }
  372. static void __exit sh_wdt_exit(void)
  373. {
  374. platform_driver_unregister(&sh_wdt_driver);
  375. }
  376. module_init(sh_wdt_init);
  377. module_exit(sh_wdt_exit);
  378. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
  379. MODULE_DESCRIPTION("SuperH watchdog driver");
  380. MODULE_LICENSE("GPL");
  381. MODULE_ALIAS("platform:" DRV_NAME);
  382. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  383. module_param(clock_division_ratio, int, 0);
  384. MODULE_PARM_DESC(clock_division_ratio,
  385. "Clock division ratio. Valid ranges are from 0x5 (1.31ms) "
  386. "to 0x7 (5.25ms). (default=" __MODULE_STRING(WTCSR_CKS_4096) ")");
  387. module_param(heartbeat, int, 0);
  388. MODULE_PARM_DESC(heartbeat,
  389. "Watchdog heartbeat in seconds. (1 <= heartbeat <= 3600, default="
  390. __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
  391. module_param(nowayout, int, 0);
  392. MODULE_PARM_DESC(nowayout,
  393. "Watchdog cannot be stopped once started (default="
  394. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");