intel_scu_watchdog.h 2.0 KB

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  1. /*
  2. * Intel_SCU 0.2: An Intel SCU IOH Based Watchdog Device
  3. * for Intel part #(s):
  4. * - AF82MP20 PCH
  5. *
  6. * Copyright (C) 2009-2010 Intel Corporation. All rights reserved.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of version 2 of the GNU General
  10. * Public License as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be
  13. * useful, but WITHOUT ANY WARRANTY; without even the implied
  14. * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
  15. * PURPOSE. See the GNU General Public License for more details.
  16. * You should have received a copy of the GNU General Public
  17. * License along with this program; if not, write to the Free
  18. * Software Foundation, Inc., 59 Temple Place - Suite 330,
  19. * Boston, MA 02111-1307, USA.
  20. * The full GNU General Public License is included in this
  21. * distribution in the file called COPYING.
  22. *
  23. */
  24. #ifndef __INTEL_SCU_WATCHDOG_H
  25. #define __INTEL_SCU_WATCHDOG_H
  26. #define PFX "Intel_SCU: "
  27. #define WDT_VER "0.3"
  28. /* minimum time between interrupts */
  29. #define MIN_TIME_CYCLE 1
  30. /* Time from warning to reboot is 2 seconds */
  31. #define DEFAULT_SOFT_TO_HARD_MARGIN 2
  32. #define MAX_TIME 170
  33. #define DEFAULT_TIME 5
  34. #define MAX_SOFT_TO_HARD_MARGIN (MAX_TIME-MIN_TIME_CYCLE)
  35. /* Ajustment to clock tick frequency to make timing come out right */
  36. #define FREQ_ADJUSTMENT 8
  37. struct intel_scu_watchdog_dev {
  38. ulong driver_open;
  39. ulong driver_closed;
  40. u32 timer_started;
  41. u32 timer_set;
  42. u32 threshold;
  43. u32 soft_threshold;
  44. u32 __iomem *timer_load_count_addr;
  45. u32 __iomem *timer_current_value_addr;
  46. u32 __iomem *timer_control_addr;
  47. u32 __iomem *timer_clear_interrupt_addr;
  48. u32 __iomem *timer_interrupt_status_addr;
  49. struct sfi_timer_table_entry *timer_tbl_ptr;
  50. struct notifier_block intel_scu_notifier;
  51. struct miscdevice miscdev;
  52. };
  53. extern int sfi_mtimer_num;
  54. /* extern struct sfi_timer_table_entry *sfi_get_mtmr(int hint); */
  55. #endif /* __INTEL_SCU_WATCHDOG_H */