cpu5wdt.c 6.8 KB

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  1. /*
  2. * sma cpu5 watchdog driver
  3. *
  4. * Copyright (C) 2003 Heiko Ronsdorf <hero@ihg.uni-duisburg.de>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/types.h>
  24. #include <linux/errno.h>
  25. #include <linux/miscdevice.h>
  26. #include <linux/fs.h>
  27. #include <linux/init.h>
  28. #include <linux/ioport.h>
  29. #include <linux/timer.h>
  30. #include <linux/completion.h>
  31. #include <linux/jiffies.h>
  32. #include <linux/io.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/watchdog.h>
  35. /* adjustable parameters */
  36. static int verbose;
  37. static int port = 0x91;
  38. static int ticks = 10000;
  39. static spinlock_t cpu5wdt_lock;
  40. #define PFX "cpu5wdt: "
  41. #define CPU5WDT_EXTENT 0x0A
  42. #define CPU5WDT_STATUS_REG 0x00
  43. #define CPU5WDT_TIME_A_REG 0x02
  44. #define CPU5WDT_TIME_B_REG 0x03
  45. #define CPU5WDT_MODE_REG 0x04
  46. #define CPU5WDT_TRIGGER_REG 0x07
  47. #define CPU5WDT_ENABLE_REG 0x08
  48. #define CPU5WDT_RESET_REG 0x09
  49. #define CPU5WDT_INTERVAL (HZ/10+1)
  50. /* some device data */
  51. static struct {
  52. struct completion stop;
  53. int running;
  54. struct timer_list timer;
  55. int queue;
  56. int default_ticks;
  57. unsigned long inuse;
  58. } cpu5wdt_device;
  59. /* generic helper functions */
  60. static void cpu5wdt_trigger(unsigned long unused)
  61. {
  62. if (verbose > 2)
  63. printk(KERN_DEBUG PFX "trigger at %i ticks\n", ticks);
  64. if (cpu5wdt_device.running)
  65. ticks--;
  66. spin_lock(&cpu5wdt_lock);
  67. /* keep watchdog alive */
  68. outb(1, port + CPU5WDT_TRIGGER_REG);
  69. /* requeue?? */
  70. if (cpu5wdt_device.queue && ticks)
  71. mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
  72. else {
  73. /* ticks doesn't matter anyway */
  74. complete(&cpu5wdt_device.stop);
  75. }
  76. spin_unlock(&cpu5wdt_lock);
  77. }
  78. static void cpu5wdt_reset(void)
  79. {
  80. ticks = cpu5wdt_device.default_ticks;
  81. if (verbose)
  82. printk(KERN_DEBUG PFX "reset (%i ticks)\n", (int) ticks);
  83. }
  84. static void cpu5wdt_start(void)
  85. {
  86. unsigned long flags;
  87. spin_lock_irqsave(&cpu5wdt_lock, flags);
  88. if (!cpu5wdt_device.queue) {
  89. cpu5wdt_device.queue = 1;
  90. outb(0, port + CPU5WDT_TIME_A_REG);
  91. outb(0, port + CPU5WDT_TIME_B_REG);
  92. outb(1, port + CPU5WDT_MODE_REG);
  93. outb(0, port + CPU5WDT_RESET_REG);
  94. outb(0, port + CPU5WDT_ENABLE_REG);
  95. mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL);
  96. }
  97. /* if process dies, counter is not decremented */
  98. cpu5wdt_device.running++;
  99. spin_unlock_irqrestore(&cpu5wdt_lock, flags);
  100. }
  101. static int cpu5wdt_stop(void)
  102. {
  103. unsigned long flags;
  104. spin_lock_irqsave(&cpu5wdt_lock, flags);
  105. if (cpu5wdt_device.running)
  106. cpu5wdt_device.running = 0;
  107. ticks = cpu5wdt_device.default_ticks;
  108. spin_unlock_irqrestore(&cpu5wdt_lock, flags);
  109. if (verbose)
  110. printk(KERN_CRIT PFX "stop not possible\n");
  111. return -EIO;
  112. }
  113. /* filesystem operations */
  114. static int cpu5wdt_open(struct inode *inode, struct file *file)
  115. {
  116. if (test_and_set_bit(0, &cpu5wdt_device.inuse))
  117. return -EBUSY;
  118. return nonseekable_open(inode, file);
  119. }
  120. static int cpu5wdt_release(struct inode *inode, struct file *file)
  121. {
  122. clear_bit(0, &cpu5wdt_device.inuse);
  123. return 0;
  124. }
  125. static long cpu5wdt_ioctl(struct file *file, unsigned int cmd,
  126. unsigned long arg)
  127. {
  128. void __user *argp = (void __user *)arg;
  129. int __user *p = argp;
  130. unsigned int value;
  131. static const struct watchdog_info ident = {
  132. .options = WDIOF_CARDRESET,
  133. .identity = "CPU5 WDT",
  134. };
  135. switch (cmd) {
  136. case WDIOC_GETSUPPORT:
  137. if (copy_to_user(argp, &ident, sizeof(ident)))
  138. return -EFAULT;
  139. break;
  140. case WDIOC_GETSTATUS:
  141. value = inb(port + CPU5WDT_STATUS_REG);
  142. value = (value >> 2) & 1;
  143. return put_user(value, p);
  144. case WDIOC_GETBOOTSTATUS:
  145. return put_user(0, p);
  146. case WDIOC_SETOPTIONS:
  147. if (get_user(value, p))
  148. return -EFAULT;
  149. if (value & WDIOS_ENABLECARD)
  150. cpu5wdt_start();
  151. if (value & WDIOS_DISABLECARD)
  152. cpu5wdt_stop();
  153. break;
  154. case WDIOC_KEEPALIVE:
  155. cpu5wdt_reset();
  156. break;
  157. default:
  158. return -ENOTTY;
  159. }
  160. return 0;
  161. }
  162. static ssize_t cpu5wdt_write(struct file *file, const char __user *buf,
  163. size_t count, loff_t *ppos)
  164. {
  165. if (!count)
  166. return -EIO;
  167. cpu5wdt_reset();
  168. return count;
  169. }
  170. static const struct file_operations cpu5wdt_fops = {
  171. .owner = THIS_MODULE,
  172. .llseek = no_llseek,
  173. .unlocked_ioctl = cpu5wdt_ioctl,
  174. .open = cpu5wdt_open,
  175. .write = cpu5wdt_write,
  176. .release = cpu5wdt_release,
  177. };
  178. static struct miscdevice cpu5wdt_misc = {
  179. .minor = WATCHDOG_MINOR,
  180. .name = "watchdog",
  181. .fops = &cpu5wdt_fops,
  182. };
  183. /* init/exit function */
  184. static int __devinit cpu5wdt_init(void)
  185. {
  186. unsigned int val;
  187. int err;
  188. if (verbose)
  189. printk(KERN_DEBUG PFX
  190. "port=0x%x, verbose=%i\n", port, verbose);
  191. init_completion(&cpu5wdt_device.stop);
  192. spin_lock_init(&cpu5wdt_lock);
  193. cpu5wdt_device.queue = 0;
  194. setup_timer(&cpu5wdt_device.timer, cpu5wdt_trigger, 0);
  195. cpu5wdt_device.default_ticks = ticks;
  196. if (!request_region(port, CPU5WDT_EXTENT, PFX)) {
  197. printk(KERN_ERR PFX "request_region failed\n");
  198. err = -EBUSY;
  199. goto no_port;
  200. }
  201. /* watchdog reboot? */
  202. val = inb(port + CPU5WDT_STATUS_REG);
  203. val = (val >> 2) & 1;
  204. if (!val)
  205. printk(KERN_INFO PFX "sorry, was my fault\n");
  206. err = misc_register(&cpu5wdt_misc);
  207. if (err < 0) {
  208. printk(KERN_ERR PFX "misc_register failed\n");
  209. goto no_misc;
  210. }
  211. printk(KERN_INFO PFX "init success\n");
  212. return 0;
  213. no_misc:
  214. release_region(port, CPU5WDT_EXTENT);
  215. no_port:
  216. return err;
  217. }
  218. static int __devinit cpu5wdt_init_module(void)
  219. {
  220. return cpu5wdt_init();
  221. }
  222. static void __devexit cpu5wdt_exit(void)
  223. {
  224. if (cpu5wdt_device.queue) {
  225. cpu5wdt_device.queue = 0;
  226. wait_for_completion(&cpu5wdt_device.stop);
  227. }
  228. misc_deregister(&cpu5wdt_misc);
  229. release_region(port, CPU5WDT_EXTENT);
  230. }
  231. static void __devexit cpu5wdt_exit_module(void)
  232. {
  233. cpu5wdt_exit();
  234. }
  235. /* module entry points */
  236. module_init(cpu5wdt_init_module);
  237. module_exit(cpu5wdt_exit_module);
  238. MODULE_AUTHOR("Heiko Ronsdorf <hero@ihg.uni-duisburg.de>");
  239. MODULE_DESCRIPTION("sma cpu5 watchdog driver");
  240. MODULE_SUPPORTED_DEVICE("sma cpu5 watchdog");
  241. MODULE_LICENSE("GPL");
  242. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  243. module_param(port, int, 0);
  244. MODULE_PARM_DESC(port, "base address of watchdog card, default is 0x91");
  245. module_param(verbose, int, 0);
  246. MODULE_PARM_DESC(verbose, "be verbose, default is 0 (no)");
  247. module_param(ticks, int, 0);
  248. MODULE_PARM_DESC(ticks, "count down ticks, default is 10000");