bfin-t350mcqb-fb.c 16 KB

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  1. /*
  2. * File: drivers/video/bfin-t350mcqb-fb.c
  3. * Based on:
  4. * Author: Michael Hennerich <hennerich@blackfin.uclinux.org>
  5. *
  6. * Created:
  7. * Description: Blackfin LCD Framebufer driver
  8. *
  9. *
  10. * Modified:
  11. * Copyright 2004-2007 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/module.h>
  31. #include <linux/kernel.h>
  32. #include <linux/errno.h>
  33. #include <linux/string.h>
  34. #include <linux/gfp.h>
  35. #include <linux/fb.h>
  36. #include <linux/init.h>
  37. #include <linux/types.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/device.h>
  40. #include <linux/backlight.h>
  41. #include <linux/lcd.h>
  42. #include <linux/dma-mapping.h>
  43. #include <linux/platform_device.h>
  44. #include <asm/blackfin.h>
  45. #include <asm/irq.h>
  46. #include <asm/dma-mapping.h>
  47. #include <asm/dma.h>
  48. #include <asm/portmux.h>
  49. #include <asm/gptimers.h>
  50. #define NO_BL_SUPPORT
  51. #define LCD_X_RES 320 /* Horizontal Resolution */
  52. #define LCD_Y_RES 240 /* Vertical Resolution */
  53. #define LCD_BPP 24 /* Bit Per Pixel */
  54. #define DMA_BUS_SIZE 16
  55. #define LCD_CLK (12*1000*1000) /* 12MHz */
  56. #define CLOCKS_PER_PIX 3
  57. /*
  58. * HS and VS timing parameters (all in number of PPI clk ticks)
  59. */
  60. #define U_LINE 1 /* Blanking Lines */
  61. #define H_ACTPIX (LCD_X_RES * CLOCKS_PER_PIX) /* active horizontal pixel */
  62. #define H_PERIOD (408 * CLOCKS_PER_PIX) /* HS period */
  63. #define H_PULSE 90 /* HS pulse width */
  64. #define H_START 204 /* first valid pixel */
  65. #define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */
  66. #define V_PULSE (3 * H_PERIOD) /* VS pulse width (1-5 H_PERIODs) */
  67. #define V_PERIOD (H_PERIOD * V_LINES) /* VS period */
  68. #define ACTIVE_VIDEO_MEM_OFFSET (U_LINE * H_ACTPIX)
  69. #define BFIN_LCD_NBR_PALETTE_ENTRIES 256
  70. #define DRIVER_NAME "bfin-t350mcqb"
  71. static char driver_name[] = DRIVER_NAME;
  72. struct bfin_t350mcqbfb_info {
  73. struct fb_info *fb;
  74. struct device *dev;
  75. unsigned char *fb_buffer; /* RGB Buffer */
  76. dma_addr_t dma_handle;
  77. int lq043_open_cnt;
  78. int irq;
  79. spinlock_t lock; /* lock */
  80. u32 pseudo_pal[16];
  81. };
  82. static int nocursor;
  83. module_param(nocursor, int, 0644);
  84. MODULE_PARM_DESC(nocursor, "cursor enable/disable");
  85. #define PPI_TX_MODE 0x2
  86. #define PPI_XFER_TYPE_11 0xC
  87. #define PPI_PORT_CFG_01 0x10
  88. #define PPI_PACK_EN 0x80
  89. #define PPI_POLS_1 0x8000
  90. static void bfin_t350mcqb_config_ppi(struct bfin_t350mcqbfb_info *fbi)
  91. {
  92. bfin_write_PPI_DELAY(H_START);
  93. bfin_write_PPI_COUNT(H_ACTPIX-1);
  94. bfin_write_PPI_FRAME(V_LINES);
  95. bfin_write_PPI_CONTROL(PPI_TX_MODE | /* output mode , PORT_DIR */
  96. PPI_XFER_TYPE_11 | /* sync mode XFR_TYPE */
  97. PPI_PORT_CFG_01 | /* two frame sync PORT_CFG */
  98. PPI_PACK_EN | /* packing enabled PACK_EN */
  99. PPI_POLS_1); /* faling edge syncs POLS */
  100. }
  101. static inline void bfin_t350mcqb_disable_ppi(void)
  102. {
  103. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() & ~PORT_EN);
  104. }
  105. static inline void bfin_t350mcqb_enable_ppi(void)
  106. {
  107. bfin_write_PPI_CONTROL(bfin_read_PPI_CONTROL() | PORT_EN);
  108. }
  109. static void bfin_t350mcqb_start_timers(void)
  110. {
  111. unsigned long flags;
  112. local_irq_save(flags);
  113. enable_gptimers(TIMER1bit);
  114. enable_gptimers(TIMER0bit);
  115. local_irq_restore(flags);
  116. }
  117. static void bfin_t350mcqb_stop_timers(void)
  118. {
  119. disable_gptimers(TIMER0bit | TIMER1bit);
  120. set_gptimer_status(0, TIMER_STATUS_TRUN0 | TIMER_STATUS_TRUN1 |
  121. TIMER_STATUS_TIMIL0 | TIMER_STATUS_TIMIL1 |
  122. TIMER_STATUS_TOVF0 | TIMER_STATUS_TOVF1);
  123. }
  124. static void bfin_t350mcqb_init_timers(void)
  125. {
  126. bfin_t350mcqb_stop_timers();
  127. set_gptimer_period(TIMER0_id, H_PERIOD);
  128. set_gptimer_pwidth(TIMER0_id, H_PULSE);
  129. set_gptimer_config(TIMER0_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
  130. TIMER_TIN_SEL | TIMER_CLK_SEL|
  131. TIMER_EMU_RUN);
  132. set_gptimer_period(TIMER1_id, V_PERIOD);
  133. set_gptimer_pwidth(TIMER1_id, V_PULSE);
  134. set_gptimer_config(TIMER1_id, TIMER_MODE_PWM | TIMER_PERIOD_CNT |
  135. TIMER_TIN_SEL | TIMER_CLK_SEL |
  136. TIMER_EMU_RUN);
  137. }
  138. static void bfin_t350mcqb_config_dma(struct bfin_t350mcqbfb_info *fbi)
  139. {
  140. set_dma_config(CH_PPI,
  141. set_bfin_dma_config(DIR_READ, DMA_FLOW_AUTO,
  142. INTR_DISABLE, DIMENSION_2D,
  143. DATA_SIZE_16,
  144. DMA_NOSYNC_KEEP_DMA_BUF));
  145. set_dma_x_count(CH_PPI, (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE);
  146. set_dma_x_modify(CH_PPI, DMA_BUS_SIZE / 8);
  147. set_dma_y_count(CH_PPI, V_LINES);
  148. set_dma_y_modify(CH_PPI, DMA_BUS_SIZE / 8);
  149. set_dma_start_addr(CH_PPI, (unsigned long)fbi->fb_buffer);
  150. }
  151. static u16 ppi0_req_8[] = {P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
  152. P_PPI0_D0, P_PPI0_D1, P_PPI0_D2,
  153. P_PPI0_D3, P_PPI0_D4, P_PPI0_D5,
  154. P_PPI0_D6, P_PPI0_D7, 0};
  155. static int bfin_t350mcqb_request_ports(int action)
  156. {
  157. if (action) {
  158. if (peripheral_request_list(ppi0_req_8, DRIVER_NAME)) {
  159. printk(KERN_ERR "Requesting Peripherals failed\n");
  160. return -EFAULT;
  161. }
  162. } else
  163. peripheral_free_list(ppi0_req_8);
  164. return 0;
  165. }
  166. static int bfin_t350mcqb_fb_open(struct fb_info *info, int user)
  167. {
  168. struct bfin_t350mcqbfb_info *fbi = info->par;
  169. spin_lock(&fbi->lock);
  170. fbi->lq043_open_cnt++;
  171. if (fbi->lq043_open_cnt <= 1) {
  172. bfin_t350mcqb_disable_ppi();
  173. SSYNC();
  174. bfin_t350mcqb_config_dma(fbi);
  175. bfin_t350mcqb_config_ppi(fbi);
  176. bfin_t350mcqb_init_timers();
  177. /* start dma */
  178. enable_dma(CH_PPI);
  179. bfin_t350mcqb_enable_ppi();
  180. bfin_t350mcqb_start_timers();
  181. }
  182. spin_unlock(&fbi->lock);
  183. return 0;
  184. }
  185. static int bfin_t350mcqb_fb_release(struct fb_info *info, int user)
  186. {
  187. struct bfin_t350mcqbfb_info *fbi = info->par;
  188. spin_lock(&fbi->lock);
  189. fbi->lq043_open_cnt--;
  190. if (fbi->lq043_open_cnt <= 0) {
  191. bfin_t350mcqb_disable_ppi();
  192. SSYNC();
  193. disable_dma(CH_PPI);
  194. bfin_t350mcqb_stop_timers();
  195. }
  196. spin_unlock(&fbi->lock);
  197. return 0;
  198. }
  199. static int bfin_t350mcqb_fb_check_var(struct fb_var_screeninfo *var,
  200. struct fb_info *info)
  201. {
  202. switch (var->bits_per_pixel) {
  203. case 24:/* TRUECOLOUR, 16m */
  204. var->red.offset = 0;
  205. var->green.offset = 8;
  206. var->blue.offset = 16;
  207. var->red.length = var->green.length = var->blue.length = 8;
  208. var->transp.offset = 0;
  209. var->transp.length = 0;
  210. var->transp.msb_right = 0;
  211. var->red.msb_right = 0;
  212. var->green.msb_right = 0;
  213. var->blue.msb_right = 0;
  214. break;
  215. default:
  216. pr_debug("%s: depth not supported: %u BPP\n", __func__,
  217. var->bits_per_pixel);
  218. return -EINVAL;
  219. }
  220. if (info->var.xres != var->xres || info->var.yres != var->yres ||
  221. info->var.xres_virtual != var->xres_virtual ||
  222. info->var.yres_virtual != var->yres_virtual) {
  223. pr_debug("%s: Resolution not supported: X%u x Y%u \n",
  224. __func__, var->xres, var->yres);
  225. return -EINVAL;
  226. }
  227. /*
  228. * Memory limit
  229. */
  230. if ((info->fix.line_length * var->yres_virtual) > info->fix.smem_len) {
  231. pr_debug("%s: Memory Limit requested yres_virtual = %u\n",
  232. __func__, var->yres_virtual);
  233. return -ENOMEM;
  234. }
  235. return 0;
  236. }
  237. int bfin_t350mcqb_fb_cursor(struct fb_info *info, struct fb_cursor *cursor)
  238. {
  239. if (nocursor)
  240. return 0;
  241. else
  242. return -EINVAL; /* just to force soft_cursor() call */
  243. }
  244. static int bfin_t350mcqb_fb_setcolreg(u_int regno, u_int red, u_int green,
  245. u_int blue, u_int transp,
  246. struct fb_info *info)
  247. {
  248. if (regno >= BFIN_LCD_NBR_PALETTE_ENTRIES)
  249. return -EINVAL;
  250. if (info->var.grayscale) {
  251. /* grayscale = 0.30*R + 0.59*G + 0.11*B */
  252. red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
  253. }
  254. if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
  255. u32 value;
  256. /* Place color in the pseudopalette */
  257. if (regno > 16)
  258. return -EINVAL;
  259. red >>= (16 - info->var.red.length);
  260. green >>= (16 - info->var.green.length);
  261. blue >>= (16 - info->var.blue.length);
  262. value = (red << info->var.red.offset) |
  263. (green << info->var.green.offset) |
  264. (blue << info->var.blue.offset);
  265. value &= 0xFFFFFF;
  266. ((u32 *) (info->pseudo_palette))[regno] = value;
  267. }
  268. return 0;
  269. }
  270. static struct fb_ops bfin_t350mcqb_fb_ops = {
  271. .owner = THIS_MODULE,
  272. .fb_open = bfin_t350mcqb_fb_open,
  273. .fb_release = bfin_t350mcqb_fb_release,
  274. .fb_check_var = bfin_t350mcqb_fb_check_var,
  275. .fb_fillrect = cfb_fillrect,
  276. .fb_copyarea = cfb_copyarea,
  277. .fb_imageblit = cfb_imageblit,
  278. .fb_cursor = bfin_t350mcqb_fb_cursor,
  279. .fb_setcolreg = bfin_t350mcqb_fb_setcolreg,
  280. };
  281. #ifndef NO_BL_SUPPORT
  282. static int bl_get_brightness(struct backlight_device *bd)
  283. {
  284. return 0;
  285. }
  286. static const struct backlight_ops bfin_lq043fb_bl_ops = {
  287. .get_brightness = bl_get_brightness,
  288. };
  289. static struct backlight_device *bl_dev;
  290. static int bfin_lcd_get_power(struct lcd_device *dev)
  291. {
  292. return 0;
  293. }
  294. static int bfin_lcd_set_power(struct lcd_device *dev, int power)
  295. {
  296. return 0;
  297. }
  298. static int bfin_lcd_get_contrast(struct lcd_device *dev)
  299. {
  300. return 0;
  301. }
  302. static int bfin_lcd_set_contrast(struct lcd_device *dev, int contrast)
  303. {
  304. return 0;
  305. }
  306. static int bfin_lcd_check_fb(struct lcd_device *dev, struct fb_info *fi)
  307. {
  308. if (!fi || (fi == &bfin_t350mcqb_fb))
  309. return 1;
  310. return 0;
  311. }
  312. static struct lcd_ops bfin_lcd_ops = {
  313. .get_power = bfin_lcd_get_power,
  314. .set_power = bfin_lcd_set_power,
  315. .get_contrast = bfin_lcd_get_contrast,
  316. .set_contrast = bfin_lcd_set_contrast,
  317. .check_fb = bfin_lcd_check_fb,
  318. };
  319. static struct lcd_device *lcd_dev;
  320. #endif
  321. static irqreturn_t bfin_t350mcqb_irq_error(int irq, void *dev_id)
  322. {
  323. /*struct bfin_t350mcqbfb_info *info = (struct bfin_t350mcqbfb_info *)dev_id;*/
  324. u16 status = bfin_read_PPI_STATUS();
  325. bfin_write_PPI_STATUS(0xFFFF);
  326. if (status) {
  327. bfin_t350mcqb_disable_ppi();
  328. disable_dma(CH_PPI);
  329. /* start dma */
  330. enable_dma(CH_PPI);
  331. bfin_t350mcqb_enable_ppi();
  332. bfin_write_PPI_STATUS(0xFFFF);
  333. }
  334. return IRQ_HANDLED;
  335. }
  336. static int __devinit bfin_t350mcqb_probe(struct platform_device *pdev)
  337. {
  338. #ifndef NO_BL_SUPPORT
  339. struct backlight_properties props;
  340. #endif
  341. struct bfin_t350mcqbfb_info *info;
  342. struct fb_info *fbinfo;
  343. int ret;
  344. printk(KERN_INFO DRIVER_NAME ": %dx%d %d-bit RGB FrameBuffer initializing...\n",
  345. LCD_X_RES, LCD_Y_RES, LCD_BPP);
  346. if (request_dma(CH_PPI, "CH_PPI") < 0) {
  347. printk(KERN_ERR DRIVER_NAME
  348. ": couldn't request CH_PPI DMA\n");
  349. ret = -EFAULT;
  350. goto out1;
  351. }
  352. fbinfo =
  353. framebuffer_alloc(sizeof(struct bfin_t350mcqbfb_info), &pdev->dev);
  354. if (!fbinfo) {
  355. ret = -ENOMEM;
  356. goto out2;
  357. }
  358. info = fbinfo->par;
  359. info->fb = fbinfo;
  360. info->dev = &pdev->dev;
  361. platform_set_drvdata(pdev, fbinfo);
  362. strcpy(fbinfo->fix.id, driver_name);
  363. fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
  364. fbinfo->fix.type_aux = 0;
  365. fbinfo->fix.xpanstep = 0;
  366. fbinfo->fix.ypanstep = 0;
  367. fbinfo->fix.ywrapstep = 0;
  368. fbinfo->fix.accel = FB_ACCEL_NONE;
  369. fbinfo->fix.visual = FB_VISUAL_TRUECOLOR;
  370. fbinfo->var.nonstd = 0;
  371. fbinfo->var.activate = FB_ACTIVATE_NOW;
  372. fbinfo->var.height = 53;
  373. fbinfo->var.width = 70;
  374. fbinfo->var.accel_flags = 0;
  375. fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
  376. fbinfo->var.xres = LCD_X_RES;
  377. fbinfo->var.xres_virtual = LCD_X_RES;
  378. fbinfo->var.yres = LCD_Y_RES;
  379. fbinfo->var.yres_virtual = LCD_Y_RES;
  380. fbinfo->var.bits_per_pixel = LCD_BPP;
  381. fbinfo->var.red.offset = 0;
  382. fbinfo->var.green.offset = 8;
  383. fbinfo->var.blue.offset = 16;
  384. fbinfo->var.transp.offset = 0;
  385. fbinfo->var.red.length = 8;
  386. fbinfo->var.green.length = 8;
  387. fbinfo->var.blue.length = 8;
  388. fbinfo->var.transp.length = 0;
  389. fbinfo->fix.smem_len = LCD_X_RES * LCD_Y_RES * LCD_BPP / 8;
  390. fbinfo->fix.line_length = fbinfo->var.xres_virtual *
  391. fbinfo->var.bits_per_pixel / 8;
  392. fbinfo->fbops = &bfin_t350mcqb_fb_ops;
  393. fbinfo->flags = FBINFO_FLAG_DEFAULT;
  394. info->fb_buffer = dma_alloc_coherent(NULL, fbinfo->fix.smem_len +
  395. ACTIVE_VIDEO_MEM_OFFSET,
  396. &info->dma_handle, GFP_KERNEL);
  397. if (NULL == info->fb_buffer) {
  398. printk(KERN_ERR DRIVER_NAME
  399. ": couldn't allocate dma buffer.\n");
  400. ret = -ENOMEM;
  401. goto out3;
  402. }
  403. fbinfo->screen_base = (void *)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
  404. fbinfo->fix.smem_start = (int)info->fb_buffer + ACTIVE_VIDEO_MEM_OFFSET;
  405. fbinfo->fbops = &bfin_t350mcqb_fb_ops;
  406. fbinfo->pseudo_palette = &info->pseudo_pal;
  407. if (fb_alloc_cmap(&fbinfo->cmap, BFIN_LCD_NBR_PALETTE_ENTRIES, 0)
  408. < 0) {
  409. printk(KERN_ERR DRIVER_NAME
  410. "Fail to allocate colormap (%d entries)\n",
  411. BFIN_LCD_NBR_PALETTE_ENTRIES);
  412. ret = -EFAULT;
  413. goto out4;
  414. }
  415. if (bfin_t350mcqb_request_ports(1)) {
  416. printk(KERN_ERR DRIVER_NAME ": couldn't request gpio port.\n");
  417. ret = -EFAULT;
  418. goto out6;
  419. }
  420. info->irq = platform_get_irq(pdev, 0);
  421. if (info->irq < 0) {
  422. ret = -EINVAL;
  423. goto out7;
  424. }
  425. ret = request_irq(info->irq, bfin_t350mcqb_irq_error, IRQF_DISABLED,
  426. "PPI ERROR", info);
  427. if (ret < 0) {
  428. printk(KERN_ERR DRIVER_NAME
  429. ": unable to request PPI ERROR IRQ\n");
  430. goto out7;
  431. }
  432. if (register_framebuffer(fbinfo) < 0) {
  433. printk(KERN_ERR DRIVER_NAME
  434. ": unable to register framebuffer.\n");
  435. ret = -EINVAL;
  436. goto out8;
  437. }
  438. #ifndef NO_BL_SUPPORT
  439. memset(&props, 0, sizeof(struct backlight_properties));
  440. props.type = BACKLIGHT_RAW;
  441. props.max_brightness = 255;
  442. bl_dev = backlight_device_register("bf52x-bl", NULL, NULL,
  443. &bfin_lq043fb_bl_ops, &props);
  444. if (IS_ERR(bl_dev)) {
  445. printk(KERN_ERR DRIVER_NAME
  446. ": unable to register backlight.\n");
  447. ret = -EINVAL;
  448. unregister_framebuffer(fbinfo);
  449. goto out8;
  450. }
  451. lcd_dev = lcd_device_register(DRIVER_NAME, NULL, &bfin_lcd_ops);
  452. lcd_dev->props.max_contrast = 255, printk(KERN_INFO "Done.\n");
  453. #endif
  454. return 0;
  455. out8:
  456. free_irq(info->irq, info);
  457. out7:
  458. bfin_t350mcqb_request_ports(0);
  459. out6:
  460. fb_dealloc_cmap(&fbinfo->cmap);
  461. out4:
  462. dma_free_coherent(NULL, fbinfo->fix.smem_len + ACTIVE_VIDEO_MEM_OFFSET,
  463. info->fb_buffer, info->dma_handle);
  464. out3:
  465. framebuffer_release(fbinfo);
  466. out2:
  467. free_dma(CH_PPI);
  468. out1:
  469. platform_set_drvdata(pdev, NULL);
  470. return ret;
  471. }
  472. static int __devexit bfin_t350mcqb_remove(struct platform_device *pdev)
  473. {
  474. struct fb_info *fbinfo = platform_get_drvdata(pdev);
  475. struct bfin_t350mcqbfb_info *info = fbinfo->par;
  476. unregister_framebuffer(fbinfo);
  477. free_dma(CH_PPI);
  478. free_irq(info->irq, info);
  479. if (info->fb_buffer != NULL)
  480. dma_free_coherent(NULL, fbinfo->fix.smem_len +
  481. ACTIVE_VIDEO_MEM_OFFSET, info->fb_buffer,
  482. info->dma_handle);
  483. fb_dealloc_cmap(&fbinfo->cmap);
  484. #ifndef NO_BL_SUPPORT
  485. lcd_device_unregister(lcd_dev);
  486. backlight_device_unregister(bl_dev);
  487. #endif
  488. bfin_t350mcqb_request_ports(0);
  489. platform_set_drvdata(pdev, NULL);
  490. framebuffer_release(fbinfo);
  491. printk(KERN_INFO DRIVER_NAME ": Unregister LCD driver.\n");
  492. return 0;
  493. }
  494. #ifdef CONFIG_PM
  495. static int bfin_t350mcqb_suspend(struct platform_device *pdev, pm_message_t state)
  496. {
  497. struct fb_info *fbinfo = platform_get_drvdata(pdev);
  498. struct bfin_t350mcqbfb_info *fbi = fbinfo->par;
  499. if (fbi->lq043_open_cnt) {
  500. bfin_t350mcqb_disable_ppi();
  501. disable_dma(CH_PPI);
  502. bfin_t350mcqb_stop_timers();
  503. bfin_write_PPI_STATUS(-1);
  504. }
  505. return 0;
  506. }
  507. static int bfin_t350mcqb_resume(struct platform_device *pdev)
  508. {
  509. struct fb_info *fbinfo = platform_get_drvdata(pdev);
  510. struct bfin_t350mcqbfb_info *fbi = fbinfo->par;
  511. if (fbi->lq043_open_cnt) {
  512. bfin_t350mcqb_config_dma(fbi);
  513. bfin_t350mcqb_config_ppi(fbi);
  514. bfin_t350mcqb_init_timers();
  515. /* start dma */
  516. enable_dma(CH_PPI);
  517. bfin_t350mcqb_enable_ppi();
  518. bfin_t350mcqb_start_timers();
  519. }
  520. return 0;
  521. }
  522. #else
  523. #define bfin_t350mcqb_suspend NULL
  524. #define bfin_t350mcqb_resume NULL
  525. #endif
  526. static struct platform_driver bfin_t350mcqb_driver = {
  527. .probe = bfin_t350mcqb_probe,
  528. .remove = __devexit_p(bfin_t350mcqb_remove),
  529. .suspend = bfin_t350mcqb_suspend,
  530. .resume = bfin_t350mcqb_resume,
  531. .driver = {
  532. .name = DRIVER_NAME,
  533. .owner = THIS_MODULE,
  534. },
  535. };
  536. static int __init bfin_t350mcqb_driver_init(void)
  537. {
  538. return platform_driver_register(&bfin_t350mcqb_driver);
  539. }
  540. static void __exit bfin_t350mcqb_driver_cleanup(void)
  541. {
  542. platform_driver_unregister(&bfin_t350mcqb_driver);
  543. }
  544. MODULE_DESCRIPTION("Blackfin TFT LCD Driver");
  545. MODULE_LICENSE("GPL");
  546. module_init(bfin_t350mcqb_driver_init);
  547. module_exit(bfin_t350mcqb_driver_cleanup);