davinci.h 3.3 KB

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  1. /*
  2. * Copyright (C) 2005-2006 by Texas Instruments
  3. *
  4. * The Inventra Controller Driver for Linux is free software; you
  5. * can redistribute it and/or modify it under the terms of the GNU
  6. * General Public License version 2 as published by the Free Software
  7. * Foundation.
  8. */
  9. #ifndef __MUSB_HDRDF_H__
  10. #define __MUSB_HDRDF_H__
  11. /*
  12. * DaVinci-specific definitions
  13. */
  14. /* Integrated highspeed/otg PHY */
  15. #define USBPHY_CTL_PADDR (DAVINCI_SYSTEM_MODULE_BASE + 0x34)
  16. #define USBPHY_DATAPOL BIT(11) /* (dm355) switch D+/D- */
  17. #define USBPHY_PHYCLKGD BIT(8)
  18. #define USBPHY_SESNDEN BIT(7) /* v(sess_end) comparator */
  19. #define USBPHY_VBDTCTEN BIT(6) /* v(bus) comparator */
  20. #define USBPHY_VBUSSENS BIT(5) /* (dm355,ro) is vbus > 0.5V */
  21. #define USBPHY_PHYPLLON BIT(4) /* override pll suspend */
  22. #define USBPHY_CLKO1SEL BIT(3)
  23. #define USBPHY_OSCPDWN BIT(2)
  24. #define USBPHY_OTGPDWN BIT(1)
  25. #define USBPHY_PHYPDWN BIT(0)
  26. #define DM355_DEEPSLEEP_PADDR (DAVINCI_SYSTEM_MODULE_BASE + 0x48)
  27. #define DRVVBUS_FORCE BIT(2)
  28. #define DRVVBUS_OVERRIDE BIT(1)
  29. /* For now include usb OTG module registers here */
  30. #define DAVINCI_USB_VERSION_REG 0x00
  31. #define DAVINCI_USB_CTRL_REG 0x04
  32. #define DAVINCI_USB_STAT_REG 0x08
  33. #define DAVINCI_RNDIS_REG 0x10
  34. #define DAVINCI_AUTOREQ_REG 0x14
  35. #define DAVINCI_USB_INT_SOURCE_REG 0x20
  36. #define DAVINCI_USB_INT_SET_REG 0x24
  37. #define DAVINCI_USB_INT_SRC_CLR_REG 0x28
  38. #define DAVINCI_USB_INT_MASK_REG 0x2c
  39. #define DAVINCI_USB_INT_MASK_SET_REG 0x30
  40. #define DAVINCI_USB_INT_MASK_CLR_REG 0x34
  41. #define DAVINCI_USB_INT_SRC_MASKED_REG 0x38
  42. #define DAVINCI_USB_EOI_REG 0x3c
  43. #define DAVINCI_USB_EOI_INTVEC 0x40
  44. /* BEGIN CPPI-generic (?) */
  45. /* CPPI related registers */
  46. #define DAVINCI_TXCPPI_CTRL_REG 0x80
  47. #define DAVINCI_TXCPPI_TEAR_REG 0x84
  48. #define DAVINCI_CPPI_EOI_REG 0x88
  49. #define DAVINCI_CPPI_INTVEC_REG 0x8c
  50. #define DAVINCI_TXCPPI_MASKED_REG 0x90
  51. #define DAVINCI_TXCPPI_RAW_REG 0x94
  52. #define DAVINCI_TXCPPI_INTENAB_REG 0x98
  53. #define DAVINCI_TXCPPI_INTCLR_REG 0x9c
  54. #define DAVINCI_RXCPPI_CTRL_REG 0xC0
  55. #define DAVINCI_RXCPPI_MASKED_REG 0xD0
  56. #define DAVINCI_RXCPPI_RAW_REG 0xD4
  57. #define DAVINCI_RXCPPI_INTENAB_REG 0xD8
  58. #define DAVINCI_RXCPPI_INTCLR_REG 0xDC
  59. #define DAVINCI_RXCPPI_BUFCNT0_REG 0xE0
  60. #define DAVINCI_RXCPPI_BUFCNT1_REG 0xE4
  61. #define DAVINCI_RXCPPI_BUFCNT2_REG 0xE8
  62. #define DAVINCI_RXCPPI_BUFCNT3_REG 0xEC
  63. /* CPPI state RAM entries */
  64. #define DAVINCI_CPPI_STATERAM_BASE_OFFSET 0x100
  65. #define DAVINCI_TXCPPI_STATERAM_OFFSET(chnum) \
  66. (DAVINCI_CPPI_STATERAM_BASE_OFFSET + ((chnum) * 0x40))
  67. #define DAVINCI_RXCPPI_STATERAM_OFFSET(chnum) \
  68. (DAVINCI_CPPI_STATERAM_BASE_OFFSET + 0x20 + ((chnum) * 0x40))
  69. /* CPPI masks */
  70. #define DAVINCI_DMA_CTRL_ENABLE 1
  71. #define DAVINCI_DMA_CTRL_DISABLE 0
  72. #define DAVINCI_DMA_ALL_CHANNELS_ENABLE 0xF
  73. #define DAVINCI_DMA_ALL_CHANNELS_DISABLE 0xF
  74. /* END CPPI-generic (?) */
  75. #define DAVINCI_USB_TX_ENDPTS_MASK 0x1f /* ep0 + 4 tx */
  76. #define DAVINCI_USB_RX_ENDPTS_MASK 0x1e /* 4 rx */
  77. #define DAVINCI_USB_USBINT_SHIFT 16
  78. #define DAVINCI_USB_TXINT_SHIFT 0
  79. #define DAVINCI_USB_RXINT_SHIFT 8
  80. #define DAVINCI_INTR_DRVVBUS 0x0100
  81. #define DAVINCI_USB_USBINT_MASK 0x01ff0000 /* 8 Mentor, DRVVBUS */
  82. #define DAVINCI_USB_TXINT_MASK \
  83. (DAVINCI_USB_TX_ENDPTS_MASK << DAVINCI_USB_TXINT_SHIFT)
  84. #define DAVINCI_USB_RXINT_MASK \
  85. (DAVINCI_USB_RX_ENDPTS_MASK << DAVINCI_USB_RXINT_SHIFT)
  86. #define DAVINCI_BASE_OFFSET 0x400
  87. #endif /* __MUSB_HDRDF_H__ */