ohci-pnx4008.c 11 KB

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  1. /*
  2. * drivers/usb/host/ohci-pnx4008.c
  3. *
  4. * driver for Philips PNX4008 USB Host
  5. *
  6. * Authors: Dmitry Chigirev <source@mvista.com>
  7. * Vitaly Wool <vitalywool@gmail.com>
  8. *
  9. * register initialization is based on code examples provided by Philips
  10. * Copyright (c) 2005 Koninklijke Philips Electronics N.V.
  11. *
  12. * NOTE: This driver does not have suspend/resume functionality
  13. * This driver is intended for engineering development purposes only
  14. *
  15. * 2005-2006 (c) MontaVista Software, Inc. This file is licensed under
  16. * the terms of the GNU General Public License version 2. This program
  17. * is licensed "as is" without any warranty of any kind, whether express
  18. * or implied.
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/i2c.h>
  23. #include <mach/hardware.h>
  24. #include <asm/io.h>
  25. #include <mach/platform.h>
  26. #include <mach/irqs.h>
  27. #include <mach/gpio.h>
  28. #define USB_CTRL IO_ADDRESS(PNX4008_PWRMAN_BASE + 0x64)
  29. /* USB_CTRL bit defines */
  30. #define USB_SLAVE_HCLK_EN (1 << 24)
  31. #define USB_HOST_NEED_CLK_EN (1 << 21)
  32. #define USB_OTG_CLK_CTRL IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0xFF4)
  33. #define USB_OTG_CLK_STAT IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0xFF8)
  34. /* USB_OTG_CLK_CTRL bit defines */
  35. #define AHB_M_CLOCK_ON (1 << 4)
  36. #define OTG_CLOCK_ON (1 << 3)
  37. #define I2C_CLOCK_ON (1 << 2)
  38. #define DEV_CLOCK_ON (1 << 1)
  39. #define HOST_CLOCK_ON (1 << 0)
  40. #define USB_OTG_STAT_CONTROL IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0x110)
  41. /* USB_OTG_STAT_CONTROL bit defines */
  42. #define TRANSPARENT_I2C_EN (1 << 7)
  43. #define HOST_EN (1 << 0)
  44. /* ISP1301 USB transceiver I2C registers */
  45. #define ISP1301_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */
  46. #define MC1_SPEED_REG (1 << 0)
  47. #define MC1_SUSPEND_REG (1 << 1)
  48. #define MC1_DAT_SE0 (1 << 2)
  49. #define MC1_TRANSPARENT (1 << 3)
  50. #define MC1_BDIS_ACON_EN (1 << 4)
  51. #define MC1_OE_INT_EN (1 << 5)
  52. #define MC1_UART_EN (1 << 6)
  53. #define MC1_MASK 0x7f
  54. #define ISP1301_MODE_CONTROL_2 0x12 /* u8 read, set, +1 clear */
  55. #define MC2_GLOBAL_PWR_DN (1 << 0)
  56. #define MC2_SPD_SUSP_CTRL (1 << 1)
  57. #define MC2_BI_DI (1 << 2)
  58. #define MC2_TRANSP_BDIR0 (1 << 3)
  59. #define MC2_TRANSP_BDIR1 (1 << 4)
  60. #define MC2_AUDIO_EN (1 << 5)
  61. #define MC2_PSW_EN (1 << 6)
  62. #define MC2_EN2V7 (1 << 7)
  63. #define ISP1301_OTG_CONTROL_1 0x06 /* u8 read, set, +1 clear */
  64. # define OTG1_DP_PULLUP (1 << 0)
  65. # define OTG1_DM_PULLUP (1 << 1)
  66. # define OTG1_DP_PULLDOWN (1 << 2)
  67. # define OTG1_DM_PULLDOWN (1 << 3)
  68. # define OTG1_ID_PULLDOWN (1 << 4)
  69. # define OTG1_VBUS_DRV (1 << 5)
  70. # define OTG1_VBUS_DISCHRG (1 << 6)
  71. # define OTG1_VBUS_CHRG (1 << 7)
  72. #define ISP1301_OTG_STATUS 0x10 /* u8 readonly */
  73. # define OTG_B_SESS_END (1 << 6)
  74. # define OTG_B_SESS_VLD (1 << 7)
  75. #define ISP1301_I2C_ADDR 0x2C
  76. #define ISP1301_I2C_MODE_CONTROL_1 0x4
  77. #define ISP1301_I2C_MODE_CONTROL_2 0x12
  78. #define ISP1301_I2C_OTG_CONTROL_1 0x6
  79. #define ISP1301_I2C_OTG_CONTROL_2 0x10
  80. #define ISP1301_I2C_INTERRUPT_SOURCE 0x8
  81. #define ISP1301_I2C_INTERRUPT_LATCH 0xA
  82. #define ISP1301_I2C_INTERRUPT_FALLING 0xC
  83. #define ISP1301_I2C_INTERRUPT_RISING 0xE
  84. #define ISP1301_I2C_REG_CLEAR_ADDR 1
  85. static struct i2c_driver isp1301_driver;
  86. static struct i2c_client *isp1301_i2c_client;
  87. extern int usb_disabled(void);
  88. extern int ocpi_enable(void);
  89. static struct clk *usb_clk;
  90. static const unsigned short normal_i2c[] =
  91. { ISP1301_I2C_ADDR, ISP1301_I2C_ADDR + 1, I2C_CLIENT_END };
  92. static int isp1301_probe(struct i2c_client *client,
  93. const struct i2c_device_id *id)
  94. {
  95. return 0;
  96. }
  97. static int isp1301_remove(struct i2c_client *client)
  98. {
  99. return 0;
  100. }
  101. static const struct i2c_device_id isp1301_id[] = {
  102. { "isp1301_pnx", 0 },
  103. { }
  104. };
  105. static struct i2c_driver isp1301_driver = {
  106. .driver = {
  107. .name = "isp1301_pnx",
  108. },
  109. .probe = isp1301_probe,
  110. .remove = isp1301_remove,
  111. .id_table = isp1301_id,
  112. };
  113. static void i2c_write(u8 buf, u8 subaddr)
  114. {
  115. char tmpbuf[2];
  116. tmpbuf[0] = subaddr; /*register number */
  117. tmpbuf[1] = buf; /*register data */
  118. i2c_master_send(isp1301_i2c_client, &tmpbuf[0], 2);
  119. }
  120. static void isp1301_configure(void)
  121. {
  122. /* PNX4008 only supports DAT_SE0 USB mode */
  123. /* PNX4008 R2A requires setting the MAX603 to output 3.6V */
  124. /* Power up externel charge-pump */
  125. i2c_write(MC1_DAT_SE0 | MC1_SPEED_REG, ISP1301_I2C_MODE_CONTROL_1);
  126. i2c_write(~(MC1_DAT_SE0 | MC1_SPEED_REG),
  127. ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR);
  128. i2c_write(MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL,
  129. ISP1301_I2C_MODE_CONTROL_2);
  130. i2c_write(~(MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL),
  131. ISP1301_I2C_MODE_CONTROL_2 | ISP1301_I2C_REG_CLEAR_ADDR);
  132. i2c_write(OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN,
  133. ISP1301_I2C_OTG_CONTROL_1);
  134. i2c_write(~(OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN),
  135. ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR);
  136. i2c_write(0xFF,
  137. ISP1301_I2C_INTERRUPT_LATCH | ISP1301_I2C_REG_CLEAR_ADDR);
  138. i2c_write(0xFF,
  139. ISP1301_I2C_INTERRUPT_FALLING | ISP1301_I2C_REG_CLEAR_ADDR);
  140. i2c_write(0xFF,
  141. ISP1301_I2C_INTERRUPT_RISING | ISP1301_I2C_REG_CLEAR_ADDR);
  142. }
  143. static inline void isp1301_vbus_on(void)
  144. {
  145. i2c_write(OTG1_VBUS_DRV, ISP1301_I2C_OTG_CONTROL_1);
  146. }
  147. static inline void isp1301_vbus_off(void)
  148. {
  149. i2c_write(OTG1_VBUS_DRV,
  150. ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR);
  151. }
  152. static void pnx4008_start_hc(void)
  153. {
  154. unsigned long tmp = __raw_readl(USB_OTG_STAT_CONTROL) | HOST_EN;
  155. __raw_writel(tmp, USB_OTG_STAT_CONTROL);
  156. isp1301_vbus_on();
  157. }
  158. static void pnx4008_stop_hc(void)
  159. {
  160. unsigned long tmp;
  161. isp1301_vbus_off();
  162. tmp = __raw_readl(USB_OTG_STAT_CONTROL) & ~HOST_EN;
  163. __raw_writel(tmp, USB_OTG_STAT_CONTROL);
  164. }
  165. static int __devinit ohci_pnx4008_start(struct usb_hcd *hcd)
  166. {
  167. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  168. int ret;
  169. if ((ret = ohci_init(ohci)) < 0)
  170. return ret;
  171. if ((ret = ohci_run(ohci)) < 0) {
  172. dev_err(hcd->self.controller, "can't start\n");
  173. ohci_stop(hcd);
  174. return ret;
  175. }
  176. return 0;
  177. }
  178. static const struct hc_driver ohci_pnx4008_hc_driver = {
  179. .description = hcd_name,
  180. .product_desc = "pnx4008 OHCI",
  181. /*
  182. * generic hardware linkage
  183. */
  184. .irq = ohci_irq,
  185. .flags = HCD_USB11 | HCD_MEMORY,
  186. .hcd_priv_size = sizeof(struct ohci_hcd),
  187. /*
  188. * basic lifecycle operations
  189. */
  190. .start = ohci_pnx4008_start,
  191. .stop = ohci_stop,
  192. .shutdown = ohci_shutdown,
  193. /*
  194. * managing i/o requests and associated device resources
  195. */
  196. .urb_enqueue = ohci_urb_enqueue,
  197. .urb_dequeue = ohci_urb_dequeue,
  198. .endpoint_disable = ohci_endpoint_disable,
  199. /*
  200. * scheduling support
  201. */
  202. .get_frame_number = ohci_get_frame,
  203. /*
  204. * root hub support
  205. */
  206. .hub_status_data = ohci_hub_status_data,
  207. .hub_control = ohci_hub_control,
  208. #ifdef CONFIG_PM
  209. .bus_suspend = ohci_bus_suspend,
  210. .bus_resume = ohci_bus_resume,
  211. #endif
  212. .start_port_reset = ohci_start_port_reset,
  213. };
  214. #define USB_CLOCK_MASK (AHB_M_CLOCK_ON| OTG_CLOCK_ON | HOST_CLOCK_ON | I2C_CLOCK_ON)
  215. static void pnx4008_set_usb_bits(void)
  216. {
  217. start_int_set_falling_edge(SE_USB_OTG_ATX_INT_N);
  218. start_int_ack(SE_USB_OTG_ATX_INT_N);
  219. start_int_umask(SE_USB_OTG_ATX_INT_N);
  220. start_int_set_rising_edge(SE_USB_OTG_TIMER_INT);
  221. start_int_ack(SE_USB_OTG_TIMER_INT);
  222. start_int_umask(SE_USB_OTG_TIMER_INT);
  223. start_int_set_rising_edge(SE_USB_I2C_INT);
  224. start_int_ack(SE_USB_I2C_INT);
  225. start_int_umask(SE_USB_I2C_INT);
  226. start_int_set_rising_edge(SE_USB_INT);
  227. start_int_ack(SE_USB_INT);
  228. start_int_umask(SE_USB_INT);
  229. start_int_set_rising_edge(SE_USB_NEED_CLK_INT);
  230. start_int_ack(SE_USB_NEED_CLK_INT);
  231. start_int_umask(SE_USB_NEED_CLK_INT);
  232. start_int_set_rising_edge(SE_USB_AHB_NEED_CLK_INT);
  233. start_int_ack(SE_USB_AHB_NEED_CLK_INT);
  234. start_int_umask(SE_USB_AHB_NEED_CLK_INT);
  235. }
  236. static void pnx4008_unset_usb_bits(void)
  237. {
  238. start_int_mask(SE_USB_OTG_ATX_INT_N);
  239. start_int_mask(SE_USB_OTG_TIMER_INT);
  240. start_int_mask(SE_USB_I2C_INT);
  241. start_int_mask(SE_USB_INT);
  242. start_int_mask(SE_USB_NEED_CLK_INT);
  243. start_int_mask(SE_USB_AHB_NEED_CLK_INT);
  244. }
  245. static int __devinit usb_hcd_pnx4008_probe(struct platform_device *pdev)
  246. {
  247. struct usb_hcd *hcd = 0;
  248. struct ohci_hcd *ohci;
  249. const struct hc_driver *driver = &ohci_pnx4008_hc_driver;
  250. struct i2c_adapter *i2c_adap;
  251. struct i2c_board_info i2c_info;
  252. int ret = 0, irq;
  253. dev_dbg(&pdev->dev, "%s: " DRIVER_DESC " (pnx4008)\n", hcd_name);
  254. if (usb_disabled()) {
  255. err("USB is disabled");
  256. ret = -ENODEV;
  257. goto out;
  258. }
  259. if (pdev->num_resources != 2
  260. || pdev->resource[0].flags != IORESOURCE_MEM
  261. || pdev->resource[1].flags != IORESOURCE_IRQ) {
  262. err("Invalid resource configuration");
  263. ret = -ENODEV;
  264. goto out;
  265. }
  266. /* Enable AHB slave USB clock, needed for further USB clock control */
  267. __raw_writel(USB_SLAVE_HCLK_EN | (1 << 19), USB_CTRL);
  268. ret = i2c_add_driver(&isp1301_driver);
  269. if (ret < 0) {
  270. err("failed to add ISP1301 driver");
  271. goto out;
  272. }
  273. i2c_adap = i2c_get_adapter(2);
  274. memset(&i2c_info, 0, sizeof(struct i2c_board_info));
  275. strlcpy(i2c_info.type, "isp1301_pnx", I2C_NAME_SIZE);
  276. isp1301_i2c_client = i2c_new_probed_device(i2c_adap, &i2c_info,
  277. normal_i2c, NULL);
  278. i2c_put_adapter(i2c_adap);
  279. if (!isp1301_i2c_client) {
  280. err("failed to connect I2C to ISP1301 USB Transceiver");
  281. ret = -ENODEV;
  282. goto out_i2c_driver;
  283. }
  284. isp1301_configure();
  285. /* Enable USB PLL */
  286. usb_clk = clk_get(&pdev->dev, "ck_pll5");
  287. if (IS_ERR(usb_clk)) {
  288. err("failed to acquire USB PLL");
  289. ret = PTR_ERR(usb_clk);
  290. goto out1;
  291. }
  292. ret = clk_enable(usb_clk);
  293. if (ret < 0) {
  294. err("failed to start USB PLL");
  295. goto out2;
  296. }
  297. ret = clk_set_rate(usb_clk, 48000);
  298. if (ret < 0) {
  299. err("failed to set USB clock rate");
  300. goto out3;
  301. }
  302. __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL);
  303. /* Set to enable all needed USB clocks */
  304. __raw_writel(USB_CLOCK_MASK, USB_OTG_CLK_CTRL);
  305. while ((__raw_readl(USB_OTG_CLK_STAT) & USB_CLOCK_MASK) !=
  306. USB_CLOCK_MASK) ;
  307. hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev));
  308. if (!hcd) {
  309. err("Failed to allocate HC buffer");
  310. ret = -ENOMEM;
  311. goto out3;
  312. }
  313. /* Set all USB bits in the Start Enable register */
  314. pnx4008_set_usb_bits();
  315. hcd->rsrc_start = pdev->resource[0].start;
  316. hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
  317. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
  318. dev_dbg(&pdev->dev, "request_mem_region failed\n");
  319. ret = -ENOMEM;
  320. goto out4;
  321. }
  322. hcd->regs = (void __iomem *)pdev->resource[0].start;
  323. irq = platform_get_irq(pdev, 0);
  324. if (irq < 0) {
  325. ret = -ENXIO;
  326. goto out4;
  327. }
  328. pnx4008_start_hc();
  329. platform_set_drvdata(pdev, hcd);
  330. ohci = hcd_to_ohci(hcd);
  331. ohci_hcd_init(ohci);
  332. dev_info(&pdev->dev, "at 0x%p, irq %d\n", hcd->regs, hcd->irq);
  333. ret = usb_add_hcd(hcd, irq, IRQF_DISABLED);
  334. if (ret == 0)
  335. return ret;
  336. pnx4008_stop_hc();
  337. out4:
  338. pnx4008_unset_usb_bits();
  339. usb_put_hcd(hcd);
  340. out3:
  341. clk_disable(usb_clk);
  342. out2:
  343. clk_put(usb_clk);
  344. out1:
  345. i2c_unregister_device(isp1301_i2c_client);
  346. isp1301_i2c_client = NULL;
  347. out_i2c_driver:
  348. i2c_del_driver(&isp1301_driver);
  349. out:
  350. return ret;
  351. }
  352. static int usb_hcd_pnx4008_remove(struct platform_device *pdev)
  353. {
  354. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  355. usb_remove_hcd(hcd);
  356. pnx4008_stop_hc();
  357. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  358. usb_put_hcd(hcd);
  359. pnx4008_unset_usb_bits();
  360. clk_disable(usb_clk);
  361. clk_put(usb_clk);
  362. i2c_unregister_device(isp1301_i2c_client);
  363. isp1301_i2c_client = NULL;
  364. i2c_del_driver(&isp1301_driver);
  365. platform_set_drvdata(pdev, NULL);
  366. return 0;
  367. }
  368. /* work with hotplug and coldplug */
  369. MODULE_ALIAS("platform:usb-ohci");
  370. static struct platform_driver usb_hcd_pnx4008_driver = {
  371. .driver = {
  372. .name = "usb-ohci",
  373. .owner = THIS_MODULE,
  374. },
  375. .probe = usb_hcd_pnx4008_probe,
  376. .remove = usb_hcd_pnx4008_remove,
  377. };