vr41xx_siu.c 20 KB

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  1. /*
  2. * Driver for NEC VR4100 series Serial Interface Unit.
  3. *
  4. * Copyright (C) 2004-2008 Yoichi Yuasa <yuasa@linux-mips.org>
  5. *
  6. * Based on drivers/serial/8250.c, by Russell King.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #if defined(CONFIG_SERIAL_VR41XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  23. #define SUPPORT_SYSRQ
  24. #endif
  25. #include <linux/console.h>
  26. #include <linux/errno.h>
  27. #include <linux/init.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/ioport.h>
  30. #include <linux/module.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/serial.h>
  33. #include <linux/serial_core.h>
  34. #include <linux/serial_reg.h>
  35. #include <linux/tty.h>
  36. #include <linux/tty_flip.h>
  37. #include <asm/io.h>
  38. #include <asm/vr41xx/siu.h>
  39. #include <asm/vr41xx/vr41xx.h>
  40. #define SIU_BAUD_BASE 1152000
  41. #define SIU_MAJOR 204
  42. #define SIU_MINOR_BASE 82
  43. #define RX_MAX_COUNT 256
  44. #define TX_MAX_COUNT 15
  45. #define SIUIRSEL 0x08
  46. #define TMICMODE 0x20
  47. #define TMICTX 0x10
  48. #define IRMSEL 0x0c
  49. #define IRMSEL_HP 0x08
  50. #define IRMSEL_TEMIC 0x04
  51. #define IRMSEL_SHARP 0x00
  52. #define IRUSESEL 0x02
  53. #define SIRSEL 0x01
  54. static struct uart_port siu_uart_ports[SIU_PORTS_MAX] = {
  55. [0 ... SIU_PORTS_MAX-1] = {
  56. .lock = __SPIN_LOCK_UNLOCKED(siu_uart_ports->lock),
  57. .irq = -1,
  58. },
  59. };
  60. #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
  61. static uint8_t lsr_break_flag[SIU_PORTS_MAX];
  62. #endif
  63. #define siu_read(port, offset) readb((port)->membase + (offset))
  64. #define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
  65. void vr41xx_select_siu_interface(siu_interface_t interface)
  66. {
  67. struct uart_port *port;
  68. unsigned long flags;
  69. uint8_t irsel;
  70. port = &siu_uart_ports[0];
  71. spin_lock_irqsave(&port->lock, flags);
  72. irsel = siu_read(port, SIUIRSEL);
  73. if (interface == SIU_INTERFACE_IRDA)
  74. irsel |= SIRSEL;
  75. else
  76. irsel &= ~SIRSEL;
  77. siu_write(port, SIUIRSEL, irsel);
  78. spin_unlock_irqrestore(&port->lock, flags);
  79. }
  80. EXPORT_SYMBOL_GPL(vr41xx_select_siu_interface);
  81. void vr41xx_use_irda(irda_use_t use)
  82. {
  83. struct uart_port *port;
  84. unsigned long flags;
  85. uint8_t irsel;
  86. port = &siu_uart_ports[0];
  87. spin_lock_irqsave(&port->lock, flags);
  88. irsel = siu_read(port, SIUIRSEL);
  89. if (use == FIR_USE_IRDA)
  90. irsel |= IRUSESEL;
  91. else
  92. irsel &= ~IRUSESEL;
  93. siu_write(port, SIUIRSEL, irsel);
  94. spin_unlock_irqrestore(&port->lock, flags);
  95. }
  96. EXPORT_SYMBOL_GPL(vr41xx_use_irda);
  97. void vr41xx_select_irda_module(irda_module_t module, irda_speed_t speed)
  98. {
  99. struct uart_port *port;
  100. unsigned long flags;
  101. uint8_t irsel;
  102. port = &siu_uart_ports[0];
  103. spin_lock_irqsave(&port->lock, flags);
  104. irsel = siu_read(port, SIUIRSEL);
  105. irsel &= ~(IRMSEL | TMICTX | TMICMODE);
  106. switch (module) {
  107. case SHARP_IRDA:
  108. irsel |= IRMSEL_SHARP;
  109. break;
  110. case TEMIC_IRDA:
  111. irsel |= IRMSEL_TEMIC | TMICMODE;
  112. if (speed == IRDA_TX_4MBPS)
  113. irsel |= TMICTX;
  114. break;
  115. case HP_IRDA:
  116. irsel |= IRMSEL_HP;
  117. break;
  118. default:
  119. break;
  120. }
  121. siu_write(port, SIUIRSEL, irsel);
  122. spin_unlock_irqrestore(&port->lock, flags);
  123. }
  124. EXPORT_SYMBOL_GPL(vr41xx_select_irda_module);
  125. static inline void siu_clear_fifo(struct uart_port *port)
  126. {
  127. siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
  128. siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
  129. UART_FCR_CLEAR_XMIT);
  130. siu_write(port, UART_FCR, 0);
  131. }
  132. static inline unsigned long siu_port_size(struct uart_port *port)
  133. {
  134. switch (port->type) {
  135. case PORT_VR41XX_SIU:
  136. return 11UL;
  137. case PORT_VR41XX_DSIU:
  138. return 8UL;
  139. }
  140. return 0;
  141. }
  142. static inline unsigned int siu_check_type(struct uart_port *port)
  143. {
  144. if (port->line == 0)
  145. return PORT_VR41XX_SIU;
  146. if (port->line == 1 && port->irq != -1)
  147. return PORT_VR41XX_DSIU;
  148. return PORT_UNKNOWN;
  149. }
  150. static inline const char *siu_type_name(struct uart_port *port)
  151. {
  152. switch (port->type) {
  153. case PORT_VR41XX_SIU:
  154. return "SIU";
  155. case PORT_VR41XX_DSIU:
  156. return "DSIU";
  157. }
  158. return NULL;
  159. }
  160. static unsigned int siu_tx_empty(struct uart_port *port)
  161. {
  162. uint8_t lsr;
  163. lsr = siu_read(port, UART_LSR);
  164. if (lsr & UART_LSR_TEMT)
  165. return TIOCSER_TEMT;
  166. return 0;
  167. }
  168. static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
  169. {
  170. uint8_t mcr = 0;
  171. if (mctrl & TIOCM_DTR)
  172. mcr |= UART_MCR_DTR;
  173. if (mctrl & TIOCM_RTS)
  174. mcr |= UART_MCR_RTS;
  175. if (mctrl & TIOCM_OUT1)
  176. mcr |= UART_MCR_OUT1;
  177. if (mctrl & TIOCM_OUT2)
  178. mcr |= UART_MCR_OUT2;
  179. if (mctrl & TIOCM_LOOP)
  180. mcr |= UART_MCR_LOOP;
  181. siu_write(port, UART_MCR, mcr);
  182. }
  183. static unsigned int siu_get_mctrl(struct uart_port *port)
  184. {
  185. uint8_t msr;
  186. unsigned int mctrl = 0;
  187. msr = siu_read(port, UART_MSR);
  188. if (msr & UART_MSR_DCD)
  189. mctrl |= TIOCM_CAR;
  190. if (msr & UART_MSR_RI)
  191. mctrl |= TIOCM_RNG;
  192. if (msr & UART_MSR_DSR)
  193. mctrl |= TIOCM_DSR;
  194. if (msr & UART_MSR_CTS)
  195. mctrl |= TIOCM_CTS;
  196. return mctrl;
  197. }
  198. static void siu_stop_tx(struct uart_port *port)
  199. {
  200. unsigned long flags;
  201. uint8_t ier;
  202. spin_lock_irqsave(&port->lock, flags);
  203. ier = siu_read(port, UART_IER);
  204. ier &= ~UART_IER_THRI;
  205. siu_write(port, UART_IER, ier);
  206. spin_unlock_irqrestore(&port->lock, flags);
  207. }
  208. static void siu_start_tx(struct uart_port *port)
  209. {
  210. unsigned long flags;
  211. uint8_t ier;
  212. spin_lock_irqsave(&port->lock, flags);
  213. ier = siu_read(port, UART_IER);
  214. ier |= UART_IER_THRI;
  215. siu_write(port, UART_IER, ier);
  216. spin_unlock_irqrestore(&port->lock, flags);
  217. }
  218. static void siu_stop_rx(struct uart_port *port)
  219. {
  220. unsigned long flags;
  221. uint8_t ier;
  222. spin_lock_irqsave(&port->lock, flags);
  223. ier = siu_read(port, UART_IER);
  224. ier &= ~UART_IER_RLSI;
  225. siu_write(port, UART_IER, ier);
  226. port->read_status_mask &= ~UART_LSR_DR;
  227. spin_unlock_irqrestore(&port->lock, flags);
  228. }
  229. static void siu_enable_ms(struct uart_port *port)
  230. {
  231. unsigned long flags;
  232. uint8_t ier;
  233. spin_lock_irqsave(&port->lock, flags);
  234. ier = siu_read(port, UART_IER);
  235. ier |= UART_IER_MSI;
  236. siu_write(port, UART_IER, ier);
  237. spin_unlock_irqrestore(&port->lock, flags);
  238. }
  239. static void siu_break_ctl(struct uart_port *port, int ctl)
  240. {
  241. unsigned long flags;
  242. uint8_t lcr;
  243. spin_lock_irqsave(&port->lock, flags);
  244. lcr = siu_read(port, UART_LCR);
  245. if (ctl == -1)
  246. lcr |= UART_LCR_SBC;
  247. else
  248. lcr &= ~UART_LCR_SBC;
  249. siu_write(port, UART_LCR, lcr);
  250. spin_unlock_irqrestore(&port->lock, flags);
  251. }
  252. static inline void receive_chars(struct uart_port *port, uint8_t *status)
  253. {
  254. struct tty_struct *tty;
  255. uint8_t lsr, ch;
  256. char flag;
  257. int max_count = RX_MAX_COUNT;
  258. tty = port->state->port.tty;
  259. lsr = *status;
  260. do {
  261. ch = siu_read(port, UART_RX);
  262. port->icount.rx++;
  263. flag = TTY_NORMAL;
  264. #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
  265. lsr |= lsr_break_flag[port->line];
  266. lsr_break_flag[port->line] = 0;
  267. #endif
  268. if (unlikely(lsr & (UART_LSR_BI | UART_LSR_FE |
  269. UART_LSR_PE | UART_LSR_OE))) {
  270. if (lsr & UART_LSR_BI) {
  271. lsr &= ~(UART_LSR_FE | UART_LSR_PE);
  272. port->icount.brk++;
  273. if (uart_handle_break(port))
  274. goto ignore_char;
  275. }
  276. if (lsr & UART_LSR_FE)
  277. port->icount.frame++;
  278. if (lsr & UART_LSR_PE)
  279. port->icount.parity++;
  280. if (lsr & UART_LSR_OE)
  281. port->icount.overrun++;
  282. lsr &= port->read_status_mask;
  283. if (lsr & UART_LSR_BI)
  284. flag = TTY_BREAK;
  285. if (lsr & UART_LSR_FE)
  286. flag = TTY_FRAME;
  287. if (lsr & UART_LSR_PE)
  288. flag = TTY_PARITY;
  289. }
  290. if (uart_handle_sysrq_char(port, ch))
  291. goto ignore_char;
  292. uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
  293. ignore_char:
  294. lsr = siu_read(port, UART_LSR);
  295. } while ((lsr & UART_LSR_DR) && (max_count-- > 0));
  296. tty_flip_buffer_push(tty);
  297. *status = lsr;
  298. }
  299. static inline void check_modem_status(struct uart_port *port)
  300. {
  301. uint8_t msr;
  302. msr = siu_read(port, UART_MSR);
  303. if ((msr & UART_MSR_ANY_DELTA) == 0)
  304. return;
  305. if (msr & UART_MSR_DDCD)
  306. uart_handle_dcd_change(port, msr & UART_MSR_DCD);
  307. if (msr & UART_MSR_TERI)
  308. port->icount.rng++;
  309. if (msr & UART_MSR_DDSR)
  310. port->icount.dsr++;
  311. if (msr & UART_MSR_DCTS)
  312. uart_handle_cts_change(port, msr & UART_MSR_CTS);
  313. wake_up_interruptible(&port->state->port.delta_msr_wait);
  314. }
  315. static inline void transmit_chars(struct uart_port *port)
  316. {
  317. struct circ_buf *xmit;
  318. int max_count = TX_MAX_COUNT;
  319. xmit = &port->state->xmit;
  320. if (port->x_char) {
  321. siu_write(port, UART_TX, port->x_char);
  322. port->icount.tx++;
  323. port->x_char = 0;
  324. return;
  325. }
  326. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  327. siu_stop_tx(port);
  328. return;
  329. }
  330. do {
  331. siu_write(port, UART_TX, xmit->buf[xmit->tail]);
  332. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  333. port->icount.tx++;
  334. if (uart_circ_empty(xmit))
  335. break;
  336. } while (max_count-- > 0);
  337. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  338. uart_write_wakeup(port);
  339. if (uart_circ_empty(xmit))
  340. siu_stop_tx(port);
  341. }
  342. static irqreturn_t siu_interrupt(int irq, void *dev_id)
  343. {
  344. struct uart_port *port;
  345. uint8_t iir, lsr;
  346. port = (struct uart_port *)dev_id;
  347. iir = siu_read(port, UART_IIR);
  348. if (iir & UART_IIR_NO_INT)
  349. return IRQ_NONE;
  350. lsr = siu_read(port, UART_LSR);
  351. if (lsr & UART_LSR_DR)
  352. receive_chars(port, &lsr);
  353. check_modem_status(port);
  354. if (lsr & UART_LSR_THRE)
  355. transmit_chars(port);
  356. return IRQ_HANDLED;
  357. }
  358. static int siu_startup(struct uart_port *port)
  359. {
  360. int retval;
  361. if (port->membase == NULL)
  362. return -ENODEV;
  363. siu_clear_fifo(port);
  364. (void)siu_read(port, UART_LSR);
  365. (void)siu_read(port, UART_RX);
  366. (void)siu_read(port, UART_IIR);
  367. (void)siu_read(port, UART_MSR);
  368. if (siu_read(port, UART_LSR) == 0xff)
  369. return -ENODEV;
  370. retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
  371. if (retval)
  372. return retval;
  373. if (port->type == PORT_VR41XX_DSIU)
  374. vr41xx_enable_dsiuint(DSIUINT_ALL);
  375. siu_write(port, UART_LCR, UART_LCR_WLEN8);
  376. spin_lock_irq(&port->lock);
  377. siu_set_mctrl(port, port->mctrl);
  378. spin_unlock_irq(&port->lock);
  379. siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
  380. (void)siu_read(port, UART_LSR);
  381. (void)siu_read(port, UART_RX);
  382. (void)siu_read(port, UART_IIR);
  383. (void)siu_read(port, UART_MSR);
  384. return 0;
  385. }
  386. static void siu_shutdown(struct uart_port *port)
  387. {
  388. unsigned long flags;
  389. uint8_t lcr;
  390. siu_write(port, UART_IER, 0);
  391. spin_lock_irqsave(&port->lock, flags);
  392. port->mctrl &= ~TIOCM_OUT2;
  393. siu_set_mctrl(port, port->mctrl);
  394. spin_unlock_irqrestore(&port->lock, flags);
  395. lcr = siu_read(port, UART_LCR);
  396. lcr &= ~UART_LCR_SBC;
  397. siu_write(port, UART_LCR, lcr);
  398. siu_clear_fifo(port);
  399. (void)siu_read(port, UART_RX);
  400. if (port->type == PORT_VR41XX_DSIU)
  401. vr41xx_disable_dsiuint(DSIUINT_ALL);
  402. free_irq(port->irq, port);
  403. }
  404. static void siu_set_termios(struct uart_port *port, struct ktermios *new,
  405. struct ktermios *old)
  406. {
  407. tcflag_t c_cflag, c_iflag;
  408. uint8_t lcr, fcr, ier;
  409. unsigned int baud, quot;
  410. unsigned long flags;
  411. c_cflag = new->c_cflag;
  412. switch (c_cflag & CSIZE) {
  413. case CS5:
  414. lcr = UART_LCR_WLEN5;
  415. break;
  416. case CS6:
  417. lcr = UART_LCR_WLEN6;
  418. break;
  419. case CS7:
  420. lcr = UART_LCR_WLEN7;
  421. break;
  422. default:
  423. lcr = UART_LCR_WLEN8;
  424. break;
  425. }
  426. if (c_cflag & CSTOPB)
  427. lcr |= UART_LCR_STOP;
  428. if (c_cflag & PARENB)
  429. lcr |= UART_LCR_PARITY;
  430. if ((c_cflag & PARODD) != PARODD)
  431. lcr |= UART_LCR_EPAR;
  432. if (c_cflag & CMSPAR)
  433. lcr |= UART_LCR_SPAR;
  434. baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
  435. quot = uart_get_divisor(port, baud);
  436. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10;
  437. spin_lock_irqsave(&port->lock, flags);
  438. uart_update_timeout(port, c_cflag, baud);
  439. c_iflag = new->c_iflag;
  440. port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
  441. if (c_iflag & INPCK)
  442. port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  443. if (c_iflag & (BRKINT | PARMRK))
  444. port->read_status_mask |= UART_LSR_BI;
  445. port->ignore_status_mask = 0;
  446. if (c_iflag & IGNPAR)
  447. port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
  448. if (c_iflag & IGNBRK) {
  449. port->ignore_status_mask |= UART_LSR_BI;
  450. if (c_iflag & IGNPAR)
  451. port->ignore_status_mask |= UART_LSR_OE;
  452. }
  453. if ((c_cflag & CREAD) == 0)
  454. port->ignore_status_mask |= UART_LSR_DR;
  455. ier = siu_read(port, UART_IER);
  456. ier &= ~UART_IER_MSI;
  457. if (UART_ENABLE_MS(port, c_cflag))
  458. ier |= UART_IER_MSI;
  459. siu_write(port, UART_IER, ier);
  460. siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
  461. siu_write(port, UART_DLL, (uint8_t)quot);
  462. siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
  463. siu_write(port, UART_LCR, lcr);
  464. siu_write(port, UART_FCR, fcr);
  465. siu_set_mctrl(port, port->mctrl);
  466. spin_unlock_irqrestore(&port->lock, flags);
  467. }
  468. static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
  469. {
  470. switch (state) {
  471. case 0:
  472. switch (port->type) {
  473. case PORT_VR41XX_SIU:
  474. vr41xx_supply_clock(SIU_CLOCK);
  475. break;
  476. case PORT_VR41XX_DSIU:
  477. vr41xx_supply_clock(DSIU_CLOCK);
  478. break;
  479. }
  480. break;
  481. case 3:
  482. switch (port->type) {
  483. case PORT_VR41XX_SIU:
  484. vr41xx_mask_clock(SIU_CLOCK);
  485. break;
  486. case PORT_VR41XX_DSIU:
  487. vr41xx_mask_clock(DSIU_CLOCK);
  488. break;
  489. }
  490. break;
  491. }
  492. }
  493. static const char *siu_type(struct uart_port *port)
  494. {
  495. return siu_type_name(port);
  496. }
  497. static void siu_release_port(struct uart_port *port)
  498. {
  499. unsigned long size;
  500. if (port->flags & UPF_IOREMAP) {
  501. iounmap(port->membase);
  502. port->membase = NULL;
  503. }
  504. size = siu_port_size(port);
  505. release_mem_region(port->mapbase, size);
  506. }
  507. static int siu_request_port(struct uart_port *port)
  508. {
  509. unsigned long size;
  510. struct resource *res;
  511. size = siu_port_size(port);
  512. res = request_mem_region(port->mapbase, size, siu_type_name(port));
  513. if (res == NULL)
  514. return -EBUSY;
  515. if (port->flags & UPF_IOREMAP) {
  516. port->membase = ioremap(port->mapbase, size);
  517. if (port->membase == NULL) {
  518. release_resource(res);
  519. return -ENOMEM;
  520. }
  521. }
  522. return 0;
  523. }
  524. static void siu_config_port(struct uart_port *port, int flags)
  525. {
  526. if (flags & UART_CONFIG_TYPE) {
  527. port->type = siu_check_type(port);
  528. (void)siu_request_port(port);
  529. }
  530. }
  531. static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
  532. {
  533. if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
  534. return -EINVAL;
  535. if (port->irq != serial->irq)
  536. return -EINVAL;
  537. if (port->iotype != serial->io_type)
  538. return -EINVAL;
  539. if (port->mapbase != (unsigned long)serial->iomem_base)
  540. return -EINVAL;
  541. return 0;
  542. }
  543. static struct uart_ops siu_uart_ops = {
  544. .tx_empty = siu_tx_empty,
  545. .set_mctrl = siu_set_mctrl,
  546. .get_mctrl = siu_get_mctrl,
  547. .stop_tx = siu_stop_tx,
  548. .start_tx = siu_start_tx,
  549. .stop_rx = siu_stop_rx,
  550. .enable_ms = siu_enable_ms,
  551. .break_ctl = siu_break_ctl,
  552. .startup = siu_startup,
  553. .shutdown = siu_shutdown,
  554. .set_termios = siu_set_termios,
  555. .pm = siu_pm,
  556. .type = siu_type,
  557. .release_port = siu_release_port,
  558. .request_port = siu_request_port,
  559. .config_port = siu_config_port,
  560. .verify_port = siu_verify_port,
  561. };
  562. static int siu_init_ports(struct platform_device *pdev)
  563. {
  564. struct uart_port *port;
  565. struct resource *res;
  566. int *type = pdev->dev.platform_data;
  567. int i;
  568. if (!type)
  569. return 0;
  570. port = siu_uart_ports;
  571. for (i = 0; i < SIU_PORTS_MAX; i++) {
  572. port->type = type[i];
  573. if (port->type == PORT_UNKNOWN)
  574. continue;
  575. port->irq = platform_get_irq(pdev, i);
  576. port->uartclk = SIU_BAUD_BASE * 16;
  577. port->fifosize = 16;
  578. port->regshift = 0;
  579. port->iotype = UPIO_MEM;
  580. port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
  581. port->line = i;
  582. res = platform_get_resource(pdev, IORESOURCE_MEM, i);
  583. port->mapbase = res->start;
  584. port++;
  585. }
  586. return i;
  587. }
  588. #ifdef CONFIG_SERIAL_VR41XX_CONSOLE
  589. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  590. static void wait_for_xmitr(struct uart_port *port)
  591. {
  592. int timeout = 10000;
  593. uint8_t lsr, msr;
  594. do {
  595. lsr = siu_read(port, UART_LSR);
  596. if (lsr & UART_LSR_BI)
  597. lsr_break_flag[port->line] = UART_LSR_BI;
  598. if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
  599. break;
  600. } while (timeout-- > 0);
  601. if (port->flags & UPF_CONS_FLOW) {
  602. timeout = 1000000;
  603. do {
  604. msr = siu_read(port, UART_MSR);
  605. if ((msr & UART_MSR_CTS) != 0)
  606. break;
  607. } while (timeout-- > 0);
  608. }
  609. }
  610. static void siu_console_putchar(struct uart_port *port, int ch)
  611. {
  612. wait_for_xmitr(port);
  613. siu_write(port, UART_TX, ch);
  614. }
  615. static void siu_console_write(struct console *con, const char *s, unsigned count)
  616. {
  617. struct uart_port *port;
  618. uint8_t ier;
  619. port = &siu_uart_ports[con->index];
  620. ier = siu_read(port, UART_IER);
  621. siu_write(port, UART_IER, 0);
  622. uart_console_write(port, s, count, siu_console_putchar);
  623. wait_for_xmitr(port);
  624. siu_write(port, UART_IER, ier);
  625. }
  626. static int __init siu_console_setup(struct console *con, char *options)
  627. {
  628. struct uart_port *port;
  629. int baud = 9600;
  630. int parity = 'n';
  631. int bits = 8;
  632. int flow = 'n';
  633. if (con->index >= SIU_PORTS_MAX)
  634. con->index = 0;
  635. port = &siu_uart_ports[con->index];
  636. if (port->membase == NULL) {
  637. if (port->mapbase == 0)
  638. return -ENODEV;
  639. port->membase = ioremap(port->mapbase, siu_port_size(port));
  640. }
  641. if (port->type == PORT_VR41XX_SIU)
  642. vr41xx_select_siu_interface(SIU_INTERFACE_RS232C);
  643. if (options != NULL)
  644. uart_parse_options(options, &baud, &parity, &bits, &flow);
  645. return uart_set_options(port, con, baud, parity, bits, flow);
  646. }
  647. static struct uart_driver siu_uart_driver;
  648. static struct console siu_console = {
  649. .name = "ttyVR",
  650. .write = siu_console_write,
  651. .device = uart_console_device,
  652. .setup = siu_console_setup,
  653. .flags = CON_PRINTBUFFER,
  654. .index = -1,
  655. .data = &siu_uart_driver,
  656. };
  657. static int __devinit siu_console_init(void)
  658. {
  659. struct uart_port *port;
  660. int i;
  661. for (i = 0; i < SIU_PORTS_MAX; i++) {
  662. port = &siu_uart_ports[i];
  663. port->ops = &siu_uart_ops;
  664. }
  665. register_console(&siu_console);
  666. return 0;
  667. }
  668. console_initcall(siu_console_init);
  669. void __init vr41xx_siu_early_setup(struct uart_port *port)
  670. {
  671. if (port->type == PORT_UNKNOWN)
  672. return;
  673. siu_uart_ports[port->line].line = port->line;
  674. siu_uart_ports[port->line].type = port->type;
  675. siu_uart_ports[port->line].uartclk = SIU_BAUD_BASE * 16;
  676. siu_uart_ports[port->line].mapbase = port->mapbase;
  677. siu_uart_ports[port->line].mapbase = port->mapbase;
  678. siu_uart_ports[port->line].ops = &siu_uart_ops;
  679. }
  680. #define SERIAL_VR41XX_CONSOLE &siu_console
  681. #else
  682. #define SERIAL_VR41XX_CONSOLE NULL
  683. #endif
  684. static struct uart_driver siu_uart_driver = {
  685. .owner = THIS_MODULE,
  686. .driver_name = "SIU",
  687. .dev_name = "ttyVR",
  688. .major = SIU_MAJOR,
  689. .minor = SIU_MINOR_BASE,
  690. .cons = SERIAL_VR41XX_CONSOLE,
  691. };
  692. static int __devinit siu_probe(struct platform_device *dev)
  693. {
  694. struct uart_port *port;
  695. int num, i, retval;
  696. num = siu_init_ports(dev);
  697. if (num <= 0)
  698. return -ENODEV;
  699. siu_uart_driver.nr = num;
  700. retval = uart_register_driver(&siu_uart_driver);
  701. if (retval)
  702. return retval;
  703. for (i = 0; i < num; i++) {
  704. port = &siu_uart_ports[i];
  705. port->ops = &siu_uart_ops;
  706. port->dev = &dev->dev;
  707. retval = uart_add_one_port(&siu_uart_driver, port);
  708. if (retval < 0) {
  709. port->dev = NULL;
  710. break;
  711. }
  712. }
  713. if (i == 0 && retval < 0) {
  714. uart_unregister_driver(&siu_uart_driver);
  715. return retval;
  716. }
  717. return 0;
  718. }
  719. static int __devexit siu_remove(struct platform_device *dev)
  720. {
  721. struct uart_port *port;
  722. int i;
  723. for (i = 0; i < siu_uart_driver.nr; i++) {
  724. port = &siu_uart_ports[i];
  725. if (port->dev == &dev->dev) {
  726. uart_remove_one_port(&siu_uart_driver, port);
  727. port->dev = NULL;
  728. }
  729. }
  730. uart_unregister_driver(&siu_uart_driver);
  731. return 0;
  732. }
  733. static int siu_suspend(struct platform_device *dev, pm_message_t state)
  734. {
  735. struct uart_port *port;
  736. int i;
  737. for (i = 0; i < siu_uart_driver.nr; i++) {
  738. port = &siu_uart_ports[i];
  739. if ((port->type == PORT_VR41XX_SIU ||
  740. port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
  741. uart_suspend_port(&siu_uart_driver, port);
  742. }
  743. return 0;
  744. }
  745. static int siu_resume(struct platform_device *dev)
  746. {
  747. struct uart_port *port;
  748. int i;
  749. for (i = 0; i < siu_uart_driver.nr; i++) {
  750. port = &siu_uart_ports[i];
  751. if ((port->type == PORT_VR41XX_SIU ||
  752. port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
  753. uart_resume_port(&siu_uart_driver, port);
  754. }
  755. return 0;
  756. }
  757. static struct platform_driver siu_device_driver = {
  758. .probe = siu_probe,
  759. .remove = __devexit_p(siu_remove),
  760. .suspend = siu_suspend,
  761. .resume = siu_resume,
  762. .driver = {
  763. .name = "SIU",
  764. .owner = THIS_MODULE,
  765. },
  766. };
  767. static int __init vr41xx_siu_init(void)
  768. {
  769. return platform_driver_register(&siu_device_driver);
  770. }
  771. static void __exit vr41xx_siu_exit(void)
  772. {
  773. platform_driver_unregister(&siu_device_driver);
  774. }
  775. module_init(vr41xx_siu_init);
  776. module_exit(vr41xx_siu_exit);
  777. MODULE_LICENSE("GPL");
  778. MODULE_ALIAS("platform:SIU");