nwpserial.c 11 KB

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  1. /*
  2. * Serial Port driver for a NWP uart device
  3. *
  4. * Copyright (C) 2008 IBM Corp., Benjamin Krill <ben@codiert.org>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. *
  11. */
  12. #include <linux/init.h>
  13. #include <linux/console.h>
  14. #include <linux/serial.h>
  15. #include <linux/serial_reg.h>
  16. #include <linux/serial_core.h>
  17. #include <linux/tty.h>
  18. #include <linux/irqreturn.h>
  19. #include <linux/mutex.h>
  20. #include <linux/of_platform.h>
  21. #include <linux/of_device.h>
  22. #include <linux/nwpserial.h>
  23. #include <asm/prom.h>
  24. #include <asm/dcr.h>
  25. #define NWPSERIAL_NR 2
  26. #define NWPSERIAL_STATUS_RXVALID 0x1
  27. #define NWPSERIAL_STATUS_TXFULL 0x2
  28. struct nwpserial_port {
  29. struct uart_port port;
  30. dcr_host_t dcr_host;
  31. unsigned int ier;
  32. unsigned int mcr;
  33. };
  34. static DEFINE_MUTEX(nwpserial_mutex);
  35. static struct nwpserial_port nwpserial_ports[NWPSERIAL_NR];
  36. static void wait_for_bits(struct nwpserial_port *up, int bits)
  37. {
  38. unsigned int status, tmout = 10000;
  39. /* Wait up to 10ms for the character(s) to be sent. */
  40. do {
  41. status = dcr_read(up->dcr_host, UART_LSR);
  42. if (--tmout == 0)
  43. break;
  44. udelay(1);
  45. } while ((status & bits) != bits);
  46. }
  47. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE
  48. static void nwpserial_console_putchar(struct uart_port *port, int c)
  49. {
  50. struct nwpserial_port *up;
  51. up = container_of(port, struct nwpserial_port, port);
  52. /* check if tx buffer is full */
  53. wait_for_bits(up, UART_LSR_THRE);
  54. dcr_write(up->dcr_host, UART_TX, c);
  55. up->port.icount.tx++;
  56. }
  57. static void
  58. nwpserial_console_write(struct console *co, const char *s, unsigned int count)
  59. {
  60. struct nwpserial_port *up = &nwpserial_ports[co->index];
  61. unsigned long flags;
  62. int locked = 1;
  63. if (oops_in_progress)
  64. locked = spin_trylock_irqsave(&up->port.lock, flags);
  65. else
  66. spin_lock_irqsave(&up->port.lock, flags);
  67. /* save and disable interrupt */
  68. up->ier = dcr_read(up->dcr_host, UART_IER);
  69. dcr_write(up->dcr_host, UART_IER, up->ier & ~UART_IER_RDI);
  70. uart_console_write(&up->port, s, count, nwpserial_console_putchar);
  71. /* wait for transmitter to become empty */
  72. while ((dcr_read(up->dcr_host, UART_LSR) & UART_LSR_THRE) == 0)
  73. cpu_relax();
  74. /* restore interrupt state */
  75. dcr_write(up->dcr_host, UART_IER, up->ier);
  76. if (locked)
  77. spin_unlock_irqrestore(&up->port.lock, flags);
  78. }
  79. static struct uart_driver nwpserial_reg;
  80. static struct console nwpserial_console = {
  81. .name = "ttySQ",
  82. .write = nwpserial_console_write,
  83. .device = uart_console_device,
  84. .flags = CON_PRINTBUFFER,
  85. .index = -1,
  86. .data = &nwpserial_reg,
  87. };
  88. #define NWPSERIAL_CONSOLE (&nwpserial_console)
  89. #else
  90. #define NWPSERIAL_CONSOLE NULL
  91. #endif /* CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE */
  92. /**************************************************************************/
  93. static int nwpserial_request_port(struct uart_port *port)
  94. {
  95. return 0;
  96. }
  97. static void nwpserial_release_port(struct uart_port *port)
  98. {
  99. /* N/A */
  100. }
  101. static void nwpserial_config_port(struct uart_port *port, int flags)
  102. {
  103. port->type = PORT_NWPSERIAL;
  104. }
  105. static irqreturn_t nwpserial_interrupt(int irq, void *dev_id)
  106. {
  107. struct nwpserial_port *up = dev_id;
  108. struct tty_struct *tty = up->port.state->port.tty;
  109. irqreturn_t ret;
  110. unsigned int iir;
  111. unsigned char ch;
  112. spin_lock(&up->port.lock);
  113. /* check if the uart was the interrupt source. */
  114. iir = dcr_read(up->dcr_host, UART_IIR);
  115. if (!iir) {
  116. ret = IRQ_NONE;
  117. goto out;
  118. }
  119. do {
  120. up->port.icount.rx++;
  121. ch = dcr_read(up->dcr_host, UART_RX);
  122. if (up->port.ignore_status_mask != NWPSERIAL_STATUS_RXVALID)
  123. tty_insert_flip_char(tty, ch, TTY_NORMAL);
  124. } while (dcr_read(up->dcr_host, UART_LSR) & UART_LSR_DR);
  125. tty_flip_buffer_push(tty);
  126. ret = IRQ_HANDLED;
  127. /* clear interrupt */
  128. dcr_write(up->dcr_host, UART_IIR, 1);
  129. out:
  130. spin_unlock(&up->port.lock);
  131. return ret;
  132. }
  133. static int nwpserial_startup(struct uart_port *port)
  134. {
  135. struct nwpserial_port *up;
  136. int err;
  137. up = container_of(port, struct nwpserial_port, port);
  138. /* disable flow control by default */
  139. up->mcr = dcr_read(up->dcr_host, UART_MCR) & ~UART_MCR_AFE;
  140. dcr_write(up->dcr_host, UART_MCR, up->mcr);
  141. /* register interrupt handler */
  142. err = request_irq(up->port.irq, nwpserial_interrupt,
  143. IRQF_SHARED, "nwpserial", up);
  144. if (err)
  145. return err;
  146. /* enable interrupts */
  147. up->ier = UART_IER_RDI;
  148. dcr_write(up->dcr_host, UART_IER, up->ier);
  149. /* enable receiving */
  150. up->port.ignore_status_mask &= ~NWPSERIAL_STATUS_RXVALID;
  151. return 0;
  152. }
  153. static void nwpserial_shutdown(struct uart_port *port)
  154. {
  155. struct nwpserial_port *up;
  156. up = container_of(port, struct nwpserial_port, port);
  157. /* disable receiving */
  158. up->port.ignore_status_mask |= NWPSERIAL_STATUS_RXVALID;
  159. /* disable interrupts from this port */
  160. up->ier = 0;
  161. dcr_write(up->dcr_host, UART_IER, up->ier);
  162. /* free irq */
  163. free_irq(up->port.irq, port);
  164. }
  165. static int nwpserial_verify_port(struct uart_port *port,
  166. struct serial_struct *ser)
  167. {
  168. return -EINVAL;
  169. }
  170. static const char *nwpserial_type(struct uart_port *port)
  171. {
  172. return port->type == PORT_NWPSERIAL ? "nwpserial" : NULL;
  173. }
  174. static void nwpserial_set_termios(struct uart_port *port,
  175. struct ktermios *termios, struct ktermios *old)
  176. {
  177. struct nwpserial_port *up;
  178. up = container_of(port, struct nwpserial_port, port);
  179. up->port.read_status_mask = NWPSERIAL_STATUS_RXVALID
  180. | NWPSERIAL_STATUS_TXFULL;
  181. up->port.ignore_status_mask = 0;
  182. /* ignore all characters if CREAD is not set */
  183. if ((termios->c_cflag & CREAD) == 0)
  184. up->port.ignore_status_mask |= NWPSERIAL_STATUS_RXVALID;
  185. /* Copy back the old hardware settings */
  186. if (old)
  187. tty_termios_copy_hw(termios, old);
  188. }
  189. static void nwpserial_break_ctl(struct uart_port *port, int ctl)
  190. {
  191. /* N/A */
  192. }
  193. static void nwpserial_enable_ms(struct uart_port *port)
  194. {
  195. /* N/A */
  196. }
  197. static void nwpserial_stop_rx(struct uart_port *port)
  198. {
  199. struct nwpserial_port *up;
  200. up = container_of(port, struct nwpserial_port, port);
  201. /* don't forward any more data (like !CREAD) */
  202. up->port.ignore_status_mask = NWPSERIAL_STATUS_RXVALID;
  203. }
  204. static void nwpserial_putchar(struct nwpserial_port *up, unsigned char c)
  205. {
  206. /* check if tx buffer is full */
  207. wait_for_bits(up, UART_LSR_THRE);
  208. dcr_write(up->dcr_host, UART_TX, c);
  209. up->port.icount.tx++;
  210. }
  211. static void nwpserial_start_tx(struct uart_port *port)
  212. {
  213. struct nwpserial_port *up;
  214. struct circ_buf *xmit;
  215. up = container_of(port, struct nwpserial_port, port);
  216. xmit = &up->port.state->xmit;
  217. if (port->x_char) {
  218. nwpserial_putchar(up, up->port.x_char);
  219. port->x_char = 0;
  220. }
  221. while (!(uart_circ_empty(xmit) || uart_tx_stopped(&up->port))) {
  222. nwpserial_putchar(up, xmit->buf[xmit->tail]);
  223. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE-1);
  224. }
  225. }
  226. static unsigned int nwpserial_get_mctrl(struct uart_port *port)
  227. {
  228. return 0;
  229. }
  230. static void nwpserial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  231. {
  232. /* N/A */
  233. }
  234. static void nwpserial_stop_tx(struct uart_port *port)
  235. {
  236. /* N/A */
  237. }
  238. static unsigned int nwpserial_tx_empty(struct uart_port *port)
  239. {
  240. struct nwpserial_port *up;
  241. unsigned long flags;
  242. int ret;
  243. up = container_of(port, struct nwpserial_port, port);
  244. spin_lock_irqsave(&up->port.lock, flags);
  245. ret = dcr_read(up->dcr_host, UART_LSR);
  246. spin_unlock_irqrestore(&up->port.lock, flags);
  247. return ret & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  248. }
  249. static struct uart_ops nwpserial_pops = {
  250. .tx_empty = nwpserial_tx_empty,
  251. .set_mctrl = nwpserial_set_mctrl,
  252. .get_mctrl = nwpserial_get_mctrl,
  253. .stop_tx = nwpserial_stop_tx,
  254. .start_tx = nwpserial_start_tx,
  255. .stop_rx = nwpserial_stop_rx,
  256. .enable_ms = nwpserial_enable_ms,
  257. .break_ctl = nwpserial_break_ctl,
  258. .startup = nwpserial_startup,
  259. .shutdown = nwpserial_shutdown,
  260. .set_termios = nwpserial_set_termios,
  261. .type = nwpserial_type,
  262. .release_port = nwpserial_release_port,
  263. .request_port = nwpserial_request_port,
  264. .config_port = nwpserial_config_port,
  265. .verify_port = nwpserial_verify_port,
  266. };
  267. static struct uart_driver nwpserial_reg = {
  268. .owner = THIS_MODULE,
  269. .driver_name = "nwpserial",
  270. .dev_name = "ttySQ",
  271. .major = TTY_MAJOR,
  272. .minor = 68,
  273. .nr = NWPSERIAL_NR,
  274. .cons = NWPSERIAL_CONSOLE,
  275. };
  276. int nwpserial_register_port(struct uart_port *port)
  277. {
  278. struct nwpserial_port *up = NULL;
  279. int ret = -1;
  280. int i;
  281. static int first = 1;
  282. int dcr_len;
  283. int dcr_base;
  284. struct device_node *dn;
  285. mutex_lock(&nwpserial_mutex);
  286. dn = port->dev->of_node;
  287. if (dn == NULL)
  288. goto out;
  289. /* get dcr base. */
  290. dcr_base = dcr_resource_start(dn, 0);
  291. /* find matching entry */
  292. for (i = 0; i < NWPSERIAL_NR; i++)
  293. if (nwpserial_ports[i].port.iobase == dcr_base) {
  294. up = &nwpserial_ports[i];
  295. break;
  296. }
  297. /* we didn't find a mtching entry, search for a free port */
  298. if (up == NULL)
  299. for (i = 0; i < NWPSERIAL_NR; i++)
  300. if (nwpserial_ports[i].port.type == PORT_UNKNOWN &&
  301. nwpserial_ports[i].port.iobase == 0) {
  302. up = &nwpserial_ports[i];
  303. break;
  304. }
  305. if (up == NULL) {
  306. ret = -EBUSY;
  307. goto out;
  308. }
  309. if (first)
  310. uart_register_driver(&nwpserial_reg);
  311. first = 0;
  312. up->port.membase = port->membase;
  313. up->port.irq = port->irq;
  314. up->port.uartclk = port->uartclk;
  315. up->port.fifosize = port->fifosize;
  316. up->port.regshift = port->regshift;
  317. up->port.iotype = port->iotype;
  318. up->port.flags = port->flags;
  319. up->port.mapbase = port->mapbase;
  320. up->port.private_data = port->private_data;
  321. if (port->dev)
  322. up->port.dev = port->dev;
  323. if (up->port.iobase != dcr_base) {
  324. up->port.ops = &nwpserial_pops;
  325. up->port.fifosize = 16;
  326. spin_lock_init(&up->port.lock);
  327. up->port.iobase = dcr_base;
  328. dcr_len = dcr_resource_len(dn, 0);
  329. up->dcr_host = dcr_map(dn, dcr_base, dcr_len);
  330. if (!DCR_MAP_OK(up->dcr_host)) {
  331. printk(KERN_ERR "Cannot map DCR resources for NWPSERIAL");
  332. goto out;
  333. }
  334. }
  335. ret = uart_add_one_port(&nwpserial_reg, &up->port);
  336. if (ret == 0)
  337. ret = up->port.line;
  338. out:
  339. mutex_unlock(&nwpserial_mutex);
  340. return ret;
  341. }
  342. EXPORT_SYMBOL(nwpserial_register_port);
  343. void nwpserial_unregister_port(int line)
  344. {
  345. struct nwpserial_port *up = &nwpserial_ports[line];
  346. mutex_lock(&nwpserial_mutex);
  347. uart_remove_one_port(&nwpserial_reg, &up->port);
  348. up->port.type = PORT_UNKNOWN;
  349. mutex_unlock(&nwpserial_mutex);
  350. }
  351. EXPORT_SYMBOL(nwpserial_unregister_port);
  352. #ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE
  353. static int __init nwpserial_console_init(void)
  354. {
  355. struct nwpserial_port *up = NULL;
  356. struct device_node *dn;
  357. const char *name;
  358. int dcr_base;
  359. int dcr_len;
  360. int i;
  361. /* search for a free port */
  362. for (i = 0; i < NWPSERIAL_NR; i++)
  363. if (nwpserial_ports[i].port.type == PORT_UNKNOWN) {
  364. up = &nwpserial_ports[i];
  365. break;
  366. }
  367. if (up == NULL)
  368. return -1;
  369. name = of_get_property(of_chosen, "linux,stdout-path", NULL);
  370. if (name == NULL)
  371. return -1;
  372. dn = of_find_node_by_path(name);
  373. if (!dn)
  374. return -1;
  375. spin_lock_init(&up->port.lock);
  376. up->port.ops = &nwpserial_pops;
  377. up->port.type = PORT_NWPSERIAL;
  378. up->port.fifosize = 16;
  379. dcr_base = dcr_resource_start(dn, 0);
  380. dcr_len = dcr_resource_len(dn, 0);
  381. up->port.iobase = dcr_base;
  382. up->dcr_host = dcr_map(dn, dcr_base, dcr_len);
  383. if (!DCR_MAP_OK(up->dcr_host)) {
  384. printk("Cannot map DCR resources for SERIAL");
  385. return -1;
  386. }
  387. register_console(&nwpserial_console);
  388. return 0;
  389. }
  390. console_initcall(nwpserial_console_init);
  391. #endif /* CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL_CONSOLE */