max3100.c 21 KB

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  1. /*
  2. *
  3. * Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. *
  11. * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
  12. * to use polling for flow control. TX empty IRQ is unusable, since
  13. * writing conf clears FIFO buffer and we cannot have this interrupt
  14. * always asking us for attention.
  15. *
  16. * Example platform data:
  17. static struct plat_max3100 max3100_plat_data = {
  18. .loopback = 0,
  19. .crystal = 0,
  20. .poll_time = 100,
  21. };
  22. static struct spi_board_info spi_board_info[] = {
  23. {
  24. .modalias = "max3100",
  25. .platform_data = &max3100_plat_data,
  26. .irq = IRQ_EINT12,
  27. .max_speed_hz = 5*1000*1000,
  28. .chip_select = 0,
  29. },
  30. };
  31. * The initial minor number is 209 in the low-density serial port:
  32. * mknod /dev/ttyMAX0 c 204 209
  33. */
  34. #define MAX3100_MAJOR 204
  35. #define MAX3100_MINOR 209
  36. /* 4 MAX3100s should be enough for everyone */
  37. #define MAX_MAX3100 4
  38. #include <linux/delay.h>
  39. #include <linux/slab.h>
  40. #include <linux/device.h>
  41. #include <linux/serial_core.h>
  42. #include <linux/serial.h>
  43. #include <linux/spi/spi.h>
  44. #include <linux/freezer.h>
  45. #include <linux/serial_max3100.h>
  46. #define MAX3100_C (1<<14)
  47. #define MAX3100_D (0<<14)
  48. #define MAX3100_W (1<<15)
  49. #define MAX3100_RX (0<<15)
  50. #define MAX3100_WC (MAX3100_W | MAX3100_C)
  51. #define MAX3100_RC (MAX3100_RX | MAX3100_C)
  52. #define MAX3100_WD (MAX3100_W | MAX3100_D)
  53. #define MAX3100_RD (MAX3100_RX | MAX3100_D)
  54. #define MAX3100_CMD (3 << 14)
  55. #define MAX3100_T (1<<14)
  56. #define MAX3100_R (1<<15)
  57. #define MAX3100_FEN (1<<13)
  58. #define MAX3100_SHDN (1<<12)
  59. #define MAX3100_TM (1<<11)
  60. #define MAX3100_RM (1<<10)
  61. #define MAX3100_PM (1<<9)
  62. #define MAX3100_RAM (1<<8)
  63. #define MAX3100_IR (1<<7)
  64. #define MAX3100_ST (1<<6)
  65. #define MAX3100_PE (1<<5)
  66. #define MAX3100_L (1<<4)
  67. #define MAX3100_BAUD (0xf)
  68. #define MAX3100_TE (1<<10)
  69. #define MAX3100_RAFE (1<<10)
  70. #define MAX3100_RTS (1<<9)
  71. #define MAX3100_CTS (1<<9)
  72. #define MAX3100_PT (1<<8)
  73. #define MAX3100_DATA (0xff)
  74. #define MAX3100_RT (MAX3100_R | MAX3100_T)
  75. #define MAX3100_RTC (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
  76. /* the following simulate a status reg for ignore_status_mask */
  77. #define MAX3100_STATUS_PE 1
  78. #define MAX3100_STATUS_FE 2
  79. #define MAX3100_STATUS_OE 4
  80. struct max3100_port {
  81. struct uart_port port;
  82. struct spi_device *spi;
  83. int cts; /* last CTS received for flow ctrl */
  84. int tx_empty; /* last TX empty bit */
  85. spinlock_t conf_lock; /* shared data */
  86. int conf_commit; /* need to make changes */
  87. int conf; /* configuration for the MAX31000
  88. * (bits 0-7, bits 8-11 are irqs) */
  89. int rts_commit; /* need to change rts */
  90. int rts; /* rts status */
  91. int baud; /* current baud rate */
  92. int parity; /* keeps track if we should send parity */
  93. #define MAX3100_PARITY_ON 1
  94. #define MAX3100_PARITY_ODD 2
  95. #define MAX3100_7BIT 4
  96. int rx_enabled; /* if we should rx chars */
  97. int irq; /* irq assigned to the max3100 */
  98. int minor; /* minor number */
  99. int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */
  100. int loopback; /* 1 if we are in loopback mode */
  101. /* for handling irqs: need workqueue since we do spi_sync */
  102. struct workqueue_struct *workqueue;
  103. struct work_struct work;
  104. /* set to 1 to make the workhandler exit as soon as possible */
  105. int force_end_work;
  106. /* need to know we are suspending to avoid deadlock on workqueue */
  107. int suspending;
  108. /* hook for suspending MAX3100 via dedicated pin */
  109. void (*max3100_hw_suspend) (int suspend);
  110. /* poll time (in ms) for ctrl lines */
  111. int poll_time;
  112. /* and its timer */
  113. struct timer_list timer;
  114. };
  115. static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
  116. static DEFINE_MUTEX(max3100s_lock); /* race on probe */
  117. static int max3100_do_parity(struct max3100_port *s, u16 c)
  118. {
  119. int parity;
  120. if (s->parity & MAX3100_PARITY_ODD)
  121. parity = 1;
  122. else
  123. parity = 0;
  124. if (s->parity & MAX3100_7BIT)
  125. c &= 0x7f;
  126. else
  127. c &= 0xff;
  128. parity = parity ^ (hweight8(c) & 1);
  129. return parity;
  130. }
  131. static int max3100_check_parity(struct max3100_port *s, u16 c)
  132. {
  133. return max3100_do_parity(s, c) == ((c >> 8) & 1);
  134. }
  135. static void max3100_calc_parity(struct max3100_port *s, u16 *c)
  136. {
  137. if (s->parity & MAX3100_7BIT)
  138. *c &= 0x7f;
  139. else
  140. *c &= 0xff;
  141. if (s->parity & MAX3100_PARITY_ON)
  142. *c |= max3100_do_parity(s, *c) << 8;
  143. }
  144. static void max3100_work(struct work_struct *w);
  145. static void max3100_dowork(struct max3100_port *s)
  146. {
  147. if (!s->force_end_work && !work_pending(&s->work) &&
  148. !freezing(current) && !s->suspending)
  149. queue_work(s->workqueue, &s->work);
  150. }
  151. static void max3100_timeout(unsigned long data)
  152. {
  153. struct max3100_port *s = (struct max3100_port *)data;
  154. if (s->port.state) {
  155. max3100_dowork(s);
  156. mod_timer(&s->timer, jiffies + s->poll_time);
  157. }
  158. }
  159. static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
  160. {
  161. struct spi_message message;
  162. u16 etx, erx;
  163. int status;
  164. struct spi_transfer tran = {
  165. .tx_buf = &etx,
  166. .rx_buf = &erx,
  167. .len = 2,
  168. };
  169. etx = cpu_to_be16(tx);
  170. spi_message_init(&message);
  171. spi_message_add_tail(&tran, &message);
  172. status = spi_sync(s->spi, &message);
  173. if (status) {
  174. dev_warn(&s->spi->dev, "error while calling spi_sync\n");
  175. return -EIO;
  176. }
  177. *rx = be16_to_cpu(erx);
  178. s->tx_empty = (*rx & MAX3100_T) > 0;
  179. dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
  180. return 0;
  181. }
  182. static int max3100_handlerx(struct max3100_port *s, u16 rx)
  183. {
  184. unsigned int ch, flg, status = 0;
  185. int ret = 0, cts;
  186. if (rx & MAX3100_R && s->rx_enabled) {
  187. dev_dbg(&s->spi->dev, "%s\n", __func__);
  188. ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
  189. if (rx & MAX3100_RAFE) {
  190. s->port.icount.frame++;
  191. flg = TTY_FRAME;
  192. status |= MAX3100_STATUS_FE;
  193. } else {
  194. if (s->parity & MAX3100_PARITY_ON) {
  195. if (max3100_check_parity(s, rx)) {
  196. s->port.icount.rx++;
  197. flg = TTY_NORMAL;
  198. } else {
  199. s->port.icount.parity++;
  200. flg = TTY_PARITY;
  201. status |= MAX3100_STATUS_PE;
  202. }
  203. } else {
  204. s->port.icount.rx++;
  205. flg = TTY_NORMAL;
  206. }
  207. }
  208. uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
  209. ret = 1;
  210. }
  211. cts = (rx & MAX3100_CTS) > 0;
  212. if (s->cts != cts) {
  213. s->cts = cts;
  214. uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
  215. }
  216. return ret;
  217. }
  218. static void max3100_work(struct work_struct *w)
  219. {
  220. struct max3100_port *s = container_of(w, struct max3100_port, work);
  221. int rxchars;
  222. u16 tx, rx;
  223. int conf, cconf, rts, crts;
  224. struct circ_buf *xmit = &s->port.state->xmit;
  225. dev_dbg(&s->spi->dev, "%s\n", __func__);
  226. rxchars = 0;
  227. do {
  228. spin_lock(&s->conf_lock);
  229. conf = s->conf;
  230. cconf = s->conf_commit;
  231. s->conf_commit = 0;
  232. rts = s->rts;
  233. crts = s->rts_commit;
  234. s->rts_commit = 0;
  235. spin_unlock(&s->conf_lock);
  236. if (cconf)
  237. max3100_sr(s, MAX3100_WC | conf, &rx);
  238. if (crts) {
  239. max3100_sr(s, MAX3100_WD | MAX3100_TE |
  240. (s->rts ? MAX3100_RTS : 0), &rx);
  241. rxchars += max3100_handlerx(s, rx);
  242. }
  243. max3100_sr(s, MAX3100_RD, &rx);
  244. rxchars += max3100_handlerx(s, rx);
  245. if (rx & MAX3100_T) {
  246. tx = 0xffff;
  247. if (s->port.x_char) {
  248. tx = s->port.x_char;
  249. s->port.icount.tx++;
  250. s->port.x_char = 0;
  251. } else if (!uart_circ_empty(xmit) &&
  252. !uart_tx_stopped(&s->port)) {
  253. tx = xmit->buf[xmit->tail];
  254. xmit->tail = (xmit->tail + 1) &
  255. (UART_XMIT_SIZE - 1);
  256. s->port.icount.tx++;
  257. }
  258. if (tx != 0xffff) {
  259. max3100_calc_parity(s, &tx);
  260. tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
  261. max3100_sr(s, tx, &rx);
  262. rxchars += max3100_handlerx(s, rx);
  263. }
  264. }
  265. if (rxchars > 16 && s->port.state->port.tty != NULL) {
  266. tty_flip_buffer_push(s->port.state->port.tty);
  267. rxchars = 0;
  268. }
  269. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  270. uart_write_wakeup(&s->port);
  271. } while (!s->force_end_work &&
  272. !freezing(current) &&
  273. ((rx & MAX3100_R) ||
  274. (!uart_circ_empty(xmit) &&
  275. !uart_tx_stopped(&s->port))));
  276. if (rxchars > 0 && s->port.state->port.tty != NULL)
  277. tty_flip_buffer_push(s->port.state->port.tty);
  278. }
  279. static irqreturn_t max3100_irq(int irqno, void *dev_id)
  280. {
  281. struct max3100_port *s = dev_id;
  282. dev_dbg(&s->spi->dev, "%s\n", __func__);
  283. max3100_dowork(s);
  284. return IRQ_HANDLED;
  285. }
  286. static void max3100_enable_ms(struct uart_port *port)
  287. {
  288. struct max3100_port *s = container_of(port,
  289. struct max3100_port,
  290. port);
  291. if (s->poll_time > 0)
  292. mod_timer(&s->timer, jiffies);
  293. dev_dbg(&s->spi->dev, "%s\n", __func__);
  294. }
  295. static void max3100_start_tx(struct uart_port *port)
  296. {
  297. struct max3100_port *s = container_of(port,
  298. struct max3100_port,
  299. port);
  300. dev_dbg(&s->spi->dev, "%s\n", __func__);
  301. max3100_dowork(s);
  302. }
  303. static void max3100_stop_rx(struct uart_port *port)
  304. {
  305. struct max3100_port *s = container_of(port,
  306. struct max3100_port,
  307. port);
  308. dev_dbg(&s->spi->dev, "%s\n", __func__);
  309. s->rx_enabled = 0;
  310. spin_lock(&s->conf_lock);
  311. s->conf &= ~MAX3100_RM;
  312. s->conf_commit = 1;
  313. spin_unlock(&s->conf_lock);
  314. max3100_dowork(s);
  315. }
  316. static unsigned int max3100_tx_empty(struct uart_port *port)
  317. {
  318. struct max3100_port *s = container_of(port,
  319. struct max3100_port,
  320. port);
  321. dev_dbg(&s->spi->dev, "%s\n", __func__);
  322. /* may not be truly up-to-date */
  323. max3100_dowork(s);
  324. return s->tx_empty;
  325. }
  326. static unsigned int max3100_get_mctrl(struct uart_port *port)
  327. {
  328. struct max3100_port *s = container_of(port,
  329. struct max3100_port,
  330. port);
  331. dev_dbg(&s->spi->dev, "%s\n", __func__);
  332. /* may not be truly up-to-date */
  333. max3100_dowork(s);
  334. /* always assert DCD and DSR since these lines are not wired */
  335. return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
  336. }
  337. static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
  338. {
  339. struct max3100_port *s = container_of(port,
  340. struct max3100_port,
  341. port);
  342. int rts;
  343. dev_dbg(&s->spi->dev, "%s\n", __func__);
  344. rts = (mctrl & TIOCM_RTS) > 0;
  345. spin_lock(&s->conf_lock);
  346. if (s->rts != rts) {
  347. s->rts = rts;
  348. s->rts_commit = 1;
  349. max3100_dowork(s);
  350. }
  351. spin_unlock(&s->conf_lock);
  352. }
  353. static void
  354. max3100_set_termios(struct uart_port *port, struct ktermios *termios,
  355. struct ktermios *old)
  356. {
  357. struct max3100_port *s = container_of(port,
  358. struct max3100_port,
  359. port);
  360. int baud = 0;
  361. unsigned cflag;
  362. u32 param_new, param_mask, parity = 0;
  363. dev_dbg(&s->spi->dev, "%s\n", __func__);
  364. cflag = termios->c_cflag;
  365. param_new = 0;
  366. param_mask = 0;
  367. baud = tty_termios_baud_rate(termios);
  368. param_new = s->conf & MAX3100_BAUD;
  369. switch (baud) {
  370. case 300:
  371. if (s->crystal)
  372. baud = s->baud;
  373. else
  374. param_new = 15;
  375. break;
  376. case 600:
  377. param_new = 14 + s->crystal;
  378. break;
  379. case 1200:
  380. param_new = 13 + s->crystal;
  381. break;
  382. case 2400:
  383. param_new = 12 + s->crystal;
  384. break;
  385. case 4800:
  386. param_new = 11 + s->crystal;
  387. break;
  388. case 9600:
  389. param_new = 10 + s->crystal;
  390. break;
  391. case 19200:
  392. param_new = 9 + s->crystal;
  393. break;
  394. case 38400:
  395. param_new = 8 + s->crystal;
  396. break;
  397. case 57600:
  398. param_new = 1 + s->crystal;
  399. break;
  400. case 115200:
  401. param_new = 0 + s->crystal;
  402. break;
  403. case 230400:
  404. if (s->crystal)
  405. param_new = 0;
  406. else
  407. baud = s->baud;
  408. break;
  409. default:
  410. baud = s->baud;
  411. }
  412. tty_termios_encode_baud_rate(termios, baud, baud);
  413. s->baud = baud;
  414. param_mask |= MAX3100_BAUD;
  415. if ((cflag & CSIZE) == CS8) {
  416. param_new &= ~MAX3100_L;
  417. parity &= ~MAX3100_7BIT;
  418. } else {
  419. param_new |= MAX3100_L;
  420. parity |= MAX3100_7BIT;
  421. cflag = (cflag & ~CSIZE) | CS7;
  422. }
  423. param_mask |= MAX3100_L;
  424. if (cflag & CSTOPB)
  425. param_new |= MAX3100_ST;
  426. else
  427. param_new &= ~MAX3100_ST;
  428. param_mask |= MAX3100_ST;
  429. if (cflag & PARENB) {
  430. param_new |= MAX3100_PE;
  431. parity |= MAX3100_PARITY_ON;
  432. } else {
  433. param_new &= ~MAX3100_PE;
  434. parity &= ~MAX3100_PARITY_ON;
  435. }
  436. param_mask |= MAX3100_PE;
  437. if (cflag & PARODD)
  438. parity |= MAX3100_PARITY_ODD;
  439. else
  440. parity &= ~MAX3100_PARITY_ODD;
  441. /* mask termios capabilities we don't support */
  442. cflag &= ~CMSPAR;
  443. termios->c_cflag = cflag;
  444. s->port.ignore_status_mask = 0;
  445. if (termios->c_iflag & IGNPAR)
  446. s->port.ignore_status_mask |=
  447. MAX3100_STATUS_PE | MAX3100_STATUS_FE |
  448. MAX3100_STATUS_OE;
  449. /* we are sending char from a workqueue so enable */
  450. s->port.state->port.tty->low_latency = 1;
  451. if (s->poll_time > 0)
  452. del_timer_sync(&s->timer);
  453. uart_update_timeout(port, termios->c_cflag, baud);
  454. spin_lock(&s->conf_lock);
  455. s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
  456. s->conf_commit = 1;
  457. s->parity = parity;
  458. spin_unlock(&s->conf_lock);
  459. max3100_dowork(s);
  460. if (UART_ENABLE_MS(&s->port, termios->c_cflag))
  461. max3100_enable_ms(&s->port);
  462. }
  463. static void max3100_shutdown(struct uart_port *port)
  464. {
  465. struct max3100_port *s = container_of(port,
  466. struct max3100_port,
  467. port);
  468. dev_dbg(&s->spi->dev, "%s\n", __func__);
  469. if (s->suspending)
  470. return;
  471. s->force_end_work = 1;
  472. if (s->poll_time > 0)
  473. del_timer_sync(&s->timer);
  474. if (s->workqueue) {
  475. flush_workqueue(s->workqueue);
  476. destroy_workqueue(s->workqueue);
  477. s->workqueue = NULL;
  478. }
  479. if (s->irq)
  480. free_irq(s->irq, s);
  481. /* set shutdown mode to save power */
  482. if (s->max3100_hw_suspend)
  483. s->max3100_hw_suspend(1);
  484. else {
  485. u16 tx, rx;
  486. tx = MAX3100_WC | MAX3100_SHDN;
  487. max3100_sr(s, tx, &rx);
  488. }
  489. }
  490. static int max3100_startup(struct uart_port *port)
  491. {
  492. struct max3100_port *s = container_of(port,
  493. struct max3100_port,
  494. port);
  495. char b[12];
  496. dev_dbg(&s->spi->dev, "%s\n", __func__);
  497. s->conf = MAX3100_RM;
  498. s->baud = s->crystal ? 230400 : 115200;
  499. s->rx_enabled = 1;
  500. if (s->suspending)
  501. return 0;
  502. s->force_end_work = 0;
  503. s->parity = 0;
  504. s->rts = 0;
  505. sprintf(b, "max3100-%d", s->minor);
  506. s->workqueue = create_freezable_workqueue(b);
  507. if (!s->workqueue) {
  508. dev_warn(&s->spi->dev, "cannot create workqueue\n");
  509. return -EBUSY;
  510. }
  511. INIT_WORK(&s->work, max3100_work);
  512. if (request_irq(s->irq, max3100_irq,
  513. IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
  514. dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
  515. s->irq = 0;
  516. destroy_workqueue(s->workqueue);
  517. s->workqueue = NULL;
  518. return -EBUSY;
  519. }
  520. if (s->loopback) {
  521. u16 tx, rx;
  522. tx = 0x4001;
  523. max3100_sr(s, tx, &rx);
  524. }
  525. if (s->max3100_hw_suspend)
  526. s->max3100_hw_suspend(0);
  527. s->conf_commit = 1;
  528. max3100_dowork(s);
  529. /* wait for clock to settle */
  530. msleep(50);
  531. max3100_enable_ms(&s->port);
  532. return 0;
  533. }
  534. static const char *max3100_type(struct uart_port *port)
  535. {
  536. struct max3100_port *s = container_of(port,
  537. struct max3100_port,
  538. port);
  539. dev_dbg(&s->spi->dev, "%s\n", __func__);
  540. return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
  541. }
  542. static void max3100_release_port(struct uart_port *port)
  543. {
  544. struct max3100_port *s = container_of(port,
  545. struct max3100_port,
  546. port);
  547. dev_dbg(&s->spi->dev, "%s\n", __func__);
  548. }
  549. static void max3100_config_port(struct uart_port *port, int flags)
  550. {
  551. struct max3100_port *s = container_of(port,
  552. struct max3100_port,
  553. port);
  554. dev_dbg(&s->spi->dev, "%s\n", __func__);
  555. if (flags & UART_CONFIG_TYPE)
  556. s->port.type = PORT_MAX3100;
  557. }
  558. static int max3100_verify_port(struct uart_port *port,
  559. struct serial_struct *ser)
  560. {
  561. struct max3100_port *s = container_of(port,
  562. struct max3100_port,
  563. port);
  564. int ret = -EINVAL;
  565. dev_dbg(&s->spi->dev, "%s\n", __func__);
  566. if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
  567. ret = 0;
  568. return ret;
  569. }
  570. static void max3100_stop_tx(struct uart_port *port)
  571. {
  572. struct max3100_port *s = container_of(port,
  573. struct max3100_port,
  574. port);
  575. dev_dbg(&s->spi->dev, "%s\n", __func__);
  576. }
  577. static int max3100_request_port(struct uart_port *port)
  578. {
  579. struct max3100_port *s = container_of(port,
  580. struct max3100_port,
  581. port);
  582. dev_dbg(&s->spi->dev, "%s\n", __func__);
  583. return 0;
  584. }
  585. static void max3100_break_ctl(struct uart_port *port, int break_state)
  586. {
  587. struct max3100_port *s = container_of(port,
  588. struct max3100_port,
  589. port);
  590. dev_dbg(&s->spi->dev, "%s\n", __func__);
  591. }
  592. static struct uart_ops max3100_ops = {
  593. .tx_empty = max3100_tx_empty,
  594. .set_mctrl = max3100_set_mctrl,
  595. .get_mctrl = max3100_get_mctrl,
  596. .stop_tx = max3100_stop_tx,
  597. .start_tx = max3100_start_tx,
  598. .stop_rx = max3100_stop_rx,
  599. .enable_ms = max3100_enable_ms,
  600. .break_ctl = max3100_break_ctl,
  601. .startup = max3100_startup,
  602. .shutdown = max3100_shutdown,
  603. .set_termios = max3100_set_termios,
  604. .type = max3100_type,
  605. .release_port = max3100_release_port,
  606. .request_port = max3100_request_port,
  607. .config_port = max3100_config_port,
  608. .verify_port = max3100_verify_port,
  609. };
  610. static struct uart_driver max3100_uart_driver = {
  611. .owner = THIS_MODULE,
  612. .driver_name = "ttyMAX",
  613. .dev_name = "ttyMAX",
  614. .major = MAX3100_MAJOR,
  615. .minor = MAX3100_MINOR,
  616. .nr = MAX_MAX3100,
  617. };
  618. static int uart_driver_registered;
  619. static int __devinit max3100_probe(struct spi_device *spi)
  620. {
  621. int i, retval;
  622. struct plat_max3100 *pdata;
  623. u16 tx, rx;
  624. mutex_lock(&max3100s_lock);
  625. if (!uart_driver_registered) {
  626. uart_driver_registered = 1;
  627. retval = uart_register_driver(&max3100_uart_driver);
  628. if (retval) {
  629. printk(KERN_ERR "Couldn't register max3100 uart driver\n");
  630. mutex_unlock(&max3100s_lock);
  631. return retval;
  632. }
  633. }
  634. for (i = 0; i < MAX_MAX3100; i++)
  635. if (!max3100s[i])
  636. break;
  637. if (i == MAX_MAX3100) {
  638. dev_warn(&spi->dev, "too many MAX3100 chips\n");
  639. mutex_unlock(&max3100s_lock);
  640. return -ENOMEM;
  641. }
  642. max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
  643. if (!max3100s[i]) {
  644. dev_warn(&spi->dev,
  645. "kmalloc for max3100 structure %d failed!\n", i);
  646. mutex_unlock(&max3100s_lock);
  647. return -ENOMEM;
  648. }
  649. max3100s[i]->spi = spi;
  650. max3100s[i]->irq = spi->irq;
  651. spin_lock_init(&max3100s[i]->conf_lock);
  652. dev_set_drvdata(&spi->dev, max3100s[i]);
  653. pdata = spi->dev.platform_data;
  654. max3100s[i]->crystal = pdata->crystal;
  655. max3100s[i]->loopback = pdata->loopback;
  656. max3100s[i]->poll_time = pdata->poll_time * HZ / 1000;
  657. if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
  658. max3100s[i]->poll_time = 1;
  659. max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
  660. max3100s[i]->minor = i;
  661. init_timer(&max3100s[i]->timer);
  662. max3100s[i]->timer.function = max3100_timeout;
  663. max3100s[i]->timer.data = (unsigned long) max3100s[i];
  664. dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
  665. max3100s[i]->port.irq = max3100s[i]->irq;
  666. max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
  667. max3100s[i]->port.fifosize = 16;
  668. max3100s[i]->port.ops = &max3100_ops;
  669. max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
  670. max3100s[i]->port.line = i;
  671. max3100s[i]->port.type = PORT_MAX3100;
  672. max3100s[i]->port.dev = &spi->dev;
  673. retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
  674. if (retval < 0)
  675. dev_warn(&spi->dev,
  676. "uart_add_one_port failed for line %d with error %d\n",
  677. i, retval);
  678. /* set shutdown mode to save power. Will be woken-up on open */
  679. if (max3100s[i]->max3100_hw_suspend)
  680. max3100s[i]->max3100_hw_suspend(1);
  681. else {
  682. tx = MAX3100_WC | MAX3100_SHDN;
  683. max3100_sr(max3100s[i], tx, &rx);
  684. }
  685. mutex_unlock(&max3100s_lock);
  686. return 0;
  687. }
  688. static int __devexit max3100_remove(struct spi_device *spi)
  689. {
  690. struct max3100_port *s = dev_get_drvdata(&spi->dev);
  691. int i;
  692. mutex_lock(&max3100s_lock);
  693. /* find out the index for the chip we are removing */
  694. for (i = 0; i < MAX_MAX3100; i++)
  695. if (max3100s[i] == s)
  696. break;
  697. dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
  698. uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
  699. kfree(max3100s[i]);
  700. max3100s[i] = NULL;
  701. /* check if this is the last chip we have */
  702. for (i = 0; i < MAX_MAX3100; i++)
  703. if (max3100s[i]) {
  704. mutex_unlock(&max3100s_lock);
  705. return 0;
  706. }
  707. pr_debug("removing max3100 driver\n");
  708. uart_unregister_driver(&max3100_uart_driver);
  709. mutex_unlock(&max3100s_lock);
  710. return 0;
  711. }
  712. #ifdef CONFIG_PM
  713. static int max3100_suspend(struct spi_device *spi, pm_message_t state)
  714. {
  715. struct max3100_port *s = dev_get_drvdata(&spi->dev);
  716. dev_dbg(&s->spi->dev, "%s\n", __func__);
  717. disable_irq(s->irq);
  718. s->suspending = 1;
  719. uart_suspend_port(&max3100_uart_driver, &s->port);
  720. if (s->max3100_hw_suspend)
  721. s->max3100_hw_suspend(1);
  722. else {
  723. /* no HW suspend, so do SW one */
  724. u16 tx, rx;
  725. tx = MAX3100_WC | MAX3100_SHDN;
  726. max3100_sr(s, tx, &rx);
  727. }
  728. return 0;
  729. }
  730. static int max3100_resume(struct spi_device *spi)
  731. {
  732. struct max3100_port *s = dev_get_drvdata(&spi->dev);
  733. dev_dbg(&s->spi->dev, "%s\n", __func__);
  734. if (s->max3100_hw_suspend)
  735. s->max3100_hw_suspend(0);
  736. uart_resume_port(&max3100_uart_driver, &s->port);
  737. s->suspending = 0;
  738. enable_irq(s->irq);
  739. s->conf_commit = 1;
  740. if (s->workqueue)
  741. max3100_dowork(s);
  742. return 0;
  743. }
  744. #else
  745. #define max3100_suspend NULL
  746. #define max3100_resume NULL
  747. #endif
  748. static struct spi_driver max3100_driver = {
  749. .driver = {
  750. .name = "max3100",
  751. .bus = &spi_bus_type,
  752. .owner = THIS_MODULE,
  753. },
  754. .probe = max3100_probe,
  755. .remove = __devexit_p(max3100_remove),
  756. .suspend = max3100_suspend,
  757. .resume = max3100_resume,
  758. };
  759. static int __init max3100_init(void)
  760. {
  761. return spi_register_driver(&max3100_driver);
  762. }
  763. module_init(max3100_init);
  764. static void __exit max3100_exit(void)
  765. {
  766. spi_unregister_driver(&max3100_driver);
  767. }
  768. module_exit(max3100_exit);
  769. MODULE_DESCRIPTION("MAX3100 driver");
  770. MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
  771. MODULE_LICENSE("GPL");
  772. MODULE_ALIAS("spi:max3100");