nvec.c 11 KB

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  1. // #define DEBUG
  2. /* ToDo list (incomplete, unorderd)
  3. - convert mouse, keyboard, and power to platform devices
  4. */
  5. #include <asm/io.h>
  6. #include <asm/irq.h>
  7. #include <linux/completion.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/irq.h>
  10. #include <linux/slab.h>
  11. #include <linux/gpio.h>
  12. #include <linux/serio.h>
  13. #include <linux/delay.h>
  14. #include <linux/input.h>
  15. #include <linux/workqueue.h>
  16. #include <linux/clk.h>
  17. #include <mach/iomap.h>
  18. #include <mach/clk.h>
  19. #include <linux/semaphore.h>
  20. #include <linux/list.h>
  21. #include <linux/notifier.h>
  22. #include <linux/workqueue.h>
  23. #include <linux/platform_device.h>
  24. #include "nvec.h"
  25. static unsigned char EC_DISABLE_EVENT_REPORTING[] = {'\x04','\x00','\x00'};
  26. static unsigned char EC_ENABLE_EVENT_REPORTING[] = {'\x04','\x00','\x01'};
  27. static unsigned char EC_GET_FIRMWARE_VERSION[] = {'\x07','\x15'};
  28. static struct nvec_chip *nvec_power_handle;
  29. int nvec_register_notifier(struct nvec_chip *nvec, struct notifier_block *nb,
  30. unsigned int events)
  31. {
  32. return atomic_notifier_chain_register(&nvec->notifier_list, nb);
  33. }
  34. EXPORT_SYMBOL_GPL(nvec_register_notifier);
  35. static int nvec_status_notifier(struct notifier_block *nb, unsigned long event_type,
  36. void *data)
  37. {
  38. unsigned char *msg = (unsigned char *)data;
  39. int i;
  40. if(event_type != NVEC_CNTL)
  41. return NOTIFY_DONE;
  42. printk("unhandled msg type %ld, payload: ", event_type);
  43. for (i = 0; i < msg[1]; i++)
  44. printk("%0x ", msg[i+2]);
  45. printk("\n");
  46. return NOTIFY_OK;
  47. }
  48. void nvec_write_async(struct nvec_chip *nvec, unsigned char *data, short size)
  49. {
  50. struct nvec_msg *msg = kzalloc(sizeof(struct nvec_msg), GFP_NOWAIT);
  51. msg->data = kzalloc(size, GFP_NOWAIT);
  52. msg->data[0] = size;
  53. memcpy(msg->data + 1, data, size);
  54. msg->size = size + 1;
  55. msg->pos = 0;
  56. INIT_LIST_HEAD(&msg->node);
  57. list_add_tail(&msg->node, &nvec->tx_data);
  58. gpio_set_value(nvec->gpio, 0);
  59. }
  60. EXPORT_SYMBOL(nvec_write_async);
  61. static void nvec_request_master(struct work_struct *work)
  62. {
  63. struct nvec_chip *nvec = container_of(work, struct nvec_chip, tx_work);
  64. if(!list_empty(&nvec->tx_data)) {
  65. gpio_set_value(nvec->gpio, 0);
  66. }
  67. }
  68. static int parse_msg(struct nvec_chip *nvec, struct nvec_msg *msg)
  69. {
  70. int i;
  71. if((msg->data[0] & 1<<7) == 0 && msg->data[3]) {
  72. dev_err(nvec->dev, "ec responded %02x %02x %02x %02x\n", msg->data[0],
  73. msg->data[1], msg->data[2], msg->data[3]);
  74. return -EINVAL;
  75. }
  76. if ((msg->data[0] >> 7 ) == 1 && (msg->data[0] & 0x0f) == 5)
  77. {
  78. dev_warn(nvec->dev, "ec system event ");
  79. for (i=0; i < msg->data[1]; i++)
  80. dev_warn(nvec->dev, "%02x ", msg->data[2+i]);
  81. dev_warn(nvec->dev, "\n");
  82. }
  83. atomic_notifier_call_chain(&nvec->notifier_list, msg->data[0] & 0x8f, msg->data);
  84. return 0;
  85. }
  86. static struct nvec_msg *nvec_write_sync(struct nvec_chip *nvec, unsigned char *data, short size)
  87. {
  88. down(&nvec->sync_write_mutex);
  89. nvec->sync_write_pending = (data[1] << 8) + data[0];
  90. nvec_write_async(nvec, data, size);
  91. dev_dbg(nvec->dev, "nvec_sync_write: 0x%04x\n", nvec->sync_write_pending);
  92. wait_for_completion(&nvec->sync_write);
  93. dev_dbg(nvec->dev, "nvec_sync_write: pong!\n");
  94. up(&nvec->sync_write_mutex);
  95. return nvec->last_sync_msg;
  96. }
  97. /* RX worker */
  98. static void nvec_dispatch(struct work_struct *work)
  99. {
  100. struct nvec_chip *nvec = container_of(work, struct nvec_chip, rx_work);
  101. struct nvec_msg *msg;
  102. while(!list_empty(&nvec->rx_data))
  103. {
  104. msg = list_first_entry(&nvec->rx_data, struct nvec_msg, node);
  105. list_del_init(&msg->node);
  106. if(nvec->sync_write_pending == (msg->data[2] << 8) + msg->data[0])
  107. {
  108. dev_dbg(nvec->dev, "sync write completed!\n");
  109. nvec->sync_write_pending = 0;
  110. nvec->last_sync_msg = msg;
  111. complete(&nvec->sync_write);
  112. } else {
  113. parse_msg(nvec, msg);
  114. if((!msg) || (!msg->data))
  115. dev_warn(nvec->dev, "attempt access zero pointer");
  116. else {
  117. kfree(msg->data);
  118. kfree(msg);
  119. }
  120. }
  121. }
  122. }
  123. static irqreturn_t i2c_interrupt(int irq, void *dev)
  124. {
  125. unsigned long status;
  126. unsigned long received;
  127. unsigned char to_send;
  128. struct nvec_msg *msg;
  129. struct nvec_chip *nvec = (struct nvec_chip *)dev;
  130. unsigned char *i2c_regs = nvec->i2c_regs;
  131. status = readl(i2c_regs + I2C_SL_STATUS);
  132. if(!(status & I2C_SL_IRQ))
  133. {
  134. dev_warn(nvec->dev, "nvec Spurious IRQ\n");
  135. //Yup, handled. ahum.
  136. goto handled;
  137. }
  138. if(status & END_TRANS && !(status & RCVD))
  139. {
  140. //Reenable IRQ only when even has been sent
  141. //printk("Write sequence ended !\n");
  142. //parse_msg(nvec);
  143. nvec->state = NVEC_WAIT;
  144. if(nvec->rx->size > 1)
  145. {
  146. list_add_tail(&nvec->rx->node, &nvec->rx_data);
  147. schedule_work(&nvec->rx_work);
  148. } else {
  149. kfree(nvec->rx->data);
  150. kfree(nvec->rx);
  151. }
  152. return IRQ_HANDLED;
  153. } else if(status & RNW)
  154. {
  155. // Work around for AP20 New Slave Hw Bug. Give 1us extra.
  156. // nvec/smbus/nvec_i2c_transport.c in NV`s crap for reference
  157. if(status & RCVD)
  158. udelay(3);
  159. if(status & RCVD)
  160. {
  161. nvec->state = NVEC_WRITE;
  162. //Master wants something from us. New communication
  163. // dev_dbg(nvec->dev, "New read comm!\n");
  164. } else {
  165. //Master wants something from us from a communication we've already started
  166. // dev_dbg(nvec->dev, "Read comm cont !\n");
  167. }
  168. //if(msg_pos<msg_size) {
  169. if(list_empty(&nvec->tx_data))
  170. {
  171. dev_err(nvec->dev, "nvec empty tx - sending no-op\n");
  172. to_send = 0x8a;
  173. nvec_write_async(nvec, "\x07\x02", 2);
  174. // to_send = 0x01;
  175. } else {
  176. msg = list_first_entry(&nvec->tx_data, struct nvec_msg, node);
  177. if(msg->pos < msg->size) {
  178. to_send = msg->data[msg->pos];
  179. msg->pos++;
  180. } else {
  181. dev_err(nvec->dev, "nvec crap! %d\n", msg->size);
  182. to_send = 0x01;
  183. }
  184. if(msg->pos >= msg->size)
  185. {
  186. list_del_init(&msg->node);
  187. kfree(msg->data);
  188. kfree(msg);
  189. schedule_work(&nvec->tx_work);
  190. nvec->state = NVEC_WAIT;
  191. }
  192. }
  193. writel(to_send, i2c_regs + I2C_SL_RCVD);
  194. gpio_set_value(nvec->gpio, 1);
  195. dev_dbg(nvec->dev, "nvec sent %x\n", to_send);
  196. goto handled;
  197. } else {
  198. received = readl(i2c_regs + I2C_SL_RCVD);
  199. //Workaround?
  200. if(status & RCVD) {
  201. writel(0, i2c_regs + I2C_SL_RCVD);
  202. goto handled;
  203. }
  204. if (nvec->state == NVEC_WAIT)
  205. {
  206. nvec->state = NVEC_READ;
  207. msg = kzalloc(sizeof(struct nvec_msg), GFP_NOWAIT);
  208. msg->data = kzalloc(32, GFP_NOWAIT);
  209. INIT_LIST_HEAD(&msg->node);
  210. nvec->rx = msg;
  211. } else
  212. msg = nvec->rx;
  213. BUG_ON(msg->pos > 32);
  214. msg->data[msg->pos] = received;
  215. msg->pos++;
  216. msg->size = msg->pos;
  217. dev_dbg(nvec->dev, "Got %02lx from Master (pos: %d)!\n", received, msg->pos);
  218. }
  219. handled:
  220. return IRQ_HANDLED;
  221. }
  222. static int __devinit nvec_add_subdev(struct nvec_chip *nvec, struct nvec_subdev *subdev)
  223. {
  224. struct platform_device *pdev;
  225. pdev = platform_device_alloc(subdev->name, subdev->id);
  226. pdev->dev.parent = nvec->dev;
  227. pdev->dev.platform_data = subdev->platform_data;
  228. return platform_device_add(pdev);
  229. }
  230. static void tegra_init_i2c_slave(struct nvec_platform_data *pdata, unsigned char *i2c_regs,
  231. struct clk *i2c_clk)
  232. {
  233. u32 val;
  234. clk_enable(i2c_clk);
  235. tegra_periph_reset_assert(i2c_clk);
  236. udelay(2);
  237. tegra_periph_reset_deassert(i2c_clk);
  238. writel(pdata->i2c_addr>>1, i2c_regs + I2C_SL_ADDR1);
  239. writel(0, i2c_regs + I2C_SL_ADDR2);
  240. writel(0x1E, i2c_regs + I2C_SL_DELAY_COUNT);
  241. val = I2C_CNFG_NEW_MASTER_SFM | I2C_CNFG_PACKET_MODE_EN |
  242. (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT);
  243. writel(val, i2c_regs + I2C_CNFG);
  244. writel(I2C_SL_NEWL, i2c_regs + I2C_SL_CNFG);
  245. clk_disable(i2c_clk);
  246. }
  247. static void nvec_power_off(void)
  248. {
  249. nvec_write_async(nvec_power_handle, EC_DISABLE_EVENT_REPORTING, 3);
  250. nvec_write_async(nvec_power_handle, "\x04\x01", 2);
  251. }
  252. static int __devinit tegra_nvec_probe(struct platform_device *pdev)
  253. {
  254. int err, i, ret;
  255. struct clk *i2c_clk;
  256. struct nvec_platform_data *pdata = pdev->dev.platform_data;
  257. struct nvec_chip *nvec;
  258. struct nvec_msg *msg;
  259. unsigned char *i2c_regs;
  260. nvec = kzalloc(sizeof(struct nvec_chip), GFP_KERNEL);
  261. if(nvec == NULL) {
  262. dev_err(&pdev->dev, "failed to reserve memory\n");
  263. return -ENOMEM;
  264. }
  265. platform_set_drvdata(pdev, nvec);
  266. nvec->dev = &pdev->dev;
  267. nvec->gpio = pdata->gpio;
  268. nvec->irq = pdata->irq;
  269. /*
  270. i2c_clk=clk_get_sys(NULL, "i2c");
  271. if(IS_ERR_OR_NULL(i2c_clk))
  272. printk(KERN_ERR"No such clock tegra-i2c.2\n");
  273. else
  274. clk_enable(i2c_clk);
  275. */
  276. i2c_regs = ioremap(pdata->base, pdata->size);
  277. if(!i2c_regs) {
  278. dev_err(nvec->dev, "failed to ioremap registers\n");
  279. goto failed;
  280. }
  281. nvec->i2c_regs = i2c_regs;
  282. i2c_clk = clk_get_sys(pdata->clock, NULL);
  283. if(IS_ERR_OR_NULL(i2c_clk)) {
  284. dev_err(nvec->dev, "failed to get clock tegra-i2c.2\n");
  285. goto failed;
  286. }
  287. tegra_init_i2c_slave(pdata, i2c_regs, i2c_clk);
  288. err = request_irq(nvec->irq, i2c_interrupt, IRQF_DISABLED, "nvec", nvec);
  289. if(err) {
  290. dev_err(nvec->dev, "couldn't request irq");
  291. goto failed;
  292. }
  293. clk_enable(i2c_clk);
  294. clk_set_rate(i2c_clk, 8*80000);
  295. /* Set the gpio to low when we've got something to say */
  296. err = gpio_request(nvec->gpio, "nvec gpio");
  297. if(err < 0)
  298. dev_err(nvec->dev, "couldn't request gpio\n");
  299. tegra_gpio_enable(nvec->gpio);
  300. gpio_direction_output(nvec->gpio, 1);
  301. gpio_set_value(nvec->gpio, 1);
  302. ATOMIC_INIT_NOTIFIER_HEAD(&nvec->notifier_list);
  303. init_completion(&nvec->sync_write);
  304. sema_init(&nvec->sync_write_mutex, 1);
  305. INIT_LIST_HEAD(&nvec->tx_data);
  306. INIT_LIST_HEAD(&nvec->rx_data);
  307. INIT_WORK(&nvec->rx_work, nvec_dispatch);
  308. INIT_WORK(&nvec->tx_work, nvec_request_master);
  309. /* enable event reporting */
  310. nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING,
  311. sizeof(EC_ENABLE_EVENT_REPORTING));
  312. nvec_kbd_init(nvec);
  313. #ifdef CONFIG_SERIO_NVEC_PS2
  314. nvec_ps2(nvec);
  315. #endif
  316. /* setup subdevs */
  317. for (i = 0; i < pdata->num_subdevs; i++) {
  318. ret = nvec_add_subdev(nvec, &pdata->subdevs[i]);
  319. }
  320. nvec->nvec_status_notifier.notifier_call = nvec_status_notifier;
  321. nvec_register_notifier(nvec, &nvec->nvec_status_notifier, 0);
  322. nvec_power_handle = nvec;
  323. pm_power_off = nvec_power_off;
  324. /* Get Firmware Version */
  325. msg = nvec_write_sync(nvec, EC_GET_FIRMWARE_VERSION,
  326. sizeof(EC_GET_FIRMWARE_VERSION));
  327. dev_warn(nvec->dev, "ec firmware version %02x.%02x.%02x / %02x\n",
  328. msg->data[4], msg->data[5], msg->data[6], msg->data[7]);
  329. kfree(msg->data);
  330. kfree(msg);
  331. /* unmute speakers? */
  332. nvec_write_async(nvec, "\x0d\x10\x59\x94", 4);
  333. /* enable lid switch event */
  334. nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x02\x00", 7);
  335. /* enable power button event */
  336. nvec_write_async(nvec, "\x01\x01\x01\x00\x00\x80\x00", 7);
  337. return 0;
  338. failed:
  339. kfree(nvec);
  340. return -ENOMEM;
  341. }
  342. static int __devexit tegra_nvec_remove(struct platform_device *pdev)
  343. {
  344. // TODO: unregister
  345. return 0;
  346. }
  347. #ifdef CONFIG_PM
  348. static int tegra_nvec_suspend(struct platform_device *pdev, pm_message_t state)
  349. {
  350. struct nvec_chip *nvec = platform_get_drvdata(pdev);
  351. dev_dbg(nvec->dev, "suspending\n");
  352. nvec_write_async(nvec, EC_DISABLE_EVENT_REPORTING, 3);
  353. nvec_write_async(nvec, "\x04\x02", 2);
  354. return 0;
  355. }
  356. static int tegra_nvec_resume(struct platform_device *pdev) {
  357. struct nvec_chip *nvec = platform_get_drvdata(pdev);
  358. dev_dbg(nvec->dev, "resuming\n");
  359. nvec_write_async(nvec, EC_ENABLE_EVENT_REPORTING, 3);
  360. return 0;
  361. }
  362. #else
  363. #define tegra_nvec_suspend NULL
  364. #define tegra_nvec_resume NULL
  365. #endif
  366. static struct platform_driver nvec_device_driver =
  367. {
  368. .probe = tegra_nvec_probe,
  369. .remove = __devexit_p(tegra_nvec_remove),
  370. .suspend = tegra_nvec_suspend,
  371. .resume = tegra_nvec_resume,
  372. .driver = {
  373. .name = "nvec",
  374. .owner = THIS_MODULE,
  375. }
  376. };
  377. static int __init tegra_nvec_init(void)
  378. {
  379. return platform_driver_register(&nvec_device_driver);
  380. }
  381. module_init(tegra_nvec_init);
  382. MODULE_ALIAS("platform:nvec");