nvm.h 12 KB

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  1. /***************************************************************************************
  2. //
  3. // Copyright (c) Beceem Communications Inc.
  4. //
  5. // Module Name:
  6. // NVM.h
  7. //
  8. // Abstract:
  9. // This file has the prototypes,preprocessors and definitions various NVM libraries.
  10. //
  11. //
  12. // Revision History:
  13. // Who When What
  14. // -------- -------- ----------------------------------------------
  15. // Name Date Created/reviewed/modified
  16. //
  17. // Notes:
  18. //
  19. ****************************************************************************************/
  20. #ifndef _NVM_H_
  21. #define _NVM_H_
  22. typedef struct _FLASH_SECTOR_INFO
  23. {
  24. UINT uiSectorSig;
  25. UINT uiSectorSize;
  26. }FLASH_SECTOR_INFO,*PFLASH_SECTOR_INFO;
  27. typedef struct _FLASH_CS_INFO
  28. {
  29. B_UINT32 MagicNumber;
  30. // let the magic number be 0xBECE-F1A5 - F1A5 for "flas-h"
  31. B_UINT32 FlashLayoutVersion ;
  32. // ISO Image/Format/BuildTool versioning
  33. B_UINT32 ISOImageVersion;
  34. // SCSI/Flash BootLoader versioning
  35. B_UINT32 SCSIFirmwareVersion;
  36. B_UINT32 OffsetFromZeroForPart1ISOImage;
  37. // typically 0
  38. B_UINT32 OffsetFromZeroForScsiFirmware;
  39. //typically at 12MB
  40. B_UINT32 SizeOfScsiFirmware ;
  41. //size of the firmware - depends on binary size
  42. B_UINT32 OffsetFromZeroForPart2ISOImage;
  43. // typically at first Word Aligned offset 12MB + sizeOfScsiFirmware.
  44. B_UINT32 OffsetFromZeroForCalibrationStart;
  45. // typically at 15MB
  46. B_UINT32 OffsetFromZeroForCalibrationEnd;
  47. // VSA0 offsets
  48. B_UINT32 OffsetFromZeroForVSAStart;
  49. B_UINT32 OffsetFromZeroForVSAEnd;
  50. // Control Section offsets
  51. B_UINT32 OffsetFromZeroForControlSectionStart;
  52. B_UINT32 OffsetFromZeroForControlSectionData;
  53. // NO Data Activity timeout to switch from MSC to NW Mode
  54. B_UINT32 CDLessInactivityTimeout;
  55. // New ISO Image Signature
  56. B_UINT32 NewImageSignature;
  57. // Signature to validate the sector size.
  58. B_UINT32 FlashSectorSizeSig;
  59. // Sector Size
  60. B_UINT32 FlashSectorSize;
  61. // Write Size Support
  62. B_UINT32 FlashWriteSupportSize;
  63. // Total Flash Size
  64. B_UINT32 TotalFlashSize;
  65. // Flash Base Address for offset specified
  66. B_UINT32 FlashBaseAddr;
  67. // Flash Part Max Size
  68. B_UINT32 FlashPartMaxSize;
  69. // Is CDLess or Flash Bootloader
  70. B_UINT32 IsCDLessDeviceBootSig;
  71. // MSC Timeout after reset to switch from MSC to NW Mode
  72. B_UINT32 MassStorageTimeout;
  73. }FLASH_CS_INFO,*PFLASH_CS_INFO;
  74. #define FLASH2X_TOTAL_SIZE (64*1024*1024)
  75. #define DEFAULT_SECTOR_SIZE (64*1024)
  76. typedef struct _FLASH_2X_CS_INFO
  77. {
  78. // magic number as 0xBECE-F1A5 - F1A5 for "flas-h"
  79. B_UINT32 MagicNumber;
  80. B_UINT32 FlashLayoutVersion ;
  81. // ISO Image/Format/BuildTool versioning
  82. B_UINT32 ISOImageVersion;
  83. // SCSI/Flash BootLoader versioning
  84. B_UINT32 SCSIFirmwareVersion;
  85. // ISO Image1 Part1/SCSI Firmware/Flash Bootloader Start offset, size
  86. B_UINT32 OffsetFromZeroForPart1ISOImage;
  87. B_UINT32 OffsetFromZeroForScsiFirmware;
  88. B_UINT32 SizeOfScsiFirmware ;
  89. // ISO Image1 Part2 start offset
  90. B_UINT32 OffsetFromZeroForPart2ISOImage;
  91. // DSD0 offset
  92. B_UINT32 OffsetFromZeroForDSDStart;
  93. B_UINT32 OffsetFromZeroForDSDEnd;
  94. // VSA0 offset
  95. B_UINT32 OffsetFromZeroForVSAStart;
  96. B_UINT32 OffsetFromZeroForVSAEnd;
  97. // Control Section offset
  98. B_UINT32 OffsetFromZeroForControlSectionStart;
  99. B_UINT32 OffsetFromZeroForControlSectionData;
  100. // NO Data Activity timeout to switch from MSC to NW Mode
  101. B_UINT32 CDLessInactivityTimeout;
  102. // New ISO Image Signature
  103. B_UINT32 NewImageSignature;
  104. B_UINT32 FlashSectorSizeSig; // Sector Size Signature
  105. B_UINT32 FlashSectorSize; // Sector Size
  106. B_UINT32 FlashWriteSupportSize; // Write Size Support
  107. B_UINT32 TotalFlashSize; // Total Flash Size
  108. // Flash Base Address for offset specified
  109. B_UINT32 FlashBaseAddr;
  110. B_UINT32 FlashPartMaxSize; // Flash Part Max Size
  111. // Is CDLess or Flash Bootloader
  112. B_UINT32 IsCDLessDeviceBootSig;
  113. // MSC Timeout after reset to switch from MSC to NW Mode
  114. B_UINT32 MassStorageTimeout;
  115. /* Flash Map 2.0 Field */
  116. B_UINT32 OffsetISOImage1Part1Start; // ISO Image1 Part1 offset
  117. B_UINT32 OffsetISOImage1Part1End;
  118. B_UINT32 OffsetISOImage1Part2Start; // ISO Image1 Part2 offset
  119. B_UINT32 OffsetISOImage1Part2End;
  120. B_UINT32 OffsetISOImage1Part3Start; // ISO Image1 Part3 offset
  121. B_UINT32 OffsetISOImage1Part3End;
  122. B_UINT32 OffsetISOImage2Part1Start; // ISO Image2 Part1 offset
  123. B_UINT32 OffsetISOImage2Part1End;
  124. B_UINT32 OffsetISOImage2Part2Start; // ISO Image2 Part2 offset
  125. B_UINT32 OffsetISOImage2Part2End;
  126. B_UINT32 OffsetISOImage2Part3Start; // ISO Image2 Part3 offset
  127. B_UINT32 OffsetISOImage2Part3End;
  128. // DSD Header offset from start of DSD
  129. B_UINT32 OffsetFromDSDStartForDSDHeader;
  130. B_UINT32 OffsetFromZeroForDSD1Start; // DSD 1 offset
  131. B_UINT32 OffsetFromZeroForDSD1End;
  132. B_UINT32 OffsetFromZeroForDSD2Start; // DSD 2 offset
  133. B_UINT32 OffsetFromZeroForDSD2End;
  134. B_UINT32 OffsetFromZeroForVSA1Start; // VSA 1 offset
  135. B_UINT32 OffsetFromZeroForVSA1End;
  136. B_UINT32 OffsetFromZeroForVSA2Start; // VSA 2 offset
  137. B_UINT32 OffsetFromZeroForVSA2End;
  138. /*
  139. * ACCESS_BITS_PER_SECTOR 2
  140. * ACCESS_RW 0
  141. * ACCESS_RO 1
  142. * ACCESS_RESVD 2
  143. * ACCESS_RESVD 3
  144. * */
  145. B_UINT32 SectorAccessBitMap[FLASH2X_TOTAL_SIZE/(DEFAULT_SECTOR_SIZE *16)];
  146. // All expansions to the control data structure should add here
  147. }FLASH2X_CS_INFO,*PFLASH2X_CS_INFO;
  148. typedef struct _VENDOR_SECTION_INFO
  149. {
  150. B_UINT32 OffsetFromZeroForSectionStart;
  151. B_UINT32 OffsetFromZeroForSectionEnd;
  152. B_UINT32 AccessFlags;
  153. B_UINT32 Reserved[16];
  154. } VENDOR_SECTION_INFO, *PVENDOR_SECTION_INFO;
  155. typedef struct _FLASH2X_VENDORSPECIFIC_INFO
  156. {
  157. VENDOR_SECTION_INFO VendorSection[TOTAL_SECTIONS];
  158. B_UINT32 Reserved[16];
  159. } FLASH2X_VENDORSPECIFIC_INFO, *PFLASH2X_VENDORSPECIFIC_INFO;
  160. typedef struct _DSD_HEADER
  161. {
  162. B_UINT32 DSDImageSize;
  163. B_UINT32 DSDImageCRC;
  164. B_UINT32 DSDImagePriority;
  165. //We should not consider right now. Reading reserve is worthless.
  166. B_UINT32 Reserved[252]; // Resvd for DSD Header
  167. B_UINT32 DSDImageMagicNumber;
  168. }DSD_HEADER, *PDSD_HEADER;
  169. typedef struct _ISO_HEADER
  170. {
  171. B_UINT32 ISOImageMagicNumber;
  172. B_UINT32 ISOImageSize;
  173. B_UINT32 ISOImageCRC;
  174. B_UINT32 ISOImagePriority;
  175. //We should not consider right now. Reading reserve is worthless.
  176. B_UINT32 Reserved[60]; //Resvd for ISO Header extension
  177. }ISO_HEADER, *PISO_HEADER;
  178. #define EEPROM_BEGIN_CIS (0)
  179. #define EEPROM_BEGIN_NON_CIS (0x200)
  180. #define EEPROM_END (0x2000)
  181. #define INIT_PARAMS_SIGNATURE (0x95a7a597)
  182. #define MAX_INIT_PARAMS_LENGTH (2048)
  183. #define MAC_ADDRESS_OFFSET 0x200
  184. #define INIT_PARAMS_1_SIGNATURE_ADDRESS EEPROM_BEGIN_NON_CIS
  185. #define INIT_PARAMS_1_DATA_ADDRESS (INIT_PARAMS_1_SIGNATURE_ADDRESS+16)
  186. #define INIT_PARAMS_1_MACADDRESS_ADDRESS (MAC_ADDRESS_OFFSET)
  187. #define INIT_PARAMS_1_LENGTH_ADDRESS (INIT_PARAMS_1_SIGNATURE_ADDRESS+4)
  188. #define INIT_PARAMS_2_SIGNATURE_ADDRESS (EEPROM_BEGIN_NON_CIS+2048+16)
  189. #define INIT_PARAMS_2_DATA_ADDRESS (INIT_PARAMS_2_SIGNATURE_ADDRESS+16)
  190. #define INIT_PARAMS_2_MACADDRESS_ADDRESS (INIT_PARAMS_2_SIGNATURE_ADDRESS+8)
  191. #define INIT_PARAMS_2_LENGTH_ADDRESS (INIT_PARAMS_2_SIGNATURE_ADDRESS+4)
  192. #define EEPROM_SPI_DEV_CONFIG_REG 0x0F003000
  193. #define EEPROM_SPI_Q_STATUS1_REG 0x0F003004
  194. #define EEPROM_SPI_Q_STATUS1_MASK_REG 0x0F00300C
  195. #define EEPROM_SPI_Q_STATUS_REG 0x0F003008
  196. #define EEPROM_CMDQ_SPI_REG 0x0F003018
  197. #define EEPROM_WRITE_DATAQ_REG 0x0F00301C
  198. #define EEPROM_READ_DATAQ_REG 0x0F003020
  199. #define SPI_FLUSH_REG 0x0F00304C
  200. #define EEPROM_WRITE_ENABLE 0x06000000
  201. #define EEPROM_READ_STATUS_REGISTER 0x05000000
  202. #define EEPROM_16_BYTE_PAGE_WRITE 0xFA000000
  203. #define EEPROM_WRITE_QUEUE_EMPTY 0x00001000
  204. #define EEPROM_WRITE_QUEUE_AVAIL 0x00002000
  205. #define EEPROM_WRITE_QUEUE_FULL 0x00004000
  206. #define EEPROM_16_BYTE_PAGE_READ 0xFB000000
  207. #define EEPROM_4_BYTE_PAGE_READ 0x3B000000
  208. #define EEPROM_CMD_QUEUE_FLUSH 0x00000001
  209. #define EEPROM_WRITE_QUEUE_FLUSH 0x00000002
  210. #define EEPROM_READ_QUEUE_FLUSH 0x00000004
  211. #define EEPROM_ETH_QUEUE_FLUSH 0x00000008
  212. #define EEPROM_ALL_QUEUE_FLUSH 0x0000000f
  213. #define EEPROM_READ_ENABLE 0x06000000
  214. #define EEPROM_16_BYTE_PAGE_WRITE 0xFA000000
  215. #define EEPROM_READ_DATA_FULL 0x00000010
  216. #define EEPROM_READ_DATA_AVAIL 0x00000020
  217. #define EEPROM_READ_QUEUE_EMPTY 0x00000002
  218. #define EEPROM_CMD_QUEUE_EMPTY 0x00000100
  219. #define EEPROM_CMD_QUEUE_AVAIL 0x00000200
  220. #define EEPROM_CMD_QUEUE_FULL 0x00000400
  221. /* Most EEPROM status register bit 0 indicates if the EEPROM is busy
  222. * with a write if set 1. See the details of the EEPROM Status Register
  223. * in the EEPROM data sheet. */
  224. #define EEPROM_STATUS_REG_WRITE_BUSY 0x00000001
  225. // We will have 1 mSec for every RETRIES_PER_DELAY count and have a max attempts of MAX_EEPROM_RETRIES
  226. // This will give us 80 mSec minimum of delay = 80mSecs
  227. #define MAX_EEPROM_RETRIES 80
  228. #define RETRIES_PER_DELAY 64
  229. #define MAX_RW_SIZE 0x10
  230. #define MAX_READ_SIZE 0x10
  231. #define MAX_SECTOR_SIZE (512*1024)
  232. #define MIN_SECTOR_SIZE (1024)
  233. #define FLASH_SECTOR_SIZE_OFFSET 0xEFFFC
  234. #define FLASH_SECTOR_SIZE_SIG_OFFSET 0xEFFF8
  235. #define FLASH_SECTOR_SIZE_SIG 0xCAFEBABE
  236. #define FLASH_CS_INFO_START_ADDR 0xFF0000
  237. #define FLASH_CONTROL_STRUCT_SIGNATURE 0xBECEF1A5
  238. #define SCSI_FIRMWARE_MAJOR_VERSION 0x1
  239. #define SCSI_FIRMWARE_MINOR_VERSION 0x5
  240. #define BYTE_WRITE_SUPPORT 0x1
  241. #define FLASH_AUTO_INIT_BASE_ADDR 0xF00000
  242. #define FLASH_CONTIGIOUS_START_ADDR_AFTER_INIT 0x1C000000
  243. #define FLASH_CONTIGIOUS_START_ADDR_BEFORE_INIT 0x1F000000
  244. #define FLASH_CONTIGIOUS_START_ADDR_BCS350 0x08000000
  245. #define FLASH_CONTIGIOUS_END_ADDR_BCS350 0x08FFFFFF
  246. #define FLASH_SIZE_ADDR 0xFFFFEC
  247. #define FLASH_SPI_CMDQ_REG 0xAF003040
  248. #define FLASH_SPI_WRITEQ_REG 0xAF003044
  249. #define FLASH_SPI_READQ_REG 0xAF003048
  250. #define FLASH_CONFIG_REG 0xAF003050
  251. #define FLASH_GPIO_CONFIG_REG 0xAF000030
  252. #define FLASH_CMD_WRITE_ENABLE 0x06
  253. #define FLASH_CMD_READ_ENABLE 0x03
  254. #define FLASH_CMD_RESET_WRITE_ENABLE 0x04
  255. #define FLASH_CMD_STATUS_REG_READ 0x05
  256. #define FLASH_CMD_STATUS_REG_WRITE 0x01
  257. #define FLASH_CMD_READ_ID 0x9F
  258. #define PAD_SELECT_REGISTER 0xAF000410
  259. #define FLASH_PART_SST25VF080B 0xBF258E
  260. #define EEPROM_CAL_DATA_INTERNAL_LOC 0xbFB00008
  261. #define EEPROM_CALPARAM_START 0x200
  262. #define EEPROM_SIZE_OFFSET 524
  263. //As Read/Write time vaires from 1.5 to 3.0 ms.
  264. //so After Ignoring the rdm/wrm time(that is dependent on many factor like interface etc.),
  265. //here time calculated meets the worst case delay, 3.0 ms
  266. #define MAX_FLASH_RETRIES 4
  267. #define FLASH_PER_RETRIES_DELAY 16
  268. #define EEPROM_MAX_CAL_AREA_SIZE 0xF0000
  269. #define BECM ntohl(0x4245434d)
  270. #define FLASH_2X_MAJOR_NUMBER 0x2
  271. #define DSD_IMAGE_MAGIC_NUMBER 0xBECE0D5D
  272. #define ISO_IMAGE_MAGIC_NUMBER 0xBECE0150
  273. #define NON_CDLESS_DEVICE_BOOT_SIG 0xBECEB007
  274. #define MINOR_VERSION(x) ((x >>16) & 0xFFFF)
  275. #define MAJOR_VERSION(x) (x & 0xFFFF)
  276. #define CORRUPTED_PATTERN 0x0
  277. #define UNINIT_PTR_IN_CS 0xBBBBDDDD
  278. #define VENDOR_PTR_IN_CS 0xAAAACCCC
  279. #define FLASH2X_SECTION_PRESENT 1<<0
  280. #define FLASH2X_SECTION_VALID 1<<1
  281. #define FLASH2X_SECTION_RO 1<<2
  282. #define FLASH2X_SECTION_ACT 1<<3
  283. #define SECTOR_IS_NOT_WRITABLE STATUS_FAILURE
  284. #define INVALID_OFFSET STATUS_FAILURE
  285. #define INVALID_SECTION STATUS_FAILURE
  286. #define SECTOR_1K 1024
  287. #define SECTOR_64K (64 *SECTOR_1K)
  288. #define SECTOR_128K (2 * SECTOR_64K)
  289. #define SECTOR_256k (2 * SECTOR_128K)
  290. #define SECTOR_512K (2 * SECTOR_256k)
  291. #define FLASH_PART_SIZE (16 * 1024 * 1024)
  292. #define RESET_CHIP_SELECT -1
  293. #define CHIP_SELECT_BIT12 12
  294. #define SECTOR_READWRITE_PERMISSION 0
  295. #define SECTOR_READONLY 1
  296. #define SIGNATURE_SIZE 4
  297. #define DEFAULT_BUFF_SIZE 0x10000
  298. #define FIELD_OFFSET_IN_HEADER(HeaderPointer,Field) ((PUCHAR)&((HeaderPointer)(NULL))->Field - (PUCHAR)(NULL))
  299. #endif