fwio.c 21 KB

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  1. /*
  2. * Firmware I/O code for mac80211 Prism54 drivers
  3. *
  4. * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
  5. * Copyright (c) 2007-2009, Christian Lamparter <chunkeey@web.de>
  6. * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
  7. *
  8. * Based on:
  9. * - the islsm (softmac prism54) driver, which is:
  10. * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  11. * - stlc45xx driver
  12. * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. */
  18. #include <linux/init.h>
  19. #include <linux/slab.h>
  20. #include <linux/firmware.h>
  21. #include <linux/etherdevice.h>
  22. #include <net/mac80211.h>
  23. #include "p54.h"
  24. #include "eeprom.h"
  25. #include "lmac.h"
  26. int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw)
  27. {
  28. struct p54_common *priv = dev->priv;
  29. struct exp_if *exp_if;
  30. struct bootrec *bootrec;
  31. u32 *data = (u32 *)fw->data;
  32. u32 *end_data = (u32 *)fw->data + (fw->size >> 2);
  33. u8 *fw_version = NULL;
  34. size_t len;
  35. int i;
  36. int maxlen;
  37. if (priv->rx_start)
  38. return 0;
  39. while (data < end_data && *data)
  40. data++;
  41. while (data < end_data && !*data)
  42. data++;
  43. bootrec = (struct bootrec *) data;
  44. while (bootrec->data <= end_data && (bootrec->data +
  45. (len = le32_to_cpu(bootrec->len))) <= end_data) {
  46. u32 code = le32_to_cpu(bootrec->code);
  47. switch (code) {
  48. case BR_CODE_COMPONENT_ID:
  49. priv->fw_interface = be32_to_cpup((__be32 *)
  50. bootrec->data);
  51. switch (priv->fw_interface) {
  52. case FW_LM86:
  53. case FW_LM20:
  54. case FW_LM87: {
  55. char *iftype = (char *)bootrec->data;
  56. wiphy_info(priv->hw->wiphy,
  57. "p54 detected a LM%c%c firmware\n",
  58. iftype[2], iftype[3]);
  59. break;
  60. }
  61. case FW_FMAC:
  62. default:
  63. wiphy_err(priv->hw->wiphy,
  64. "unsupported firmware\n");
  65. return -ENODEV;
  66. }
  67. break;
  68. case BR_CODE_COMPONENT_VERSION:
  69. /* 24 bytes should be enough for all firmwares */
  70. if (strnlen((unsigned char *) bootrec->data, 24) < 24)
  71. fw_version = (unsigned char *) bootrec->data;
  72. break;
  73. case BR_CODE_DESCR: {
  74. struct bootrec_desc *desc =
  75. (struct bootrec_desc *)bootrec->data;
  76. priv->rx_start = le32_to_cpu(desc->rx_start);
  77. /* FIXME add sanity checking */
  78. priv->rx_end = le32_to_cpu(desc->rx_end) - 0x3500;
  79. priv->headroom = desc->headroom;
  80. priv->tailroom = desc->tailroom;
  81. priv->privacy_caps = desc->privacy_caps;
  82. priv->rx_keycache_size = desc->rx_keycache_size;
  83. if (le32_to_cpu(bootrec->len) == 11)
  84. priv->rx_mtu = le16_to_cpu(desc->rx_mtu);
  85. else
  86. priv->rx_mtu = (size_t)
  87. 0x620 - priv->tx_hdr_len;
  88. maxlen = priv->tx_hdr_len + /* USB devices */
  89. sizeof(struct p54_rx_data) +
  90. 4 + /* rx alignment */
  91. IEEE80211_MAX_FRAG_THRESHOLD;
  92. if (priv->rx_mtu > maxlen && PAGE_SIZE == 4096) {
  93. printk(KERN_INFO "p54: rx_mtu reduced from %d "
  94. "to %d\n", priv->rx_mtu, maxlen);
  95. priv->rx_mtu = maxlen;
  96. }
  97. break;
  98. }
  99. case BR_CODE_EXPOSED_IF:
  100. exp_if = (struct exp_if *) bootrec->data;
  101. for (i = 0; i < (len * sizeof(*exp_if) / 4); i++)
  102. if (exp_if[i].if_id == cpu_to_le16(IF_ID_LMAC))
  103. priv->fw_var = le16_to_cpu(exp_if[i].variant);
  104. break;
  105. case BR_CODE_DEPENDENT_IF:
  106. break;
  107. case BR_CODE_END_OF_BRA:
  108. case LEGACY_BR_CODE_END_OF_BRA:
  109. end_data = NULL;
  110. break;
  111. default:
  112. break;
  113. }
  114. bootrec = (struct bootrec *)&bootrec->data[len];
  115. }
  116. if (fw_version) {
  117. wiphy_info(priv->hw->wiphy,
  118. "FW rev %s - Softmac protocol %x.%x\n",
  119. fw_version, priv->fw_var >> 8, priv->fw_var & 0xff);
  120. snprintf(dev->wiphy->fw_version, sizeof(dev->wiphy->fw_version),
  121. "%s - %x.%x", fw_version,
  122. priv->fw_var >> 8, priv->fw_var & 0xff);
  123. }
  124. if (priv->fw_var < 0x500)
  125. wiphy_info(priv->hw->wiphy,
  126. "you are using an obsolete firmware. "
  127. "visit http://wireless.kernel.org/en/users/Drivers/p54 "
  128. "and grab one for \"kernel >= 2.6.28\"!\n");
  129. if (priv->fw_var >= 0x300) {
  130. /* Firmware supports QoS, use it! */
  131. if (priv->fw_var >= 0x500) {
  132. priv->tx_stats[P54_QUEUE_AC_VO].limit = 16;
  133. priv->tx_stats[P54_QUEUE_AC_VI].limit = 16;
  134. priv->tx_stats[P54_QUEUE_AC_BE].limit = 16;
  135. priv->tx_stats[P54_QUEUE_AC_BK].limit = 16;
  136. } else {
  137. priv->tx_stats[P54_QUEUE_AC_VO].limit = 3;
  138. priv->tx_stats[P54_QUEUE_AC_VI].limit = 4;
  139. priv->tx_stats[P54_QUEUE_AC_BE].limit = 3;
  140. priv->tx_stats[P54_QUEUE_AC_BK].limit = 2;
  141. }
  142. priv->hw->queues = P54_QUEUE_AC_NUM;
  143. }
  144. wiphy_info(priv->hw->wiphy,
  145. "cryptographic accelerator WEP:%s, TKIP:%s, CCMP:%s\n",
  146. (priv->privacy_caps & BR_DESC_PRIV_CAP_WEP) ? "YES" : "no",
  147. (priv->privacy_caps &
  148. (BR_DESC_PRIV_CAP_TKIP | BR_DESC_PRIV_CAP_MICHAEL))
  149. ? "YES" : "no",
  150. (priv->privacy_caps & BR_DESC_PRIV_CAP_AESCCMP)
  151. ? "YES" : "no");
  152. if (priv->rx_keycache_size) {
  153. /*
  154. * NOTE:
  155. *
  156. * The firmware provides at most 255 (0 - 254) slots
  157. * for keys which are then used to offload decryption.
  158. * As a result the 255 entry (aka 0xff) can be used
  159. * safely by the driver to mark keys that didn't fit
  160. * into the full cache. This trick saves us from
  161. * keeping a extra list for uploaded keys.
  162. */
  163. priv->used_rxkeys = kzalloc(BITS_TO_LONGS(
  164. priv->rx_keycache_size), GFP_KERNEL);
  165. if (!priv->used_rxkeys)
  166. return -ENOMEM;
  167. }
  168. return 0;
  169. }
  170. EXPORT_SYMBOL_GPL(p54_parse_firmware);
  171. static struct sk_buff *p54_alloc_skb(struct p54_common *priv, u16 hdr_flags,
  172. u16 payload_len, u16 type, gfp_t memflags)
  173. {
  174. struct p54_hdr *hdr;
  175. struct sk_buff *skb;
  176. size_t frame_len = sizeof(*hdr) + payload_len;
  177. if (frame_len > P54_MAX_CTRL_FRAME_LEN)
  178. return NULL;
  179. if (unlikely(skb_queue_len(&priv->tx_pending) > 64))
  180. return NULL;
  181. skb = __dev_alloc_skb(priv->tx_hdr_len + frame_len, memflags);
  182. if (!skb)
  183. return NULL;
  184. skb_reserve(skb, priv->tx_hdr_len);
  185. hdr = (struct p54_hdr *) skb_put(skb, sizeof(*hdr));
  186. hdr->flags = cpu_to_le16(hdr_flags);
  187. hdr->len = cpu_to_le16(payload_len);
  188. hdr->type = cpu_to_le16(type);
  189. hdr->tries = hdr->rts_tries = 0;
  190. return skb;
  191. }
  192. int p54_download_eeprom(struct p54_common *priv, void *buf,
  193. u16 offset, u16 len)
  194. {
  195. struct p54_eeprom_lm86 *eeprom_hdr;
  196. struct sk_buff *skb;
  197. size_t eeprom_hdr_size;
  198. int ret = 0;
  199. if (priv->fw_var >= 0x509)
  200. eeprom_hdr_size = sizeof(*eeprom_hdr);
  201. else
  202. eeprom_hdr_size = 0x4;
  203. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL, eeprom_hdr_size +
  204. len, P54_CONTROL_TYPE_EEPROM_READBACK,
  205. GFP_KERNEL);
  206. if (unlikely(!skb))
  207. return -ENOMEM;
  208. mutex_lock(&priv->eeprom_mutex);
  209. priv->eeprom = buf;
  210. eeprom_hdr = (struct p54_eeprom_lm86 *) skb_put(skb,
  211. eeprom_hdr_size + len);
  212. if (priv->fw_var < 0x509) {
  213. eeprom_hdr->v1.offset = cpu_to_le16(offset);
  214. eeprom_hdr->v1.len = cpu_to_le16(len);
  215. } else {
  216. eeprom_hdr->v2.offset = cpu_to_le32(offset);
  217. eeprom_hdr->v2.len = cpu_to_le16(len);
  218. eeprom_hdr->v2.magic2 = 0xf;
  219. memcpy(eeprom_hdr->v2.magic, (const char *)"LOCK", 4);
  220. }
  221. p54_tx(priv, skb);
  222. if (!wait_for_completion_interruptible_timeout(
  223. &priv->eeprom_comp, HZ)) {
  224. wiphy_err(priv->hw->wiphy, "device does not respond!\n");
  225. ret = -EBUSY;
  226. }
  227. priv->eeprom = NULL;
  228. mutex_unlock(&priv->eeprom_mutex);
  229. return ret;
  230. }
  231. int p54_update_beacon_tim(struct p54_common *priv, u16 aid, bool set)
  232. {
  233. struct sk_buff *skb;
  234. struct p54_tim *tim;
  235. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*tim),
  236. P54_CONTROL_TYPE_TIM, GFP_ATOMIC);
  237. if (unlikely(!skb))
  238. return -ENOMEM;
  239. tim = (struct p54_tim *) skb_put(skb, sizeof(*tim));
  240. tim->count = 1;
  241. tim->entry[0] = cpu_to_le16(set ? (aid | 0x8000) : aid);
  242. p54_tx(priv, skb);
  243. return 0;
  244. }
  245. int p54_sta_unlock(struct p54_common *priv, u8 *addr)
  246. {
  247. struct sk_buff *skb;
  248. struct p54_sta_unlock *sta;
  249. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*sta),
  250. P54_CONTROL_TYPE_PSM_STA_UNLOCK, GFP_ATOMIC);
  251. if (unlikely(!skb))
  252. return -ENOMEM;
  253. sta = (struct p54_sta_unlock *)skb_put(skb, sizeof(*sta));
  254. memcpy(sta->addr, addr, ETH_ALEN);
  255. p54_tx(priv, skb);
  256. return 0;
  257. }
  258. int p54_tx_cancel(struct p54_common *priv, __le32 req_id)
  259. {
  260. struct sk_buff *skb;
  261. struct p54_txcancel *cancel;
  262. u32 _req_id = le32_to_cpu(req_id);
  263. if (unlikely(_req_id < priv->rx_start || _req_id > priv->rx_end))
  264. return -EINVAL;
  265. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*cancel),
  266. P54_CONTROL_TYPE_TXCANCEL, GFP_ATOMIC);
  267. if (unlikely(!skb))
  268. return -ENOMEM;
  269. cancel = (struct p54_txcancel *)skb_put(skb, sizeof(*cancel));
  270. cancel->req_id = req_id;
  271. p54_tx(priv, skb);
  272. return 0;
  273. }
  274. int p54_setup_mac(struct p54_common *priv)
  275. {
  276. struct sk_buff *skb;
  277. struct p54_setup_mac *setup;
  278. u16 mode;
  279. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*setup),
  280. P54_CONTROL_TYPE_SETUP, GFP_ATOMIC);
  281. if (!skb)
  282. return -ENOMEM;
  283. setup = (struct p54_setup_mac *) skb_put(skb, sizeof(*setup));
  284. if (!(priv->hw->conf.flags & IEEE80211_CONF_IDLE)) {
  285. switch (priv->mode) {
  286. case NL80211_IFTYPE_STATION:
  287. mode = P54_FILTER_TYPE_STATION;
  288. break;
  289. case NL80211_IFTYPE_AP:
  290. mode = P54_FILTER_TYPE_AP;
  291. break;
  292. case NL80211_IFTYPE_ADHOC:
  293. case NL80211_IFTYPE_MESH_POINT:
  294. mode = P54_FILTER_TYPE_IBSS;
  295. break;
  296. case NL80211_IFTYPE_MONITOR:
  297. mode = P54_FILTER_TYPE_PROMISCUOUS;
  298. break;
  299. default:
  300. mode = P54_FILTER_TYPE_HIBERNATE;
  301. break;
  302. }
  303. /*
  304. * "TRANSPARENT and PROMISCUOUS are mutually exclusive"
  305. * STSW45X0C LMAC API - page 12
  306. */
  307. if (((priv->filter_flags & FIF_PROMISC_IN_BSS) ||
  308. (priv->filter_flags & FIF_OTHER_BSS)) &&
  309. (mode != P54_FILTER_TYPE_PROMISCUOUS))
  310. mode |= P54_FILTER_TYPE_TRANSPARENT;
  311. } else {
  312. mode = P54_FILTER_TYPE_HIBERNATE;
  313. }
  314. setup->mac_mode = cpu_to_le16(mode);
  315. memcpy(setup->mac_addr, priv->mac_addr, ETH_ALEN);
  316. memcpy(setup->bssid, priv->bssid, ETH_ALEN);
  317. setup->rx_antenna = 2 & priv->rx_diversity_mask; /* automatic */
  318. setup->rx_align = 0;
  319. if (priv->fw_var < 0x500) {
  320. setup->v1.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  321. memset(setup->v1.rts_rates, 0, 8);
  322. setup->v1.rx_addr = cpu_to_le32(priv->rx_end);
  323. setup->v1.max_rx = cpu_to_le16(priv->rx_mtu);
  324. setup->v1.rxhw = cpu_to_le16(priv->rxhw);
  325. setup->v1.wakeup_timer = cpu_to_le16(priv->wakeup_timer);
  326. setup->v1.unalloc0 = cpu_to_le16(0);
  327. } else {
  328. setup->v2.rx_addr = cpu_to_le32(priv->rx_end);
  329. setup->v2.max_rx = cpu_to_le16(priv->rx_mtu);
  330. setup->v2.rxhw = cpu_to_le16(priv->rxhw);
  331. setup->v2.timer = cpu_to_le16(priv->wakeup_timer);
  332. setup->v2.truncate = cpu_to_le16(48896);
  333. setup->v2.basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  334. setup->v2.sbss_offset = 0;
  335. setup->v2.mcast_window = 0;
  336. setup->v2.rx_rssi_threshold = 0;
  337. setup->v2.rx_ed_threshold = 0;
  338. setup->v2.ref_clock = cpu_to_le32(644245094);
  339. setup->v2.lpf_bandwidth = cpu_to_le16(65535);
  340. setup->v2.osc_start_delay = cpu_to_le16(65535);
  341. }
  342. p54_tx(priv, skb);
  343. return 0;
  344. }
  345. int p54_scan(struct p54_common *priv, u16 mode, u16 dwell)
  346. {
  347. struct sk_buff *skb;
  348. struct p54_hdr *hdr;
  349. struct p54_scan_head *head;
  350. struct p54_iq_autocal_entry *iq_autocal;
  351. union p54_scan_body_union *body;
  352. struct p54_scan_tail_rate *rate;
  353. struct pda_rssi_cal_entry *rssi;
  354. struct p54_rssi_db_entry *rssi_data;
  355. unsigned int i;
  356. void *entry;
  357. __le16 freq = cpu_to_le16(priv->hw->conf.channel->center_freq);
  358. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*head) +
  359. 2 + sizeof(*iq_autocal) + sizeof(*body) +
  360. sizeof(*rate) + 2 * sizeof(*rssi),
  361. P54_CONTROL_TYPE_SCAN, GFP_ATOMIC);
  362. if (!skb)
  363. return -ENOMEM;
  364. head = (struct p54_scan_head *) skb_put(skb, sizeof(*head));
  365. memset(head->scan_params, 0, sizeof(head->scan_params));
  366. head->mode = cpu_to_le16(mode);
  367. head->dwell = cpu_to_le16(dwell);
  368. head->freq = freq;
  369. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  370. __le16 *pa_power_points = (__le16 *) skb_put(skb, 2);
  371. *pa_power_points = cpu_to_le16(0x0c);
  372. }
  373. iq_autocal = (void *) skb_put(skb, sizeof(*iq_autocal));
  374. for (i = 0; i < priv->iq_autocal_len; i++) {
  375. if (priv->iq_autocal[i].freq != freq)
  376. continue;
  377. memcpy(iq_autocal, &priv->iq_autocal[i].params,
  378. sizeof(struct p54_iq_autocal_entry));
  379. break;
  380. }
  381. if (i == priv->iq_autocal_len)
  382. goto err;
  383. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW)
  384. body = (void *) skb_put(skb, sizeof(body->longbow));
  385. else
  386. body = (void *) skb_put(skb, sizeof(body->normal));
  387. for (i = 0; i < priv->output_limit->entries; i++) {
  388. __le16 *entry_freq = (void *) (priv->output_limit->data +
  389. priv->output_limit->entry_size * i);
  390. if (*entry_freq != freq)
  391. continue;
  392. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  393. memcpy(&body->longbow.power_limits,
  394. (void *) entry_freq + sizeof(__le16),
  395. priv->output_limit->entry_size);
  396. } else {
  397. struct pda_channel_output_limit *limits =
  398. (void *) entry_freq;
  399. body->normal.val_barker = 0x38;
  400. body->normal.val_bpsk = body->normal.dup_bpsk =
  401. limits->val_bpsk;
  402. body->normal.val_qpsk = body->normal.dup_qpsk =
  403. limits->val_qpsk;
  404. body->normal.val_16qam = body->normal.dup_16qam =
  405. limits->val_16qam;
  406. body->normal.val_64qam = body->normal.dup_64qam =
  407. limits->val_64qam;
  408. }
  409. break;
  410. }
  411. if (i == priv->output_limit->entries)
  412. goto err;
  413. entry = (void *)(priv->curve_data->data + priv->curve_data->offset);
  414. for (i = 0; i < priv->curve_data->entries; i++) {
  415. if (*((__le16 *)entry) != freq) {
  416. entry += priv->curve_data->entry_size;
  417. continue;
  418. }
  419. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  420. memcpy(&body->longbow.curve_data,
  421. (void *) entry + sizeof(__le16),
  422. priv->curve_data->entry_size);
  423. } else {
  424. struct p54_scan_body *chan = &body->normal;
  425. struct pda_pa_curve_data *curve_data =
  426. (void *) priv->curve_data->data;
  427. entry += sizeof(__le16);
  428. chan->pa_points_per_curve = 8;
  429. memset(chan->curve_data, 0, sizeof(*chan->curve_data));
  430. memcpy(chan->curve_data, entry,
  431. sizeof(struct p54_pa_curve_data_sample) *
  432. min((u8)8, curve_data->points_per_channel));
  433. }
  434. break;
  435. }
  436. if (i == priv->curve_data->entries)
  437. goto err;
  438. if ((priv->fw_var >= 0x500) && (priv->fw_var < 0x509)) {
  439. rate = (void *) skb_put(skb, sizeof(*rate));
  440. rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  441. for (i = 0; i < sizeof(rate->rts_rates); i++)
  442. rate->rts_rates[i] = i;
  443. }
  444. rssi = (struct pda_rssi_cal_entry *) skb_put(skb, sizeof(*rssi));
  445. rssi_data = p54_rssi_find(priv, le16_to_cpu(freq));
  446. rssi->mul = cpu_to_le16(rssi_data->mul);
  447. rssi->add = cpu_to_le16(rssi_data->add);
  448. if (priv->rxhw == PDR_SYNTH_FRONTEND_LONGBOW) {
  449. /* Longbow frontend needs ever more */
  450. rssi = (void *) skb_put(skb, sizeof(*rssi));
  451. rssi->mul = cpu_to_le16(rssi_data->longbow_unkn);
  452. rssi->add = cpu_to_le16(rssi_data->longbow_unk2);
  453. }
  454. if (priv->fw_var >= 0x509) {
  455. rate = (void *) skb_put(skb, sizeof(*rate));
  456. rate->basic_rate_mask = cpu_to_le32(priv->basic_rate_mask);
  457. for (i = 0; i < sizeof(rate->rts_rates); i++)
  458. rate->rts_rates[i] = i;
  459. }
  460. hdr = (struct p54_hdr *) skb->data;
  461. hdr->len = cpu_to_le16(skb->len - sizeof(*hdr));
  462. p54_tx(priv, skb);
  463. priv->cur_rssi = rssi_data;
  464. return 0;
  465. err:
  466. wiphy_err(priv->hw->wiphy, "frequency change to channel %d failed.\n",
  467. ieee80211_frequency_to_channel(
  468. priv->hw->conf.channel->center_freq));
  469. dev_kfree_skb_any(skb);
  470. return -EINVAL;
  471. }
  472. int p54_set_leds(struct p54_common *priv)
  473. {
  474. struct sk_buff *skb;
  475. struct p54_led *led;
  476. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*led),
  477. P54_CONTROL_TYPE_LED, GFP_ATOMIC);
  478. if (unlikely(!skb))
  479. return -ENOMEM;
  480. led = (struct p54_led *) skb_put(skb, sizeof(*led));
  481. led->flags = cpu_to_le16(0x0003);
  482. led->mask[0] = led->mask[1] = cpu_to_le16(priv->softled_state);
  483. led->delay[0] = cpu_to_le16(1);
  484. led->delay[1] = cpu_to_le16(0);
  485. p54_tx(priv, skb);
  486. return 0;
  487. }
  488. int p54_set_edcf(struct p54_common *priv)
  489. {
  490. struct sk_buff *skb;
  491. struct p54_edcf *edcf;
  492. u8 rtd;
  493. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*edcf),
  494. P54_CONTROL_TYPE_DCFINIT, GFP_ATOMIC);
  495. if (unlikely(!skb))
  496. return -ENOMEM;
  497. edcf = (struct p54_edcf *)skb_put(skb, sizeof(*edcf));
  498. if (priv->use_short_slot) {
  499. edcf->slottime = 9;
  500. edcf->sifs = 0x10;
  501. edcf->eofpad = 0x00;
  502. } else {
  503. edcf->slottime = 20;
  504. edcf->sifs = 0x0a;
  505. edcf->eofpad = 0x06;
  506. }
  507. /*
  508. * calculate the extra round trip delay according to the
  509. * formula from 802.11-2007 17.3.8.6.
  510. */
  511. rtd = 3 * priv->coverage_class;
  512. edcf->slottime += rtd;
  513. edcf->round_trip_delay = cpu_to_le16(rtd);
  514. /* (see prism54/isl_oid.h for further details) */
  515. edcf->frameburst = cpu_to_le16(0);
  516. edcf->flags = 0;
  517. memset(edcf->mapping, 0, sizeof(edcf->mapping));
  518. memcpy(edcf->queue, priv->qos_params, sizeof(edcf->queue));
  519. p54_tx(priv, skb);
  520. return 0;
  521. }
  522. int p54_set_ps(struct p54_common *priv)
  523. {
  524. struct sk_buff *skb;
  525. struct p54_psm *psm;
  526. unsigned int i;
  527. u16 mode;
  528. if (priv->hw->conf.flags & IEEE80211_CONF_PS &&
  529. !priv->powersave_override)
  530. mode = P54_PSM | P54_PSM_BEACON_TIMEOUT | P54_PSM_DTIM |
  531. P54_PSM_CHECKSUM | P54_PSM_MCBC;
  532. else
  533. mode = P54_PSM_CAM;
  534. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*psm),
  535. P54_CONTROL_TYPE_PSM, GFP_ATOMIC);
  536. if (!skb)
  537. return -ENOMEM;
  538. psm = (struct p54_psm *)skb_put(skb, sizeof(*psm));
  539. psm->mode = cpu_to_le16(mode);
  540. psm->aid = cpu_to_le16(priv->aid);
  541. for (i = 0; i < ARRAY_SIZE(psm->intervals); i++) {
  542. psm->intervals[i].interval =
  543. cpu_to_le16(priv->hw->conf.listen_interval);
  544. psm->intervals[i].periods = cpu_to_le16(1);
  545. }
  546. psm->beacon_rssi_skip_max = 200;
  547. psm->rssi_delta_threshold = 0;
  548. psm->nr = 1;
  549. psm->exclude[0] = WLAN_EID_TIM;
  550. p54_tx(priv, skb);
  551. return 0;
  552. }
  553. int p54_init_xbow_synth(struct p54_common *priv)
  554. {
  555. struct sk_buff *skb;
  556. struct p54_xbow_synth *xbow;
  557. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*xbow),
  558. P54_CONTROL_TYPE_XBOW_SYNTH_CFG, GFP_KERNEL);
  559. if (unlikely(!skb))
  560. return -ENOMEM;
  561. xbow = (struct p54_xbow_synth *)skb_put(skb, sizeof(*xbow));
  562. xbow->magic1 = cpu_to_le16(0x1);
  563. xbow->magic2 = cpu_to_le16(0x2);
  564. xbow->freq = cpu_to_le16(5390);
  565. memset(xbow->padding, 0, sizeof(xbow->padding));
  566. p54_tx(priv, skb);
  567. return 0;
  568. }
  569. int p54_upload_key(struct p54_common *priv, u8 algo, int slot, u8 idx, u8 len,
  570. u8 *addr, u8* key)
  571. {
  572. struct sk_buff *skb;
  573. struct p54_keycache *rxkey;
  574. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*rxkey),
  575. P54_CONTROL_TYPE_RX_KEYCACHE, GFP_KERNEL);
  576. if (unlikely(!skb))
  577. return -ENOMEM;
  578. rxkey = (struct p54_keycache *)skb_put(skb, sizeof(*rxkey));
  579. rxkey->entry = slot;
  580. rxkey->key_id = idx;
  581. rxkey->key_type = algo;
  582. if (addr)
  583. memcpy(rxkey->mac, addr, ETH_ALEN);
  584. else
  585. memset(rxkey->mac, ~0, ETH_ALEN);
  586. switch (algo) {
  587. case P54_CRYPTO_WEP:
  588. case P54_CRYPTO_AESCCMP:
  589. rxkey->key_len = min_t(u8, 16, len);
  590. memcpy(rxkey->key, key, rxkey->key_len);
  591. break;
  592. case P54_CRYPTO_TKIPMICHAEL:
  593. rxkey->key_len = 24;
  594. memcpy(rxkey->key, key, 16);
  595. memcpy(&(rxkey->key[16]), &(key
  596. [NL80211_TKIP_DATA_OFFSET_RX_MIC_KEY]), 8);
  597. break;
  598. case P54_CRYPTO_NONE:
  599. rxkey->key_len = 0;
  600. memset(rxkey->key, 0, sizeof(rxkey->key));
  601. break;
  602. default:
  603. wiphy_err(priv->hw->wiphy,
  604. "invalid cryptographic algorithm: %d\n", algo);
  605. dev_kfree_skb(skb);
  606. return -EINVAL;
  607. }
  608. p54_tx(priv, skb);
  609. return 0;
  610. }
  611. int p54_fetch_statistics(struct p54_common *priv)
  612. {
  613. struct ieee80211_tx_info *txinfo;
  614. struct p54_tx_info *p54info;
  615. struct sk_buff *skb;
  616. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL,
  617. sizeof(struct p54_statistics),
  618. P54_CONTROL_TYPE_STAT_READBACK, GFP_KERNEL);
  619. if (!skb)
  620. return -ENOMEM;
  621. /*
  622. * The statistic feedback causes some extra headaches here, if it
  623. * is not to crash/corrupt the firmware data structures.
  624. *
  625. * Unlike all other Control Get OIDs we can not use helpers like
  626. * skb_put to reserve the space for the data we're requesting.
  627. * Instead the extra frame length -which will hold the results later-
  628. * will only be told to the p54_assign_address, so that following
  629. * frames won't be placed into the allegedly empty area.
  630. */
  631. txinfo = IEEE80211_SKB_CB(skb);
  632. p54info = (void *) txinfo->rate_driver_data;
  633. p54info->extra_len = sizeof(struct p54_statistics);
  634. p54_tx(priv, skb);
  635. return 0;
  636. }
  637. int p54_set_groupfilter(struct p54_common *priv)
  638. {
  639. struct p54_group_address_table *grp;
  640. struct sk_buff *skb;
  641. bool on = false;
  642. skb = p54_alloc_skb(priv, P54_HDR_FLAG_CONTROL_OPSET, sizeof(*grp),
  643. P54_CONTROL_TYPE_GROUP_ADDRESS_TABLE, GFP_KERNEL);
  644. if (!skb)
  645. return -ENOMEM;
  646. grp = (struct p54_group_address_table *)skb_put(skb, sizeof(*grp));
  647. on = !(priv->filter_flags & FIF_ALLMULTI) &&
  648. (priv->mc_maclist_num > 0 &&
  649. priv->mc_maclist_num <= MC_FILTER_ADDRESS_NUM);
  650. if (on) {
  651. grp->filter_enable = cpu_to_le16(1);
  652. grp->num_address = cpu_to_le16(priv->mc_maclist_num);
  653. memcpy(grp->mac_list, priv->mc_maclist, sizeof(grp->mac_list));
  654. } else {
  655. grp->filter_enable = cpu_to_le16(0);
  656. grp->num_address = cpu_to_le16(0);
  657. memset(grp->mac_list, 0, sizeof(grp->mac_list));
  658. }
  659. p54_tx(priv, skb);
  660. return 0;
  661. }