iwl-rx.c 34 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/etherdevice.h>
  30. #include <linux/slab.h>
  31. #include <linux/sched.h>
  32. #include <net/mac80211.h>
  33. #include <asm/unaligned.h>
  34. #include "iwl-eeprom.h"
  35. #include "iwl-dev.h"
  36. #include "iwl-core.h"
  37. #include "iwl-sta.h"
  38. #include "iwl-io.h"
  39. #include "iwl-helpers.h"
  40. #include "iwl-agn-calib.h"
  41. #include "iwl-agn.h"
  42. /******************************************************************************
  43. *
  44. * RX path functions
  45. *
  46. ******************************************************************************/
  47. /*
  48. * Rx theory of operation
  49. *
  50. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  51. * each of which point to Receive Buffers to be filled by the NIC. These get
  52. * used not only for Rx frames, but for any command response or notification
  53. * from the NIC. The driver and NIC manage the Rx buffers by means
  54. * of indexes into the circular buffer.
  55. *
  56. * Rx Queue Indexes
  57. * The host/firmware share two index registers for managing the Rx buffers.
  58. *
  59. * The READ index maps to the first position that the firmware may be writing
  60. * to -- the driver can read up to (but not including) this position and get
  61. * good data.
  62. * The READ index is managed by the firmware once the card is enabled.
  63. *
  64. * The WRITE index maps to the last position the driver has read from -- the
  65. * position preceding WRITE is the last slot the firmware can place a packet.
  66. *
  67. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  68. * WRITE = READ.
  69. *
  70. * During initialization, the host sets up the READ queue position to the first
  71. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  72. *
  73. * When the firmware places a packet in a buffer, it will advance the READ index
  74. * and fire the RX interrupt. The driver can then query the READ index and
  75. * process as many packets as possible, moving the WRITE index forward as it
  76. * resets the Rx queue buffers with new memory.
  77. *
  78. * The management in the driver is as follows:
  79. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  80. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  81. * to replenish the iwl->rxq->rx_free.
  82. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  83. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  84. * 'processed' and 'read' driver indexes as well)
  85. * + A received packet is processed and handed to the kernel network stack,
  86. * detached from the iwl->rxq. The driver 'processed' index is updated.
  87. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  88. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  89. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  90. * were enough free buffers and RX_STALLED is set it is cleared.
  91. *
  92. *
  93. * Driver sequence:
  94. *
  95. * iwl_rx_queue_alloc() Allocates rx_free
  96. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  97. * iwl_rx_queue_restock
  98. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  99. * queue, updates firmware pointers, and updates
  100. * the WRITE index. If insufficient rx_free buffers
  101. * are available, schedules iwl_rx_replenish
  102. *
  103. * -- enable interrupts --
  104. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  105. * READ INDEX, detaching the SKB from the pool.
  106. * Moves the packet buffer from queue to rx_used.
  107. * Calls iwl_rx_queue_restock to refill any empty
  108. * slots.
  109. * ...
  110. *
  111. */
  112. /**
  113. * iwl_rx_queue_space - Return number of free slots available in queue.
  114. */
  115. int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  116. {
  117. int s = q->read - q->write;
  118. if (s <= 0)
  119. s += RX_QUEUE_SIZE;
  120. /* keep some buffer to not confuse full and empty queue */
  121. s -= 2;
  122. if (s < 0)
  123. s = 0;
  124. return s;
  125. }
  126. /**
  127. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  128. */
  129. void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  130. {
  131. unsigned long flags;
  132. u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
  133. u32 reg;
  134. spin_lock_irqsave(&q->lock, flags);
  135. if (q->need_update == 0)
  136. goto exit_unlock;
  137. if (priv->cfg->base_params->shadow_reg_enable) {
  138. /* shadow register enabled */
  139. /* Device expects a multiple of 8 */
  140. q->write_actual = (q->write & ~0x7);
  141. iwl_write32(priv, rx_wrt_ptr_reg, q->write_actual);
  142. } else {
  143. /* If power-saving is in use, make sure device is awake */
  144. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  145. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  146. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  147. IWL_DEBUG_INFO(priv,
  148. "Rx queue requesting wakeup,"
  149. " GP1 = 0x%x\n", reg);
  150. iwl_set_bit(priv, CSR_GP_CNTRL,
  151. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  152. goto exit_unlock;
  153. }
  154. q->write_actual = (q->write & ~0x7);
  155. iwl_write_direct32(priv, rx_wrt_ptr_reg,
  156. q->write_actual);
  157. /* Else device is assumed to be awake */
  158. } else {
  159. /* Device expects a multiple of 8 */
  160. q->write_actual = (q->write & ~0x7);
  161. iwl_write_direct32(priv, rx_wrt_ptr_reg,
  162. q->write_actual);
  163. }
  164. }
  165. q->need_update = 0;
  166. exit_unlock:
  167. spin_unlock_irqrestore(&q->lock, flags);
  168. }
  169. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  170. {
  171. struct iwl_rx_queue *rxq = &priv->rxq;
  172. struct device *dev = &priv->pci_dev->dev;
  173. int i;
  174. spin_lock_init(&rxq->lock);
  175. INIT_LIST_HEAD(&rxq->rx_free);
  176. INIT_LIST_HEAD(&rxq->rx_used);
  177. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  178. rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
  179. GFP_KERNEL);
  180. if (!rxq->bd)
  181. goto err_bd;
  182. rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
  183. &rxq->rb_stts_dma, GFP_KERNEL);
  184. if (!rxq->rb_stts)
  185. goto err_rb;
  186. /* Fill the rx_used queue with _all_ of the Rx buffers */
  187. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  188. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  189. /* Set us so that we have processed and used all buffers, but have
  190. * not restocked the Rx queue with fresh buffers */
  191. rxq->read = rxq->write = 0;
  192. rxq->write_actual = 0;
  193. rxq->free_count = 0;
  194. rxq->need_update = 0;
  195. return 0;
  196. err_rb:
  197. dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  198. rxq->bd_dma);
  199. err_bd:
  200. return -ENOMEM;
  201. }
  202. /******************************************************************************
  203. *
  204. * Generic RX handler implementations
  205. *
  206. ******************************************************************************/
  207. static void iwl_rx_reply_error(struct iwl_priv *priv,
  208. struct iwl_rx_mem_buffer *rxb)
  209. {
  210. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  211. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  212. "seq 0x%04X ser 0x%08X\n",
  213. le32_to_cpu(pkt->u.err_resp.error_type),
  214. get_cmd_string(pkt->u.err_resp.cmd_id),
  215. pkt->u.err_resp.cmd_id,
  216. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  217. le32_to_cpu(pkt->u.err_resp.error_info));
  218. }
  219. static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  220. {
  221. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  222. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  223. /*
  224. * MULTI-FIXME
  225. * See iwl_mac_channel_switch.
  226. */
  227. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  228. struct iwl_rxon_cmd *rxon = (void *)&ctx->active;
  229. if (!test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status))
  230. return;
  231. if (!le32_to_cpu(csa->status) && csa->channel == priv->switch_channel) {
  232. rxon->channel = csa->channel;
  233. ctx->staging.channel = csa->channel;
  234. IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
  235. le16_to_cpu(csa->channel));
  236. iwl_chswitch_done(priv, true);
  237. } else {
  238. IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
  239. le16_to_cpu(csa->channel));
  240. iwl_chswitch_done(priv, false);
  241. }
  242. }
  243. static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  244. struct iwl_rx_mem_buffer *rxb)
  245. {
  246. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  247. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  248. if (!report->state) {
  249. IWL_DEBUG_11H(priv,
  250. "Spectrum Measure Notification: Start\n");
  251. return;
  252. }
  253. memcpy(&priv->measure_report, report, sizeof(*report));
  254. priv->measurement_status |= MEASUREMENT_READY;
  255. }
  256. static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  257. struct iwl_rx_mem_buffer *rxb)
  258. {
  259. #ifdef CONFIG_IWLWIFI_DEBUG
  260. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  261. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  262. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  263. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  264. #endif
  265. }
  266. static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  267. struct iwl_rx_mem_buffer *rxb)
  268. {
  269. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  270. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  271. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  272. "notification for %s:\n", len,
  273. get_cmd_string(pkt->hdr.cmd));
  274. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  275. }
  276. static void iwl_rx_beacon_notif(struct iwl_priv *priv,
  277. struct iwl_rx_mem_buffer *rxb)
  278. {
  279. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  280. struct iwlagn_beacon_notif *beacon = (void *)pkt->u.raw;
  281. #ifdef CONFIG_IWLWIFI_DEBUG
  282. u16 status = le16_to_cpu(beacon->beacon_notify_hdr.status.status);
  283. u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  284. IWL_DEBUG_RX(priv, "beacon status %#x, retries:%d ibssmgr:%d "
  285. "tsf:0x%.8x%.8x rate:%d\n",
  286. status & TX_STATUS_MSK,
  287. beacon->beacon_notify_hdr.failure_frame,
  288. le32_to_cpu(beacon->ibss_mgr_status),
  289. le32_to_cpu(beacon->high_tsf),
  290. le32_to_cpu(beacon->low_tsf), rate);
  291. #endif
  292. priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  293. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  294. queue_work(priv->workqueue, &priv->beacon_update);
  295. }
  296. /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
  297. #define ACK_CNT_RATIO (50)
  298. #define BA_TIMEOUT_CNT (5)
  299. #define BA_TIMEOUT_MAX (16)
  300. /**
  301. * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
  302. *
  303. * When the ACK count ratio is low and aggregated BA timeout retries exceeding
  304. * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
  305. * operation state.
  306. */
  307. static bool iwl_good_ack_health(struct iwl_priv *priv,
  308. struct statistics_tx *cur)
  309. {
  310. int actual_delta, expected_delta, ba_timeout_delta;
  311. struct statistics_tx *old;
  312. if (priv->_agn.agg_tids_count)
  313. return true;
  314. old = &priv->statistics.tx;
  315. actual_delta = le32_to_cpu(cur->actual_ack_cnt) -
  316. le32_to_cpu(old->actual_ack_cnt);
  317. expected_delta = le32_to_cpu(cur->expected_ack_cnt) -
  318. le32_to_cpu(old->expected_ack_cnt);
  319. /* Values should not be negative, but we do not trust the firmware */
  320. if (actual_delta <= 0 || expected_delta <= 0)
  321. return true;
  322. ba_timeout_delta = le32_to_cpu(cur->agg.ba_timeout) -
  323. le32_to_cpu(old->agg.ba_timeout);
  324. if ((actual_delta * 100 / expected_delta) < ACK_CNT_RATIO &&
  325. ba_timeout_delta > BA_TIMEOUT_CNT) {
  326. IWL_DEBUG_RADIO(priv, "deltas: actual %d expected %d ba_timeout %d\n",
  327. actual_delta, expected_delta, ba_timeout_delta);
  328. #ifdef CONFIG_IWLWIFI_DEBUGFS
  329. /*
  330. * This is ifdef'ed on DEBUGFS because otherwise the
  331. * statistics aren't available. If DEBUGFS is set but
  332. * DEBUG is not, these will just compile out.
  333. */
  334. IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta %d\n",
  335. priv->delta_stats.tx.rx_detected_cnt);
  336. IWL_DEBUG_RADIO(priv,
  337. "ack_or_ba_timeout_collision delta %d\n",
  338. priv->delta_stats.tx.ack_or_ba_timeout_collision);
  339. #endif
  340. if (ba_timeout_delta >= BA_TIMEOUT_MAX)
  341. return false;
  342. }
  343. return true;
  344. }
  345. /**
  346. * iwl_good_plcp_health - checks for plcp error.
  347. *
  348. * When the plcp error is exceeding the thresholds, reset the radio
  349. * to improve the throughput.
  350. */
  351. static bool iwl_good_plcp_health(struct iwl_priv *priv,
  352. struct statistics_rx_phy *cur_ofdm,
  353. struct statistics_rx_ht_phy *cur_ofdm_ht,
  354. unsigned int msecs)
  355. {
  356. int delta;
  357. int threshold = priv->cfg->base_params->plcp_delta_threshold;
  358. if (threshold == IWL_MAX_PLCP_ERR_THRESHOLD_DISABLE) {
  359. IWL_DEBUG_RADIO(priv, "plcp_err check disabled\n");
  360. return true;
  361. }
  362. delta = le32_to_cpu(cur_ofdm->plcp_err) -
  363. le32_to_cpu(priv->statistics.rx_ofdm.plcp_err) +
  364. le32_to_cpu(cur_ofdm_ht->plcp_err) -
  365. le32_to_cpu(priv->statistics.rx_ofdm_ht.plcp_err);
  366. /* Can be negative if firmware reset statistics */
  367. if (delta <= 0)
  368. return true;
  369. if ((delta * 100 / msecs) > threshold) {
  370. IWL_DEBUG_RADIO(priv,
  371. "plcp health threshold %u delta %d msecs %u\n",
  372. threshold, delta, msecs);
  373. return false;
  374. }
  375. return true;
  376. }
  377. static void iwl_recover_from_statistics(struct iwl_priv *priv,
  378. struct statistics_rx_phy *cur_ofdm,
  379. struct statistics_rx_ht_phy *cur_ofdm_ht,
  380. struct statistics_tx *tx,
  381. unsigned long stamp)
  382. {
  383. unsigned int msecs;
  384. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  385. return;
  386. msecs = jiffies_to_msecs(stamp - priv->rx_statistics_jiffies);
  387. /* Only gather statistics and update time stamp when not associated */
  388. if (!iwl_is_any_associated(priv))
  389. return;
  390. /* Do not check/recover when do not have enough statistics data */
  391. if (msecs < 99)
  392. return;
  393. if (iwlagn_mod_params.ack_check && !iwl_good_ack_health(priv, tx)) {
  394. IWL_ERR(priv, "low ack count detected, restart firmware\n");
  395. if (!iwl_force_reset(priv, IWL_FW_RESET, false))
  396. return;
  397. }
  398. if (iwlagn_mod_params.plcp_check &&
  399. !iwl_good_plcp_health(priv, cur_ofdm, cur_ofdm_ht, msecs))
  400. iwl_force_reset(priv, IWL_RF_RESET, false);
  401. }
  402. /* Calculate noise level, based on measurements during network silence just
  403. * before arriving beacon. This measurement can be done only if we know
  404. * exactly when to expect beacons, therefore only when we're associated. */
  405. static void iwl_rx_calc_noise(struct iwl_priv *priv)
  406. {
  407. struct statistics_rx_non_phy *rx_info;
  408. int num_active_rx = 0;
  409. int total_silence = 0;
  410. int bcn_silence_a, bcn_silence_b, bcn_silence_c;
  411. int last_rx_noise;
  412. rx_info = &priv->statistics.rx_non_phy;
  413. bcn_silence_a =
  414. le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
  415. bcn_silence_b =
  416. le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
  417. bcn_silence_c =
  418. le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
  419. if (bcn_silence_a) {
  420. total_silence += bcn_silence_a;
  421. num_active_rx++;
  422. }
  423. if (bcn_silence_b) {
  424. total_silence += bcn_silence_b;
  425. num_active_rx++;
  426. }
  427. if (bcn_silence_c) {
  428. total_silence += bcn_silence_c;
  429. num_active_rx++;
  430. }
  431. /* Average among active antennas */
  432. if (num_active_rx)
  433. last_rx_noise = (total_silence / num_active_rx) - 107;
  434. else
  435. last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  436. IWL_DEBUG_CALIB(priv, "inband silence a %u, b %u, c %u, dBm %d\n",
  437. bcn_silence_a, bcn_silence_b, bcn_silence_c,
  438. last_rx_noise);
  439. }
  440. #ifdef CONFIG_IWLWIFI_DEBUGFS
  441. /*
  442. * based on the assumption of all statistics counter are in DWORD
  443. * FIXME: This function is for debugging, do not deal with
  444. * the case of counters roll-over.
  445. */
  446. static void accum_stats(__le32 *prev, __le32 *cur, __le32 *delta,
  447. __le32 *max_delta, __le32 *accum, int size)
  448. {
  449. int i;
  450. for (i = 0;
  451. i < size / sizeof(__le32);
  452. i++, prev++, cur++, delta++, max_delta++, accum++) {
  453. if (le32_to_cpu(*cur) > le32_to_cpu(*prev)) {
  454. *delta = cpu_to_le32(
  455. le32_to_cpu(*cur) - le32_to_cpu(*prev));
  456. le32_add_cpu(accum, le32_to_cpu(*delta));
  457. if (le32_to_cpu(*delta) > le32_to_cpu(*max_delta))
  458. *max_delta = *delta;
  459. }
  460. }
  461. }
  462. static void
  463. iwl_accumulative_statistics(struct iwl_priv *priv,
  464. struct statistics_general_common *common,
  465. struct statistics_rx_non_phy *rx_non_phy,
  466. struct statistics_rx_phy *rx_ofdm,
  467. struct statistics_rx_ht_phy *rx_ofdm_ht,
  468. struct statistics_rx_phy *rx_cck,
  469. struct statistics_tx *tx,
  470. struct statistics_bt_activity *bt_activity)
  471. {
  472. #define ACCUM(_name) \
  473. accum_stats((__le32 *)&priv->statistics._name, \
  474. (__le32 *)_name, \
  475. (__le32 *)&priv->delta_stats._name, \
  476. (__le32 *)&priv->max_delta_stats._name, \
  477. (__le32 *)&priv->accum_stats._name, \
  478. sizeof(*_name));
  479. ACCUM(common);
  480. ACCUM(rx_non_phy);
  481. ACCUM(rx_ofdm);
  482. ACCUM(rx_ofdm_ht);
  483. ACCUM(rx_cck);
  484. ACCUM(tx);
  485. if (bt_activity)
  486. ACCUM(bt_activity);
  487. #undef ACCUM
  488. }
  489. #else
  490. static inline void
  491. iwl_accumulative_statistics(struct iwl_priv *priv,
  492. struct statistics_general_common *common,
  493. struct statistics_rx_non_phy *rx_non_phy,
  494. struct statistics_rx_phy *rx_ofdm,
  495. struct statistics_rx_ht_phy *rx_ofdm_ht,
  496. struct statistics_rx_phy *rx_cck,
  497. struct statistics_tx *tx,
  498. struct statistics_bt_activity *bt_activity)
  499. {
  500. }
  501. #endif
  502. static void iwl_rx_statistics(struct iwl_priv *priv,
  503. struct iwl_rx_mem_buffer *rxb)
  504. {
  505. unsigned long stamp = jiffies;
  506. const int reg_recalib_period = 60;
  507. int change;
  508. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  509. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  510. __le32 *flag;
  511. struct statistics_general_common *common;
  512. struct statistics_rx_non_phy *rx_non_phy;
  513. struct statistics_rx_phy *rx_ofdm;
  514. struct statistics_rx_ht_phy *rx_ofdm_ht;
  515. struct statistics_rx_phy *rx_cck;
  516. struct statistics_tx *tx;
  517. struct statistics_bt_activity *bt_activity;
  518. len -= sizeof(struct iwl_cmd_header); /* skip header */
  519. IWL_DEBUG_RX(priv, "Statistics notification received (%d bytes).\n",
  520. len);
  521. if (len == sizeof(struct iwl_bt_notif_statistics)) {
  522. struct iwl_bt_notif_statistics *stats;
  523. stats = &pkt->u.stats_bt;
  524. flag = &stats->flag;
  525. common = &stats->general.common;
  526. rx_non_phy = &stats->rx.general.common;
  527. rx_ofdm = &stats->rx.ofdm;
  528. rx_ofdm_ht = &stats->rx.ofdm_ht;
  529. rx_cck = &stats->rx.cck;
  530. tx = &stats->tx;
  531. bt_activity = &stats->general.activity;
  532. #ifdef CONFIG_IWLWIFI_DEBUGFS
  533. /* handle this exception directly */
  534. priv->statistics.num_bt_kills = stats->rx.general.num_bt_kills;
  535. le32_add_cpu(&priv->statistics.accum_num_bt_kills,
  536. le32_to_cpu(stats->rx.general.num_bt_kills));
  537. #endif
  538. } else if (len == sizeof(struct iwl_notif_statistics)) {
  539. struct iwl_notif_statistics *stats;
  540. stats = &pkt->u.stats;
  541. flag = &stats->flag;
  542. common = &stats->general.common;
  543. rx_non_phy = &stats->rx.general;
  544. rx_ofdm = &stats->rx.ofdm;
  545. rx_ofdm_ht = &stats->rx.ofdm_ht;
  546. rx_cck = &stats->rx.cck;
  547. tx = &stats->tx;
  548. bt_activity = NULL;
  549. } else {
  550. WARN_ONCE(1, "len %d doesn't match BT (%zu) or normal (%zu)\n",
  551. len, sizeof(struct iwl_bt_notif_statistics),
  552. sizeof(struct iwl_notif_statistics));
  553. return;
  554. }
  555. change = common->temperature != priv->statistics.common.temperature ||
  556. (*flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
  557. (priv->statistics.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK);
  558. iwl_accumulative_statistics(priv, common, rx_non_phy, rx_ofdm,
  559. rx_ofdm_ht, rx_cck, tx, bt_activity);
  560. iwl_recover_from_statistics(priv, rx_ofdm, rx_ofdm_ht, tx, stamp);
  561. priv->statistics.flag = *flag;
  562. memcpy(&priv->statistics.common, common, sizeof(*common));
  563. memcpy(&priv->statistics.rx_non_phy, rx_non_phy, sizeof(*rx_non_phy));
  564. memcpy(&priv->statistics.rx_ofdm, rx_ofdm, sizeof(*rx_ofdm));
  565. memcpy(&priv->statistics.rx_ofdm_ht, rx_ofdm_ht, sizeof(*rx_ofdm_ht));
  566. memcpy(&priv->statistics.rx_cck, rx_cck, sizeof(*rx_cck));
  567. memcpy(&priv->statistics.tx, tx, sizeof(*tx));
  568. #ifdef CONFIG_IWLWIFI_DEBUGFS
  569. if (bt_activity)
  570. memcpy(&priv->statistics.bt_activity, bt_activity,
  571. sizeof(*bt_activity));
  572. #endif
  573. priv->rx_statistics_jiffies = stamp;
  574. set_bit(STATUS_STATISTICS, &priv->status);
  575. /* Reschedule the statistics timer to occur in
  576. * reg_recalib_period seconds to ensure we get a
  577. * thermal update even if the uCode doesn't give
  578. * us one */
  579. mod_timer(&priv->statistics_periodic, jiffies +
  580. msecs_to_jiffies(reg_recalib_period * 1000));
  581. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  582. (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
  583. iwl_rx_calc_noise(priv);
  584. queue_work(priv->workqueue, &priv->run_time_calib_work);
  585. }
  586. if (priv->cfg->ops->lib->temp_ops.temperature && change)
  587. priv->cfg->ops->lib->temp_ops.temperature(priv);
  588. }
  589. static void iwl_rx_reply_statistics(struct iwl_priv *priv,
  590. struct iwl_rx_mem_buffer *rxb)
  591. {
  592. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  593. if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) {
  594. #ifdef CONFIG_IWLWIFI_DEBUGFS
  595. memset(&priv->accum_stats, 0,
  596. sizeof(priv->accum_stats));
  597. memset(&priv->delta_stats, 0,
  598. sizeof(priv->delta_stats));
  599. memset(&priv->max_delta_stats, 0,
  600. sizeof(priv->max_delta_stats));
  601. #endif
  602. IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
  603. }
  604. iwl_rx_statistics(priv, rxb);
  605. }
  606. /* Handle notification from uCode that card's power state is changing
  607. * due to software, hardware, or critical temperature RFKILL */
  608. static void iwl_rx_card_state_notif(struct iwl_priv *priv,
  609. struct iwl_rx_mem_buffer *rxb)
  610. {
  611. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  612. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  613. unsigned long status = priv->status;
  614. IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
  615. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  616. (flags & SW_CARD_DISABLED) ? "Kill" : "On",
  617. (flags & CT_CARD_DISABLED) ?
  618. "Reached" : "Not reached");
  619. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  620. CT_CARD_DISABLED)) {
  621. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  622. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  623. iwl_write_direct32(priv, HBUS_TARG_MBX_C,
  624. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  625. if (!(flags & RXON_CARD_DISABLED)) {
  626. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  627. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  628. iwl_write_direct32(priv, HBUS_TARG_MBX_C,
  629. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  630. }
  631. if (flags & CT_CARD_DISABLED)
  632. iwl_tt_enter_ct_kill(priv);
  633. }
  634. if (!(flags & CT_CARD_DISABLED))
  635. iwl_tt_exit_ct_kill(priv);
  636. if (flags & HW_CARD_DISABLED)
  637. set_bit(STATUS_RF_KILL_HW, &priv->status);
  638. else
  639. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  640. if (!(flags & RXON_CARD_DISABLED))
  641. iwl_scan_cancel(priv);
  642. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  643. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  644. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  645. test_bit(STATUS_RF_KILL_HW, &priv->status));
  646. else
  647. wake_up(&priv->wait_command_queue);
  648. }
  649. static void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
  650. struct iwl_rx_mem_buffer *rxb)
  651. {
  652. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  653. struct iwl_missed_beacon_notif *missed_beacon;
  654. missed_beacon = &pkt->u.missed_beacon;
  655. if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
  656. priv->missed_beacon_threshold) {
  657. IWL_DEBUG_CALIB(priv,
  658. "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
  659. le32_to_cpu(missed_beacon->consecutive_missed_beacons),
  660. le32_to_cpu(missed_beacon->total_missed_becons),
  661. le32_to_cpu(missed_beacon->num_recvd_beacons),
  662. le32_to_cpu(missed_beacon->num_expected_beacons));
  663. if (!test_bit(STATUS_SCANNING, &priv->status))
  664. iwl_init_sensitivity(priv);
  665. }
  666. }
  667. /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
  668. * This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
  669. static void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
  670. struct iwl_rx_mem_buffer *rxb)
  671. {
  672. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  673. priv->_agn.last_phy_res_valid = true;
  674. memcpy(&priv->_agn.last_phy_res, pkt->u.raw,
  675. sizeof(struct iwl_rx_phy_res));
  676. }
  677. /*
  678. * returns non-zero if packet should be dropped
  679. */
  680. static int iwl_set_decrypted_flag(struct iwl_priv *priv,
  681. struct ieee80211_hdr *hdr,
  682. u32 decrypt_res,
  683. struct ieee80211_rx_status *stats)
  684. {
  685. u16 fc = le16_to_cpu(hdr->frame_control);
  686. /*
  687. * All contexts have the same setting here due to it being
  688. * a module parameter, so OK to check any context.
  689. */
  690. if (priv->contexts[IWL_RXON_CTX_BSS].active.filter_flags &
  691. RXON_FILTER_DIS_DECRYPT_MSK)
  692. return 0;
  693. if (!(fc & IEEE80211_FCTL_PROTECTED))
  694. return 0;
  695. IWL_DEBUG_RX(priv, "decrypt_res:0x%x\n", decrypt_res);
  696. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  697. case RX_RES_STATUS_SEC_TYPE_TKIP:
  698. /* The uCode has got a bad phase 1 Key, pushes the packet.
  699. * Decryption will be done in SW. */
  700. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  701. RX_RES_STATUS_BAD_KEY_TTAK)
  702. break;
  703. case RX_RES_STATUS_SEC_TYPE_WEP:
  704. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  705. RX_RES_STATUS_BAD_ICV_MIC) {
  706. /* bad ICV, the packet is destroyed since the
  707. * decryption is inplace, drop it */
  708. IWL_DEBUG_RX(priv, "Packet destroyed\n");
  709. return -1;
  710. }
  711. case RX_RES_STATUS_SEC_TYPE_CCMP:
  712. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  713. RX_RES_STATUS_DECRYPT_OK) {
  714. IWL_DEBUG_RX(priv, "hw decrypt successfully!!!\n");
  715. stats->flag |= RX_FLAG_DECRYPTED;
  716. }
  717. break;
  718. default:
  719. break;
  720. }
  721. return 0;
  722. }
  723. static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
  724. struct ieee80211_hdr *hdr,
  725. u16 len,
  726. u32 ampdu_status,
  727. struct iwl_rx_mem_buffer *rxb,
  728. struct ieee80211_rx_status *stats)
  729. {
  730. struct sk_buff *skb;
  731. __le16 fc = hdr->frame_control;
  732. struct iwl_rxon_context *ctx;
  733. /* We only process data packets if the interface is open */
  734. if (unlikely(!priv->is_open)) {
  735. IWL_DEBUG_DROP_LIMIT(priv,
  736. "Dropping packet while interface is not open.\n");
  737. return;
  738. }
  739. /* In case of HW accelerated crypto and bad decryption, drop */
  740. if (!iwlagn_mod_params.sw_crypto &&
  741. iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
  742. return;
  743. skb = dev_alloc_skb(128);
  744. if (!skb) {
  745. IWL_ERR(priv, "dev_alloc_skb failed\n");
  746. return;
  747. }
  748. skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
  749. iwl_update_stats(priv, false, fc, len);
  750. /*
  751. * Wake any queues that were stopped due to a passive channel tx
  752. * failure. This can happen because the regulatory enforcement in
  753. * the device waits for a beacon before allowing transmission,
  754. * sometimes even after already having transmitted frames for the
  755. * association because the new RXON may reset the information.
  756. */
  757. if (unlikely(ieee80211_is_beacon(fc))) {
  758. for_each_context(priv, ctx) {
  759. if (!ctx->last_tx_rejected)
  760. continue;
  761. if (compare_ether_addr(hdr->addr3,
  762. ctx->active.bssid_addr))
  763. continue;
  764. ctx->last_tx_rejected = false;
  765. iwl_wake_any_queue(priv, ctx);
  766. }
  767. }
  768. memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
  769. ieee80211_rx(priv->hw, skb);
  770. rxb->page = NULL;
  771. }
  772. static u32 iwl_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
  773. {
  774. u32 decrypt_out = 0;
  775. if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
  776. RX_RES_STATUS_STATION_FOUND)
  777. decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
  778. RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
  779. decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
  780. /* packet was not encrypted */
  781. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  782. RX_RES_STATUS_SEC_TYPE_NONE)
  783. return decrypt_out;
  784. /* packet was encrypted with unknown alg */
  785. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  786. RX_RES_STATUS_SEC_TYPE_ERR)
  787. return decrypt_out;
  788. /* decryption was not done in HW */
  789. if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
  790. RX_MPDU_RES_STATUS_DEC_DONE_MSK)
  791. return decrypt_out;
  792. switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
  793. case RX_RES_STATUS_SEC_TYPE_CCMP:
  794. /* alg is CCM: check MIC only */
  795. if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
  796. /* Bad MIC */
  797. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  798. else
  799. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  800. break;
  801. case RX_RES_STATUS_SEC_TYPE_TKIP:
  802. if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
  803. /* Bad TTAK */
  804. decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
  805. break;
  806. }
  807. /* fall through if TTAK OK */
  808. default:
  809. if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
  810. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  811. else
  812. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  813. break;
  814. }
  815. IWL_DEBUG_RX(priv, "decrypt_in:0x%x decrypt_out = 0x%x\n",
  816. decrypt_in, decrypt_out);
  817. return decrypt_out;
  818. }
  819. /* Called for REPLY_RX (legacy ABG frames), or
  820. * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
  821. static void iwl_rx_reply_rx(struct iwl_priv *priv,
  822. struct iwl_rx_mem_buffer *rxb)
  823. {
  824. struct ieee80211_hdr *header;
  825. struct ieee80211_rx_status rx_status;
  826. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  827. struct iwl_rx_phy_res *phy_res;
  828. __le32 rx_pkt_status;
  829. struct iwl_rx_mpdu_res_start *amsdu;
  830. u32 len;
  831. u32 ampdu_status;
  832. u32 rate_n_flags;
  833. /**
  834. * REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
  835. * REPLY_RX: physical layer info is in this buffer
  836. * REPLY_RX_MPDU_CMD: physical layer info was sent in separate
  837. * command and cached in priv->last_phy_res
  838. *
  839. * Here we set up local variables depending on which command is
  840. * received.
  841. */
  842. if (pkt->hdr.cmd == REPLY_RX) {
  843. phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
  844. header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
  845. + phy_res->cfg_phy_cnt);
  846. len = le16_to_cpu(phy_res->byte_count);
  847. rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
  848. phy_res->cfg_phy_cnt + len);
  849. ampdu_status = le32_to_cpu(rx_pkt_status);
  850. } else {
  851. if (!priv->_agn.last_phy_res_valid) {
  852. IWL_ERR(priv, "MPDU frame without cached PHY data\n");
  853. return;
  854. }
  855. phy_res = &priv->_agn.last_phy_res;
  856. amsdu = (struct iwl_rx_mpdu_res_start *)pkt->u.raw;
  857. header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
  858. len = le16_to_cpu(amsdu->byte_count);
  859. rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
  860. ampdu_status = iwl_translate_rx_status(priv,
  861. le32_to_cpu(rx_pkt_status));
  862. }
  863. if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
  864. IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
  865. phy_res->cfg_phy_cnt);
  866. return;
  867. }
  868. if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
  869. !(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
  870. IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
  871. le32_to_cpu(rx_pkt_status));
  872. return;
  873. }
  874. /* This will be used in several places later */
  875. rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
  876. /* rx_status carries information about the packet to mac80211 */
  877. rx_status.mactime = le64_to_cpu(phy_res->timestamp);
  878. rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
  879. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  880. rx_status.freq =
  881. ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel),
  882. rx_status.band);
  883. rx_status.rate_idx =
  884. iwlagn_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
  885. rx_status.flag = 0;
  886. /* TSF isn't reliable. In order to allow smooth user experience,
  887. * this W/A doesn't propagate it to the mac80211 */
  888. /*rx_status.flag |= RX_FLAG_MACTIME_MPDU;*/
  889. priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
  890. /* Find max signal strength (dBm) among 3 antenna/receiver chains */
  891. rx_status.signal = priv->cfg->ops->utils->calc_rssi(priv, phy_res);
  892. iwl_dbg_log_rx_data_frame(priv, len, header);
  893. IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, TSF %llu\n",
  894. rx_status.signal, (unsigned long long)rx_status.mactime);
  895. /*
  896. * "antenna number"
  897. *
  898. * It seems that the antenna field in the phy flags value
  899. * is actually a bit field. This is undefined by radiotap,
  900. * it wants an actual antenna number but I always get "7"
  901. * for most legacy frames I receive indicating that the
  902. * same frame was received on all three RX chains.
  903. *
  904. * I think this field should be removed in favor of a
  905. * new 802.11n radiotap field "RX chains" that is defined
  906. * as a bitmask.
  907. */
  908. rx_status.antenna =
  909. (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
  910. >> RX_RES_PHY_FLAGS_ANTENNA_POS;
  911. /* set the preamble flag if appropriate */
  912. if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  913. rx_status.flag |= RX_FLAG_SHORTPRE;
  914. /* Set up the HT phy flags */
  915. if (rate_n_flags & RATE_MCS_HT_MSK)
  916. rx_status.flag |= RX_FLAG_HT;
  917. if (rate_n_flags & RATE_MCS_HT40_MSK)
  918. rx_status.flag |= RX_FLAG_40MHZ;
  919. if (rate_n_flags & RATE_MCS_SGI_MSK)
  920. rx_status.flag |= RX_FLAG_SHORT_GI;
  921. iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
  922. rxb, &rx_status);
  923. }
  924. /**
  925. * iwl_setup_rx_handlers - Initialize Rx handler callbacks
  926. *
  927. * Setup the RX handlers for each of the reply types sent from the uCode
  928. * to the host.
  929. */
  930. void iwl_setup_rx_handlers(struct iwl_priv *priv)
  931. {
  932. void (**handlers)(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
  933. handlers = priv->rx_handlers;
  934. handlers[REPLY_ERROR] = iwl_rx_reply_error;
  935. handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  936. handlers[SPECTRUM_MEASURE_NOTIFICATION] = iwl_rx_spectrum_measure_notif;
  937. handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  938. handlers[PM_DEBUG_STATISTIC_NOTIFIC] = iwl_rx_pm_debug_statistics_notif;
  939. handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
  940. /*
  941. * The same handler is used for both the REPLY to a discrete
  942. * statistics request from the host as well as for the periodic
  943. * statistics notifications (after received beacons) from the uCode.
  944. */
  945. handlers[REPLY_STATISTICS_CMD] = iwl_rx_reply_statistics;
  946. handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
  947. iwl_setup_rx_scan_handlers(priv);
  948. handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
  949. handlers[MISSED_BEACONS_NOTIFICATION] = iwl_rx_missed_beacon_notif;
  950. /* Rx handlers */
  951. handlers[REPLY_RX_PHY_CMD] = iwl_rx_reply_rx_phy;
  952. handlers[REPLY_RX_MPDU_CMD] = iwl_rx_reply_rx;
  953. /* block ack */
  954. handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
  955. /* Set up hardware specific Rx handlers */
  956. priv->cfg->ops->lib->rx_handler_setup(priv);
  957. }