iwl3945-base.c 122 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/pci-aspm.h>
  35. #include <linux/slab.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/sched.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/wireless.h>
  42. #include <linux/firmware.h>
  43. #include <linux/etherdevice.h>
  44. #include <linux/if_arp.h>
  45. #include <net/ieee80211_radiotap.h>
  46. #include <net/mac80211.h>
  47. #include <asm/div64.h>
  48. #define DRV_NAME "iwl3945"
  49. #include "iwl-fh.h"
  50. #include "iwl-3945-fh.h"
  51. #include "iwl-commands.h"
  52. #include "iwl-sta.h"
  53. #include "iwl-3945.h"
  54. #include "iwl-core.h"
  55. #include "iwl-helpers.h"
  56. #include "iwl-dev.h"
  57. #include "iwl-spectrum.h"
  58. /*
  59. * module name, copyright, version, etc.
  60. */
  61. #define DRV_DESCRIPTION \
  62. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  63. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  64. #define VD "d"
  65. #else
  66. #define VD
  67. #endif
  68. /*
  69. * add "s" to indicate spectrum measurement included.
  70. * we add it here to be consistent with previous releases in which
  71. * this was configurable.
  72. */
  73. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  74. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  75. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  76. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  77. MODULE_VERSION(DRV_VERSION);
  78. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  79. MODULE_LICENSE("GPL");
  80. /* module parameters */
  81. struct iwl_mod_params iwl3945_mod_params = {
  82. .sw_crypto = 1,
  83. .restart_fw = 1,
  84. .disable_hw_scan = 1,
  85. /* the rest are 0 by default */
  86. };
  87. /**
  88. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  89. * @priv: eeprom and antenna fields are used to determine antenna flags
  90. *
  91. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  92. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  93. *
  94. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  95. * IWL_ANTENNA_MAIN - Force MAIN antenna
  96. * IWL_ANTENNA_AUX - Force AUX antenna
  97. */
  98. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  99. {
  100. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  101. switch (iwl3945_mod_params.antenna) {
  102. case IWL_ANTENNA_DIVERSITY:
  103. return 0;
  104. case IWL_ANTENNA_MAIN:
  105. if (eeprom->antenna_switch_type)
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  108. case IWL_ANTENNA_AUX:
  109. if (eeprom->antenna_switch_type)
  110. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  111. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  112. }
  113. /* bad antenna selector value */
  114. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  115. iwl3945_mod_params.antenna);
  116. return 0; /* "diversity" is default if error */
  117. }
  118. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  119. struct ieee80211_key_conf *keyconf,
  120. u8 sta_id)
  121. {
  122. unsigned long flags;
  123. __le16 key_flags = 0;
  124. int ret;
  125. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  126. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  127. if (sta_id == priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id)
  128. key_flags |= STA_KEY_MULTICAST_MSK;
  129. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  130. keyconf->hw_key_idx = keyconf->keyidx;
  131. key_flags &= ~STA_KEY_FLG_INVALID;
  132. spin_lock_irqsave(&priv->sta_lock, flags);
  133. priv->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  134. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  135. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  136. keyconf->keylen);
  137. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  138. keyconf->keylen);
  139. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  140. == STA_KEY_FLG_NO_ENC)
  141. priv->stations[sta_id].sta.key.key_offset =
  142. iwl_legacy_get_free_ucode_key_index(priv);
  143. /* else, we are overriding an existing key => no need to allocated room
  144. * in uCode. */
  145. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  146. "no space for a new key");
  147. priv->stations[sta_id].sta.key.key_flags = key_flags;
  148. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  149. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  150. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  151. ret = iwl_legacy_send_add_sta(priv,
  152. &priv->stations[sta_id].sta, CMD_ASYNC);
  153. spin_unlock_irqrestore(&priv->sta_lock, flags);
  154. return ret;
  155. }
  156. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  157. struct ieee80211_key_conf *keyconf,
  158. u8 sta_id)
  159. {
  160. return -EOPNOTSUPP;
  161. }
  162. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  163. struct ieee80211_key_conf *keyconf,
  164. u8 sta_id)
  165. {
  166. return -EOPNOTSUPP;
  167. }
  168. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  169. {
  170. unsigned long flags;
  171. struct iwl_legacy_addsta_cmd sta_cmd;
  172. spin_lock_irqsave(&priv->sta_lock, flags);
  173. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  174. memset(&priv->stations[sta_id].sta.key, 0,
  175. sizeof(struct iwl4965_keyinfo));
  176. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  177. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  178. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  179. memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_legacy_addsta_cmd));
  180. spin_unlock_irqrestore(&priv->sta_lock, flags);
  181. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  182. return iwl_legacy_send_add_sta(priv, &sta_cmd, CMD_SYNC);
  183. }
  184. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  185. struct ieee80211_key_conf *keyconf, u8 sta_id)
  186. {
  187. int ret = 0;
  188. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  189. switch (keyconf->cipher) {
  190. case WLAN_CIPHER_SUITE_CCMP:
  191. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  192. break;
  193. case WLAN_CIPHER_SUITE_TKIP:
  194. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  195. break;
  196. case WLAN_CIPHER_SUITE_WEP40:
  197. case WLAN_CIPHER_SUITE_WEP104:
  198. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  199. break;
  200. default:
  201. IWL_ERR(priv, "Unknown alg: %s alg=%x\n", __func__,
  202. keyconf->cipher);
  203. ret = -EINVAL;
  204. }
  205. IWL_DEBUG_WEP(priv, "Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  206. keyconf->cipher, keyconf->keylen, keyconf->keyidx,
  207. sta_id, ret);
  208. return ret;
  209. }
  210. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  211. {
  212. int ret = -EOPNOTSUPP;
  213. return ret;
  214. }
  215. static int iwl3945_set_static_key(struct iwl_priv *priv,
  216. struct ieee80211_key_conf *key)
  217. {
  218. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  219. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  220. return -EOPNOTSUPP;
  221. IWL_ERR(priv, "Static key invalid: cipher %x\n", key->cipher);
  222. return -EINVAL;
  223. }
  224. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  225. {
  226. struct list_head *element;
  227. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  228. priv->frames_count);
  229. while (!list_empty(&priv->free_frames)) {
  230. element = priv->free_frames.next;
  231. list_del(element);
  232. kfree(list_entry(element, struct iwl3945_frame, list));
  233. priv->frames_count--;
  234. }
  235. if (priv->frames_count) {
  236. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  237. priv->frames_count);
  238. priv->frames_count = 0;
  239. }
  240. }
  241. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  242. {
  243. struct iwl3945_frame *frame;
  244. struct list_head *element;
  245. if (list_empty(&priv->free_frames)) {
  246. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  247. if (!frame) {
  248. IWL_ERR(priv, "Could not allocate frame!\n");
  249. return NULL;
  250. }
  251. priv->frames_count++;
  252. return frame;
  253. }
  254. element = priv->free_frames.next;
  255. list_del(element);
  256. return list_entry(element, struct iwl3945_frame, list);
  257. }
  258. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  259. {
  260. memset(frame, 0, sizeof(*frame));
  261. list_add(&frame->list, &priv->free_frames);
  262. }
  263. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  264. struct ieee80211_hdr *hdr,
  265. int left)
  266. {
  267. if (!iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS) || !priv->beacon_skb)
  268. return 0;
  269. if (priv->beacon_skb->len > left)
  270. return 0;
  271. memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
  272. return priv->beacon_skb->len;
  273. }
  274. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  275. {
  276. struct iwl3945_frame *frame;
  277. unsigned int frame_size;
  278. int rc;
  279. u8 rate;
  280. frame = iwl3945_get_free_frame(priv);
  281. if (!frame) {
  282. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  283. "command.\n");
  284. return -ENOMEM;
  285. }
  286. rate = iwl_legacy_get_lowest_plcp(priv,
  287. &priv->contexts[IWL_RXON_CTX_BSS]);
  288. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  289. rc = iwl_legacy_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  290. &frame->u.cmd[0]);
  291. iwl3945_free_frame(priv, frame);
  292. return rc;
  293. }
  294. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  295. {
  296. if (priv->_3945.shared_virt)
  297. dma_free_coherent(&priv->pci_dev->dev,
  298. sizeof(struct iwl3945_shared),
  299. priv->_3945.shared_virt,
  300. priv->_3945.shared_phys);
  301. }
  302. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  303. struct ieee80211_tx_info *info,
  304. struct iwl_device_cmd *cmd,
  305. struct sk_buff *skb_frag,
  306. int sta_id)
  307. {
  308. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  309. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  310. tx_cmd->sec_ctl = 0;
  311. switch (keyinfo->cipher) {
  312. case WLAN_CIPHER_SUITE_CCMP:
  313. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  314. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  315. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  316. break;
  317. case WLAN_CIPHER_SUITE_TKIP:
  318. break;
  319. case WLAN_CIPHER_SUITE_WEP104:
  320. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  321. /* fall through */
  322. case WLAN_CIPHER_SUITE_WEP40:
  323. tx_cmd->sec_ctl |= TX_CMD_SEC_WEP |
  324. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  325. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  326. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  327. "with key %d\n", info->control.hw_key->hw_key_idx);
  328. break;
  329. default:
  330. IWL_ERR(priv, "Unknown encode cipher %x\n", keyinfo->cipher);
  331. break;
  332. }
  333. }
  334. /*
  335. * handle build REPLY_TX command notification.
  336. */
  337. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  338. struct iwl_device_cmd *cmd,
  339. struct ieee80211_tx_info *info,
  340. struct ieee80211_hdr *hdr, u8 std_id)
  341. {
  342. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  343. __le32 tx_flags = tx_cmd->tx_flags;
  344. __le16 fc = hdr->frame_control;
  345. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  346. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  347. tx_flags |= TX_CMD_FLG_ACK_MSK;
  348. if (ieee80211_is_mgmt(fc))
  349. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  350. if (ieee80211_is_probe_resp(fc) &&
  351. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  352. tx_flags |= TX_CMD_FLG_TSF_MSK;
  353. } else {
  354. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  355. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  356. }
  357. tx_cmd->sta_id = std_id;
  358. if (ieee80211_has_morefrags(fc))
  359. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  360. if (ieee80211_is_data_qos(fc)) {
  361. u8 *qc = ieee80211_get_qos_ctl(hdr);
  362. tx_cmd->tid_tspec = qc[0] & 0xf;
  363. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  364. } else {
  365. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  366. }
  367. iwl_legacy_tx_cmd_protection(priv, info, fc, &tx_flags);
  368. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  369. if (ieee80211_is_mgmt(fc)) {
  370. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  371. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  372. else
  373. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  374. } else {
  375. tx_cmd->timeout.pm_frame_timeout = 0;
  376. }
  377. tx_cmd->driver_txop = 0;
  378. tx_cmd->tx_flags = tx_flags;
  379. tx_cmd->next_frame_len = 0;
  380. }
  381. /*
  382. * start REPLY_TX command process
  383. */
  384. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  385. {
  386. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  387. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  388. struct iwl3945_tx_cmd *tx_cmd;
  389. struct iwl_tx_queue *txq = NULL;
  390. struct iwl_queue *q = NULL;
  391. struct iwl_device_cmd *out_cmd;
  392. struct iwl_cmd_meta *out_meta;
  393. dma_addr_t phys_addr;
  394. dma_addr_t txcmd_phys;
  395. int txq_id = skb_get_queue_mapping(skb);
  396. u16 len, idx, hdr_len;
  397. u8 id;
  398. u8 unicast;
  399. u8 sta_id;
  400. u8 tid = 0;
  401. __le16 fc;
  402. u8 wait_write_ptr = 0;
  403. unsigned long flags;
  404. spin_lock_irqsave(&priv->lock, flags);
  405. if (iwl_legacy_is_rfkill(priv)) {
  406. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  407. goto drop_unlock;
  408. }
  409. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  410. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  411. goto drop_unlock;
  412. }
  413. unicast = !is_multicast_ether_addr(hdr->addr1);
  414. id = 0;
  415. fc = hdr->frame_control;
  416. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  417. if (ieee80211_is_auth(fc))
  418. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  419. else if (ieee80211_is_assoc_req(fc))
  420. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  421. else if (ieee80211_is_reassoc_req(fc))
  422. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  423. #endif
  424. spin_unlock_irqrestore(&priv->lock, flags);
  425. hdr_len = ieee80211_hdrlen(fc);
  426. /* Find index into station table for destination station */
  427. sta_id = iwl_legacy_sta_id_or_broadcast(
  428. priv, &priv->contexts[IWL_RXON_CTX_BSS],
  429. info->control.sta);
  430. if (sta_id == IWL_INVALID_STATION) {
  431. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  432. hdr->addr1);
  433. goto drop;
  434. }
  435. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  436. if (ieee80211_is_data_qos(fc)) {
  437. u8 *qc = ieee80211_get_qos_ctl(hdr);
  438. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  439. if (unlikely(tid >= MAX_TID_COUNT))
  440. goto drop;
  441. }
  442. /* Descriptor for chosen Tx queue */
  443. txq = &priv->txq[txq_id];
  444. q = &txq->q;
  445. if ((iwl_legacy_queue_space(q) < q->high_mark))
  446. goto drop;
  447. spin_lock_irqsave(&priv->lock, flags);
  448. idx = iwl_legacy_get_cmd_index(q, q->write_ptr, 0);
  449. /* Set up driver data for this TFD */
  450. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  451. txq->txb[q->write_ptr].skb = skb;
  452. txq->txb[q->write_ptr].ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  453. /* Init first empty entry in queue's array of Tx/cmd buffers */
  454. out_cmd = txq->cmd[idx];
  455. out_meta = &txq->meta[idx];
  456. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  457. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  458. memset(tx_cmd, 0, sizeof(*tx_cmd));
  459. /*
  460. * Set up the Tx-command (not MAC!) header.
  461. * Store the chosen Tx queue and TFD index within the sequence field;
  462. * after Tx, uCode's Tx response will return this value so driver can
  463. * locate the frame within the tx queue and do post-tx processing.
  464. */
  465. out_cmd->hdr.cmd = REPLY_TX;
  466. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  467. INDEX_TO_SEQ(q->write_ptr)));
  468. /* Copy MAC header from skb into command buffer */
  469. memcpy(tx_cmd->hdr, hdr, hdr_len);
  470. if (info->control.hw_key)
  471. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  472. /* TODO need this for burst mode later on */
  473. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  474. /* set is_hcca to 0; it probably will never be implemented */
  475. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  476. /* Total # bytes to be transmitted */
  477. len = (u16)skb->len;
  478. tx_cmd->len = cpu_to_le16(len);
  479. iwl_legacy_dbg_log_tx_data_frame(priv, len, hdr);
  480. iwl_legacy_update_stats(priv, true, fc, len);
  481. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  482. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  483. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  484. txq->need_update = 1;
  485. } else {
  486. wait_write_ptr = 1;
  487. txq->need_update = 0;
  488. }
  489. IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
  490. le16_to_cpu(out_cmd->hdr.sequence));
  491. IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  492. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  493. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  494. ieee80211_hdrlen(fc));
  495. /*
  496. * Use the first empty entry in this queue's command buffer array
  497. * to contain the Tx command and MAC header concatenated together
  498. * (payload data will be in another buffer).
  499. * Size of this varies, due to varying MAC header length.
  500. * If end is not dword aligned, we'll have 2 extra bytes at the end
  501. * of the MAC header (device reads on dword boundaries).
  502. * We'll tell device about this padding later.
  503. */
  504. len = sizeof(struct iwl3945_tx_cmd) +
  505. sizeof(struct iwl_cmd_header) + hdr_len;
  506. len = (len + 3) & ~3;
  507. /* Physical address of this Tx command's header (not MAC header!),
  508. * within command buffer array. */
  509. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  510. len, PCI_DMA_TODEVICE);
  511. /* we do not map meta data ... so we can safely access address to
  512. * provide to unmap command*/
  513. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  514. dma_unmap_len_set(out_meta, len, len);
  515. /* Add buffer containing Tx command and MAC(!) header to TFD's
  516. * first entry */
  517. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  518. txcmd_phys, len, 1, 0);
  519. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  520. * if any (802.11 null frames have no payload). */
  521. len = skb->len - hdr_len;
  522. if (len) {
  523. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  524. len, PCI_DMA_TODEVICE);
  525. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  526. phys_addr, len,
  527. 0, U32_PAD(len));
  528. }
  529. /* Tell device the write index *just past* this latest filled TFD */
  530. q->write_ptr = iwl_legacy_queue_inc_wrap(q->write_ptr, q->n_bd);
  531. iwl_legacy_txq_update_write_ptr(priv, txq);
  532. spin_unlock_irqrestore(&priv->lock, flags);
  533. if ((iwl_legacy_queue_space(q) < q->high_mark)
  534. && priv->mac80211_registered) {
  535. if (wait_write_ptr) {
  536. spin_lock_irqsave(&priv->lock, flags);
  537. txq->need_update = 1;
  538. iwl_legacy_txq_update_write_ptr(priv, txq);
  539. spin_unlock_irqrestore(&priv->lock, flags);
  540. }
  541. iwl_legacy_stop_queue(priv, txq);
  542. }
  543. return 0;
  544. drop_unlock:
  545. spin_unlock_irqrestore(&priv->lock, flags);
  546. drop:
  547. return -1;
  548. }
  549. static int iwl3945_get_measurement(struct iwl_priv *priv,
  550. struct ieee80211_measurement_params *params,
  551. u8 type)
  552. {
  553. struct iwl_spectrum_cmd spectrum;
  554. struct iwl_rx_packet *pkt;
  555. struct iwl_host_cmd cmd = {
  556. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  557. .data = (void *)&spectrum,
  558. .flags = CMD_WANT_SKB,
  559. };
  560. u32 add_time = le64_to_cpu(params->start_time);
  561. int rc;
  562. int spectrum_resp_status;
  563. int duration = le16_to_cpu(params->duration);
  564. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  565. if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS))
  566. add_time = iwl_legacy_usecs_to_beacons(priv,
  567. le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
  568. le16_to_cpu(ctx->timing.beacon_interval));
  569. memset(&spectrum, 0, sizeof(spectrum));
  570. spectrum.channel_count = cpu_to_le16(1);
  571. spectrum.flags =
  572. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  573. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  574. cmd.len = sizeof(spectrum);
  575. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  576. if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS))
  577. spectrum.start_time =
  578. iwl_legacy_add_beacon_time(priv,
  579. priv->_3945.last_beacon_time, add_time,
  580. le16_to_cpu(ctx->timing.beacon_interval));
  581. else
  582. spectrum.start_time = 0;
  583. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  584. spectrum.channels[0].channel = params->channel;
  585. spectrum.channels[0].type = type;
  586. if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
  587. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  588. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  589. rc = iwl_legacy_send_cmd_sync(priv, &cmd);
  590. if (rc)
  591. return rc;
  592. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  593. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  594. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  595. rc = -EIO;
  596. }
  597. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  598. switch (spectrum_resp_status) {
  599. case 0: /* Command will be handled */
  600. if (pkt->u.spectrum.id != 0xff) {
  601. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  602. pkt->u.spectrum.id);
  603. priv->measurement_status &= ~MEASUREMENT_READY;
  604. }
  605. priv->measurement_status |= MEASUREMENT_ACTIVE;
  606. rc = 0;
  607. break;
  608. case 1: /* Command will not be handled */
  609. rc = -EAGAIN;
  610. break;
  611. }
  612. iwl_legacy_free_pages(priv, cmd.reply_page);
  613. return rc;
  614. }
  615. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  616. struct iwl_rx_mem_buffer *rxb)
  617. {
  618. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  619. struct iwl_alive_resp *palive;
  620. struct delayed_work *pwork;
  621. palive = &pkt->u.alive_frame;
  622. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  623. "0x%01X 0x%01X\n",
  624. palive->is_valid, palive->ver_type,
  625. palive->ver_subtype);
  626. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  627. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  628. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  629. sizeof(struct iwl_alive_resp));
  630. pwork = &priv->init_alive_start;
  631. } else {
  632. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  633. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  634. sizeof(struct iwl_alive_resp));
  635. pwork = &priv->alive_start;
  636. iwl3945_disable_events(priv);
  637. }
  638. /* We delay the ALIVE response by 5ms to
  639. * give the HW RF Kill time to activate... */
  640. if (palive->is_valid == UCODE_VALID_OK)
  641. queue_delayed_work(priv->workqueue, pwork,
  642. msecs_to_jiffies(5));
  643. else
  644. IWL_WARN(priv, "uCode did not respond OK.\n");
  645. }
  646. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  647. struct iwl_rx_mem_buffer *rxb)
  648. {
  649. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  650. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  651. #endif
  652. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  653. }
  654. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  655. struct iwl_rx_mem_buffer *rxb)
  656. {
  657. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  658. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  659. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  660. u8 rate = beacon->beacon_notify_hdr.rate;
  661. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  662. "tsf %d %d rate %d\n",
  663. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  664. beacon->beacon_notify_hdr.failure_frame,
  665. le32_to_cpu(beacon->ibss_mgr_status),
  666. le32_to_cpu(beacon->high_tsf),
  667. le32_to_cpu(beacon->low_tsf), rate);
  668. #endif
  669. priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  670. }
  671. /* Handle notification from uCode that card's power state is changing
  672. * due to software, hardware, or critical temperature RFKILL */
  673. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  674. struct iwl_rx_mem_buffer *rxb)
  675. {
  676. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  677. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  678. unsigned long status = priv->status;
  679. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  680. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  681. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  682. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  683. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  684. if (flags & HW_CARD_DISABLED)
  685. set_bit(STATUS_RF_KILL_HW, &priv->status);
  686. else
  687. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  688. iwl_legacy_scan_cancel(priv);
  689. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  690. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  691. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  692. test_bit(STATUS_RF_KILL_HW, &priv->status));
  693. else
  694. wake_up(&priv->wait_command_queue);
  695. }
  696. /**
  697. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  698. *
  699. * Setup the RX handlers for each of the reply types sent from the uCode
  700. * to the host.
  701. *
  702. * This function chains into the hardware specific files for them to setup
  703. * any hardware specific handlers as well.
  704. */
  705. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  706. {
  707. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  708. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  709. priv->rx_handlers[REPLY_ERROR] = iwl_legacy_rx_reply_error;
  710. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_legacy_rx_csa;
  711. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  712. iwl_legacy_rx_spectrum_measure_notif;
  713. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_legacy_rx_pm_sleep_notif;
  714. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  715. iwl_legacy_rx_pm_debug_statistics_notif;
  716. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  717. /*
  718. * The same handler is used for both the REPLY to a discrete
  719. * statistics request from the host as well as for the periodic
  720. * statistics notifications (after received beacons) from the uCode.
  721. */
  722. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
  723. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  724. iwl_legacy_setup_rx_scan_handlers(priv);
  725. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  726. /* Set up hardware specific Rx handlers */
  727. iwl3945_hw_rx_handler_setup(priv);
  728. }
  729. /************************** RX-FUNCTIONS ****************************/
  730. /*
  731. * Rx theory of operation
  732. *
  733. * The host allocates 32 DMA target addresses and passes the host address
  734. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  735. * 0 to 31
  736. *
  737. * Rx Queue Indexes
  738. * The host/firmware share two index registers for managing the Rx buffers.
  739. *
  740. * The READ index maps to the first position that the firmware may be writing
  741. * to -- the driver can read up to (but not including) this position and get
  742. * good data.
  743. * The READ index is managed by the firmware once the card is enabled.
  744. *
  745. * The WRITE index maps to the last position the driver has read from -- the
  746. * position preceding WRITE is the last slot the firmware can place a packet.
  747. *
  748. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  749. * WRITE = READ.
  750. *
  751. * During initialization, the host sets up the READ queue position to the first
  752. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  753. *
  754. * When the firmware places a packet in a buffer, it will advance the READ index
  755. * and fire the RX interrupt. The driver can then query the READ index and
  756. * process as many packets as possible, moving the WRITE index forward as it
  757. * resets the Rx queue buffers with new memory.
  758. *
  759. * The management in the driver is as follows:
  760. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  761. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  762. * to replenish the iwl->rxq->rx_free.
  763. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  764. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  765. * 'processed' and 'read' driver indexes as well)
  766. * + A received packet is processed and handed to the kernel network stack,
  767. * detached from the iwl->rxq. The driver 'processed' index is updated.
  768. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  769. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  770. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  771. * were enough free buffers and RX_STALLED is set it is cleared.
  772. *
  773. *
  774. * Driver sequence:
  775. *
  776. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  777. * iwl3945_rx_queue_restock
  778. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  779. * queue, updates firmware pointers, and updates
  780. * the WRITE index. If insufficient rx_free buffers
  781. * are available, schedules iwl3945_rx_replenish
  782. *
  783. * -- enable interrupts --
  784. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  785. * READ INDEX, detaching the SKB from the pool.
  786. * Moves the packet buffer from queue to rx_used.
  787. * Calls iwl3945_rx_queue_restock to refill any empty
  788. * slots.
  789. * ...
  790. *
  791. */
  792. /**
  793. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  794. */
  795. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  796. dma_addr_t dma_addr)
  797. {
  798. return cpu_to_le32((u32)dma_addr);
  799. }
  800. /**
  801. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  802. *
  803. * If there are slots in the RX queue that need to be restocked,
  804. * and we have free pre-allocated buffers, fill the ranks as much
  805. * as we can, pulling from rx_free.
  806. *
  807. * This moves the 'write' index forward to catch up with 'processed', and
  808. * also updates the memory address in the firmware to reference the new
  809. * target buffer.
  810. */
  811. static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
  812. {
  813. struct iwl_rx_queue *rxq = &priv->rxq;
  814. struct list_head *element;
  815. struct iwl_rx_mem_buffer *rxb;
  816. unsigned long flags;
  817. int write;
  818. spin_lock_irqsave(&rxq->lock, flags);
  819. write = rxq->write & ~0x7;
  820. while ((iwl_legacy_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  821. /* Get next free Rx buffer, remove from free list */
  822. element = rxq->rx_free.next;
  823. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  824. list_del(element);
  825. /* Point to Rx buffer via next RBD in circular buffer */
  826. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  827. rxq->queue[rxq->write] = rxb;
  828. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  829. rxq->free_count--;
  830. }
  831. spin_unlock_irqrestore(&rxq->lock, flags);
  832. /* If the pre-allocated buffer pool is dropping low, schedule to
  833. * refill it */
  834. if (rxq->free_count <= RX_LOW_WATERMARK)
  835. queue_work(priv->workqueue, &priv->rx_replenish);
  836. /* If we've added more space for the firmware to place data, tell it.
  837. * Increment device's write pointer in multiples of 8. */
  838. if ((rxq->write_actual != (rxq->write & ~0x7))
  839. || (abs(rxq->write - rxq->read) > 7)) {
  840. spin_lock_irqsave(&rxq->lock, flags);
  841. rxq->need_update = 1;
  842. spin_unlock_irqrestore(&rxq->lock, flags);
  843. iwl_legacy_rx_queue_update_write_ptr(priv, rxq);
  844. }
  845. }
  846. /**
  847. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  848. *
  849. * When moving to rx_free an SKB is allocated for the slot.
  850. *
  851. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  852. * This is called as a scheduled work item (except for during initialization)
  853. */
  854. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  855. {
  856. struct iwl_rx_queue *rxq = &priv->rxq;
  857. struct list_head *element;
  858. struct iwl_rx_mem_buffer *rxb;
  859. struct page *page;
  860. unsigned long flags;
  861. gfp_t gfp_mask = priority;
  862. while (1) {
  863. spin_lock_irqsave(&rxq->lock, flags);
  864. if (list_empty(&rxq->rx_used)) {
  865. spin_unlock_irqrestore(&rxq->lock, flags);
  866. return;
  867. }
  868. spin_unlock_irqrestore(&rxq->lock, flags);
  869. if (rxq->free_count > RX_LOW_WATERMARK)
  870. gfp_mask |= __GFP_NOWARN;
  871. if (priv->hw_params.rx_page_order > 0)
  872. gfp_mask |= __GFP_COMP;
  873. /* Alloc a new receive buffer */
  874. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  875. if (!page) {
  876. if (net_ratelimit())
  877. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  878. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  879. net_ratelimit())
  880. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  881. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  882. rxq->free_count);
  883. /* We don't reschedule replenish work here -- we will
  884. * call the restock method and if it still needs
  885. * more buffers it will schedule replenish */
  886. break;
  887. }
  888. spin_lock_irqsave(&rxq->lock, flags);
  889. if (list_empty(&rxq->rx_used)) {
  890. spin_unlock_irqrestore(&rxq->lock, flags);
  891. __free_pages(page, priv->hw_params.rx_page_order);
  892. return;
  893. }
  894. element = rxq->rx_used.next;
  895. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  896. list_del(element);
  897. spin_unlock_irqrestore(&rxq->lock, flags);
  898. rxb->page = page;
  899. /* Get physical address of RB/SKB */
  900. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  901. PAGE_SIZE << priv->hw_params.rx_page_order,
  902. PCI_DMA_FROMDEVICE);
  903. spin_lock_irqsave(&rxq->lock, flags);
  904. list_add_tail(&rxb->list, &rxq->rx_free);
  905. rxq->free_count++;
  906. priv->alloc_rxb_page++;
  907. spin_unlock_irqrestore(&rxq->lock, flags);
  908. }
  909. }
  910. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  911. {
  912. unsigned long flags;
  913. int i;
  914. spin_lock_irqsave(&rxq->lock, flags);
  915. INIT_LIST_HEAD(&rxq->rx_free);
  916. INIT_LIST_HEAD(&rxq->rx_used);
  917. /* Fill the rx_used queue with _all_ of the Rx buffers */
  918. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  919. /* In the reset function, these buffers may have been allocated
  920. * to an SKB, so we need to unmap and free potential storage */
  921. if (rxq->pool[i].page != NULL) {
  922. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  923. PAGE_SIZE << priv->hw_params.rx_page_order,
  924. PCI_DMA_FROMDEVICE);
  925. __iwl_legacy_free_pages(priv, rxq->pool[i].page);
  926. rxq->pool[i].page = NULL;
  927. }
  928. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  929. }
  930. /* Set us so that we have processed and used all buffers, but have
  931. * not restocked the Rx queue with fresh buffers */
  932. rxq->read = rxq->write = 0;
  933. rxq->write_actual = 0;
  934. rxq->free_count = 0;
  935. spin_unlock_irqrestore(&rxq->lock, flags);
  936. }
  937. void iwl3945_rx_replenish(void *data)
  938. {
  939. struct iwl_priv *priv = data;
  940. unsigned long flags;
  941. iwl3945_rx_allocate(priv, GFP_KERNEL);
  942. spin_lock_irqsave(&priv->lock, flags);
  943. iwl3945_rx_queue_restock(priv);
  944. spin_unlock_irqrestore(&priv->lock, flags);
  945. }
  946. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  947. {
  948. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  949. iwl3945_rx_queue_restock(priv);
  950. }
  951. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  952. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  953. * This free routine walks the list of POOL entries and if SKB is set to
  954. * non NULL it is unmapped and freed
  955. */
  956. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  957. {
  958. int i;
  959. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  960. if (rxq->pool[i].page != NULL) {
  961. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  962. PAGE_SIZE << priv->hw_params.rx_page_order,
  963. PCI_DMA_FROMDEVICE);
  964. __iwl_legacy_free_pages(priv, rxq->pool[i].page);
  965. rxq->pool[i].page = NULL;
  966. }
  967. }
  968. dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  969. rxq->bd_dma);
  970. dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
  971. rxq->rb_stts, rxq->rb_stts_dma);
  972. rxq->bd = NULL;
  973. rxq->rb_stts = NULL;
  974. }
  975. /* Convert linear signal-to-noise ratio into dB */
  976. static u8 ratio2dB[100] = {
  977. /* 0 1 2 3 4 5 6 7 8 9 */
  978. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  979. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  980. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  981. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  982. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  983. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  984. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  985. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  986. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  987. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  988. };
  989. /* Calculates a relative dB value from a ratio of linear
  990. * (i.e. not dB) signal levels.
  991. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  992. int iwl3945_calc_db_from_ratio(int sig_ratio)
  993. {
  994. /* 1000:1 or higher just report as 60 dB */
  995. if (sig_ratio >= 1000)
  996. return 60;
  997. /* 100:1 or higher, divide by 10 and use table,
  998. * add 20 dB to make up for divide by 10 */
  999. if (sig_ratio >= 100)
  1000. return 20 + (int)ratio2dB[sig_ratio/10];
  1001. /* We shouldn't see this */
  1002. if (sig_ratio < 1)
  1003. return 0;
  1004. /* Use table for ratios 1:1 - 99:1 */
  1005. return (int)ratio2dB[sig_ratio];
  1006. }
  1007. /**
  1008. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1009. *
  1010. * Uses the priv->rx_handlers callback function array to invoke
  1011. * the appropriate handlers, including command responses,
  1012. * frame-received notifications, and other notifications.
  1013. */
  1014. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1015. {
  1016. struct iwl_rx_mem_buffer *rxb;
  1017. struct iwl_rx_packet *pkt;
  1018. struct iwl_rx_queue *rxq = &priv->rxq;
  1019. u32 r, i;
  1020. int reclaim;
  1021. unsigned long flags;
  1022. u8 fill_rx = 0;
  1023. u32 count = 8;
  1024. int total_empty = 0;
  1025. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1026. * buffer that the driver may process (last buffer filled by ucode). */
  1027. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1028. i = rxq->read;
  1029. /* calculate total frames need to be restock after handling RX */
  1030. total_empty = r - rxq->write_actual;
  1031. if (total_empty < 0)
  1032. total_empty += RX_QUEUE_SIZE;
  1033. if (total_empty > (RX_QUEUE_SIZE / 2))
  1034. fill_rx = 1;
  1035. /* Rx interrupt, but nothing sent from uCode */
  1036. if (i == r)
  1037. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1038. while (i != r) {
  1039. int len;
  1040. rxb = rxq->queue[i];
  1041. /* If an RXB doesn't have a Rx queue slot associated with it,
  1042. * then a bug has been introduced in the queue refilling
  1043. * routines -- catch it here */
  1044. BUG_ON(rxb == NULL);
  1045. rxq->queue[i] = NULL;
  1046. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1047. PAGE_SIZE << priv->hw_params.rx_page_order,
  1048. PCI_DMA_FROMDEVICE);
  1049. pkt = rxb_addr(rxb);
  1050. len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1051. len += sizeof(u32); /* account for status word */
  1052. trace_iwlwifi_legacy_dev_rx(priv, pkt, len);
  1053. /* Reclaim a command buffer only if this packet is a response
  1054. * to a (driver-originated) command.
  1055. * If the packet (e.g. Rx frame) originated from uCode,
  1056. * there is no command buffer to reclaim.
  1057. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1058. * but apparently a few don't get set; catch them here. */
  1059. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1060. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1061. (pkt->hdr.cmd != REPLY_TX);
  1062. /* Based on type of command response or notification,
  1063. * handle those that need handling via function in
  1064. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1065. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1066. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1067. iwl_legacy_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1068. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1069. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1070. } else {
  1071. /* No handling needed */
  1072. IWL_DEBUG_RX(priv,
  1073. "r %d i %d No handler needed for %s, 0x%02x\n",
  1074. r, i, iwl_legacy_get_cmd_string(pkt->hdr.cmd),
  1075. pkt->hdr.cmd);
  1076. }
  1077. /*
  1078. * XXX: After here, we should always check rxb->page
  1079. * against NULL before touching it or its virtual
  1080. * memory (pkt). Because some rx_handler might have
  1081. * already taken or freed the pages.
  1082. */
  1083. if (reclaim) {
  1084. /* Invoke any callbacks, transfer the buffer to caller,
  1085. * and fire off the (possibly) blocking iwl_legacy_send_cmd()
  1086. * as we reclaim the driver command queue */
  1087. if (rxb->page)
  1088. iwl_legacy_tx_cmd_complete(priv, rxb);
  1089. else
  1090. IWL_WARN(priv, "Claim null rxb?\n");
  1091. }
  1092. /* Reuse the page if possible. For notification packets and
  1093. * SKBs that fail to Rx correctly, add them back into the
  1094. * rx_free list for reuse later. */
  1095. spin_lock_irqsave(&rxq->lock, flags);
  1096. if (rxb->page != NULL) {
  1097. rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
  1098. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  1099. PCI_DMA_FROMDEVICE);
  1100. list_add_tail(&rxb->list, &rxq->rx_free);
  1101. rxq->free_count++;
  1102. } else
  1103. list_add_tail(&rxb->list, &rxq->rx_used);
  1104. spin_unlock_irqrestore(&rxq->lock, flags);
  1105. i = (i + 1) & RX_QUEUE_MASK;
  1106. /* If there are a lot of unused frames,
  1107. * restock the Rx queue so ucode won't assert. */
  1108. if (fill_rx) {
  1109. count++;
  1110. if (count >= 8) {
  1111. rxq->read = i;
  1112. iwl3945_rx_replenish_now(priv);
  1113. count = 0;
  1114. }
  1115. }
  1116. }
  1117. /* Backtrack one entry */
  1118. rxq->read = i;
  1119. if (fill_rx)
  1120. iwl3945_rx_replenish_now(priv);
  1121. else
  1122. iwl3945_rx_queue_restock(priv);
  1123. }
  1124. /* call this function to flush any scheduled tasklet */
  1125. static inline void iwl3945_synchronize_irq(struct iwl_priv *priv)
  1126. {
  1127. /* wait to make sure we flush pending tasklet*/
  1128. synchronize_irq(priv->pci_dev->irq);
  1129. tasklet_kill(&priv->irq_tasklet);
  1130. }
  1131. static const char *iwl3945_desc_lookup(int i)
  1132. {
  1133. switch (i) {
  1134. case 1:
  1135. return "FAIL";
  1136. case 2:
  1137. return "BAD_PARAM";
  1138. case 3:
  1139. return "BAD_CHECKSUM";
  1140. case 4:
  1141. return "NMI_INTERRUPT";
  1142. case 5:
  1143. return "SYSASSERT";
  1144. case 6:
  1145. return "FATAL_ERROR";
  1146. }
  1147. return "UNKNOWN";
  1148. }
  1149. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1150. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1151. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1152. {
  1153. u32 i;
  1154. u32 desc, time, count, base, data1;
  1155. u32 blink1, blink2, ilink1, ilink2;
  1156. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1157. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1158. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1159. return;
  1160. }
  1161. count = iwl_legacy_read_targ_mem(priv, base);
  1162. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1163. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1164. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1165. priv->status, count);
  1166. }
  1167. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1168. "ilink1 nmiPC Line\n");
  1169. for (i = ERROR_START_OFFSET;
  1170. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1171. i += ERROR_ELEM_SIZE) {
  1172. desc = iwl_legacy_read_targ_mem(priv, base + i);
  1173. time =
  1174. iwl_legacy_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1175. blink1 =
  1176. iwl_legacy_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1177. blink2 =
  1178. iwl_legacy_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1179. ilink1 =
  1180. iwl_legacy_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1181. ilink2 =
  1182. iwl_legacy_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1183. data1 =
  1184. iwl_legacy_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1185. IWL_ERR(priv,
  1186. "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1187. iwl3945_desc_lookup(desc), desc, time, blink1, blink2,
  1188. ilink1, ilink2, data1);
  1189. trace_iwlwifi_legacy_dev_ucode_error(priv, desc, time, data1, 0,
  1190. 0, blink1, blink2, ilink1, ilink2);
  1191. }
  1192. }
  1193. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1194. /**
  1195. * iwl3945_print_event_log - Dump error event log to syslog
  1196. *
  1197. */
  1198. static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1199. u32 num_events, u32 mode,
  1200. int pos, char **buf, size_t bufsz)
  1201. {
  1202. u32 i;
  1203. u32 base; /* SRAM byte address of event log header */
  1204. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1205. u32 ptr; /* SRAM byte address of log data */
  1206. u32 ev, time, data; /* event log data */
  1207. unsigned long reg_flags;
  1208. if (num_events == 0)
  1209. return pos;
  1210. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1211. if (mode == 0)
  1212. event_size = 2 * sizeof(u32);
  1213. else
  1214. event_size = 3 * sizeof(u32);
  1215. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1216. /* Make sure device is powered up for SRAM reads */
  1217. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1218. iwl_grab_nic_access(priv);
  1219. /* Set starting address; reads will auto-increment */
  1220. _iwl_legacy_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1221. rmb();
  1222. /* "time" is actually "data" for mode 0 (no timestamp).
  1223. * place event id # at far right for easier visual parsing. */
  1224. for (i = 0; i < num_events; i++) {
  1225. ev = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1226. time = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1227. if (mode == 0) {
  1228. /* data, ev */
  1229. if (bufsz) {
  1230. pos += scnprintf(*buf + pos, bufsz - pos,
  1231. "0x%08x:%04u\n",
  1232. time, ev);
  1233. } else {
  1234. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1235. trace_iwlwifi_legacy_dev_ucode_event(priv, 0,
  1236. time, ev);
  1237. }
  1238. } else {
  1239. data = _iwl_legacy_read_direct32(priv,
  1240. HBUS_TARG_MEM_RDAT);
  1241. if (bufsz) {
  1242. pos += scnprintf(*buf + pos, bufsz - pos,
  1243. "%010u:0x%08x:%04u\n",
  1244. time, data, ev);
  1245. } else {
  1246. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
  1247. time, data, ev);
  1248. trace_iwlwifi_legacy_dev_ucode_event(priv, time,
  1249. data, ev);
  1250. }
  1251. }
  1252. }
  1253. /* Allow device to power down */
  1254. iwl_release_nic_access(priv);
  1255. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1256. return pos;
  1257. }
  1258. /**
  1259. * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
  1260. */
  1261. static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1262. u32 num_wraps, u32 next_entry,
  1263. u32 size, u32 mode,
  1264. int pos, char **buf, size_t bufsz)
  1265. {
  1266. /*
  1267. * display the newest DEFAULT_LOG_ENTRIES entries
  1268. * i.e the entries just before the next ont that uCode would fill.
  1269. */
  1270. if (num_wraps) {
  1271. if (next_entry < size) {
  1272. pos = iwl3945_print_event_log(priv,
  1273. capacity - (size - next_entry),
  1274. size - next_entry, mode,
  1275. pos, buf, bufsz);
  1276. pos = iwl3945_print_event_log(priv, 0,
  1277. next_entry, mode,
  1278. pos, buf, bufsz);
  1279. } else
  1280. pos = iwl3945_print_event_log(priv, next_entry - size,
  1281. size, mode,
  1282. pos, buf, bufsz);
  1283. } else {
  1284. if (next_entry < size)
  1285. pos = iwl3945_print_event_log(priv, 0,
  1286. next_entry, mode,
  1287. pos, buf, bufsz);
  1288. else
  1289. pos = iwl3945_print_event_log(priv, next_entry - size,
  1290. size, mode,
  1291. pos, buf, bufsz);
  1292. }
  1293. return pos;
  1294. }
  1295. #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
  1296. int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
  1297. char **buf, bool display)
  1298. {
  1299. u32 base; /* SRAM byte address of event log header */
  1300. u32 capacity; /* event log capacity in # entries */
  1301. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1302. u32 num_wraps; /* # times uCode wrapped to top of log */
  1303. u32 next_entry; /* index of next entry to be written by uCode */
  1304. u32 size; /* # entries that we'll print */
  1305. int pos = 0;
  1306. size_t bufsz = 0;
  1307. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1308. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1309. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1310. return -EINVAL;
  1311. }
  1312. /* event log header */
  1313. capacity = iwl_legacy_read_targ_mem(priv, base);
  1314. mode = iwl_legacy_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1315. num_wraps = iwl_legacy_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1316. next_entry = iwl_legacy_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1317. if (capacity > priv->cfg->base_params->max_event_log_size) {
  1318. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1319. capacity, priv->cfg->base_params->max_event_log_size);
  1320. capacity = priv->cfg->base_params->max_event_log_size;
  1321. }
  1322. if (next_entry > priv->cfg->base_params->max_event_log_size) {
  1323. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1324. next_entry, priv->cfg->base_params->max_event_log_size);
  1325. next_entry = priv->cfg->base_params->max_event_log_size;
  1326. }
  1327. size = num_wraps ? capacity : next_entry;
  1328. /* bail out if nothing in log */
  1329. if (size == 0) {
  1330. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1331. return pos;
  1332. }
  1333. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  1334. if (!(iwl_legacy_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1335. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1336. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1337. #else
  1338. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1339. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1340. #endif
  1341. IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
  1342. size);
  1343. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  1344. if (display) {
  1345. if (full_log)
  1346. bufsz = capacity * 48;
  1347. else
  1348. bufsz = size * 48;
  1349. *buf = kmalloc(bufsz, GFP_KERNEL);
  1350. if (!*buf)
  1351. return -ENOMEM;
  1352. }
  1353. if ((iwl_legacy_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1354. /* if uCode has wrapped back to top of log,
  1355. * start at the oldest entry,
  1356. * i.e the next one that uCode would fill.
  1357. */
  1358. if (num_wraps)
  1359. pos = iwl3945_print_event_log(priv, next_entry,
  1360. capacity - next_entry, mode,
  1361. pos, buf, bufsz);
  1362. /* (then/else) start at top of log */
  1363. pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
  1364. pos, buf, bufsz);
  1365. } else
  1366. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1367. next_entry, size, mode,
  1368. pos, buf, bufsz);
  1369. #else
  1370. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1371. next_entry, size, mode,
  1372. pos, buf, bufsz);
  1373. #endif
  1374. return pos;
  1375. }
  1376. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1377. {
  1378. u32 inta, handled = 0;
  1379. u32 inta_fh;
  1380. unsigned long flags;
  1381. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  1382. u32 inta_mask;
  1383. #endif
  1384. spin_lock_irqsave(&priv->lock, flags);
  1385. /* Ack/clear/reset pending uCode interrupts.
  1386. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1387. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1388. inta = iwl_read32(priv, CSR_INT);
  1389. iwl_write32(priv, CSR_INT, inta);
  1390. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1391. * Any new interrupts that happen after this, either while we're
  1392. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1393. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1394. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1395. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  1396. if (iwl_legacy_get_debug_level(priv) & IWL_DL_ISR) {
  1397. /* just for debug */
  1398. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1399. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1400. inta, inta_mask, inta_fh);
  1401. }
  1402. #endif
  1403. spin_unlock_irqrestore(&priv->lock, flags);
  1404. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1405. * atomic, make sure that inta covers all the interrupts that
  1406. * we've discovered, even if FH interrupt came in just after
  1407. * reading CSR_INT. */
  1408. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1409. inta |= CSR_INT_BIT_FH_RX;
  1410. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1411. inta |= CSR_INT_BIT_FH_TX;
  1412. /* Now service all interrupt bits discovered above. */
  1413. if (inta & CSR_INT_BIT_HW_ERR) {
  1414. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1415. /* Tell the device to stop sending interrupts */
  1416. iwl_legacy_disable_interrupts(priv);
  1417. priv->isr_stats.hw++;
  1418. iwl_legacy_irq_handle_error(priv);
  1419. handled |= CSR_INT_BIT_HW_ERR;
  1420. return;
  1421. }
  1422. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  1423. if (iwl_legacy_get_debug_level(priv) & (IWL_DL_ISR)) {
  1424. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1425. if (inta & CSR_INT_BIT_SCD) {
  1426. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1427. "the frame/frames.\n");
  1428. priv->isr_stats.sch++;
  1429. }
  1430. /* Alive notification via Rx interrupt will do the real work */
  1431. if (inta & CSR_INT_BIT_ALIVE) {
  1432. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1433. priv->isr_stats.alive++;
  1434. }
  1435. }
  1436. #endif
  1437. /* Safely ignore these bits for debug checks below */
  1438. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1439. /* Error detected by uCode */
  1440. if (inta & CSR_INT_BIT_SW_ERR) {
  1441. IWL_ERR(priv, "Microcode SW error detected. "
  1442. "Restarting 0x%X.\n", inta);
  1443. priv->isr_stats.sw++;
  1444. iwl_legacy_irq_handle_error(priv);
  1445. handled |= CSR_INT_BIT_SW_ERR;
  1446. }
  1447. /* uCode wakes up after power-down sleep */
  1448. if (inta & CSR_INT_BIT_WAKEUP) {
  1449. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1450. iwl_legacy_rx_queue_update_write_ptr(priv, &priv->rxq);
  1451. iwl_legacy_txq_update_write_ptr(priv, &priv->txq[0]);
  1452. iwl_legacy_txq_update_write_ptr(priv, &priv->txq[1]);
  1453. iwl_legacy_txq_update_write_ptr(priv, &priv->txq[2]);
  1454. iwl_legacy_txq_update_write_ptr(priv, &priv->txq[3]);
  1455. iwl_legacy_txq_update_write_ptr(priv, &priv->txq[4]);
  1456. iwl_legacy_txq_update_write_ptr(priv, &priv->txq[5]);
  1457. priv->isr_stats.wakeup++;
  1458. handled |= CSR_INT_BIT_WAKEUP;
  1459. }
  1460. /* All uCode command responses, including Tx command responses,
  1461. * Rx "responses" (frame-received notification), and other
  1462. * notifications from uCode come through here*/
  1463. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1464. iwl3945_rx_handle(priv);
  1465. priv->isr_stats.rx++;
  1466. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1467. }
  1468. if (inta & CSR_INT_BIT_FH_TX) {
  1469. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1470. priv->isr_stats.tx++;
  1471. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1472. iwl_legacy_write_direct32(priv, FH39_TCSR_CREDIT
  1473. (FH39_SRVC_CHNL), 0x0);
  1474. handled |= CSR_INT_BIT_FH_TX;
  1475. }
  1476. if (inta & ~handled) {
  1477. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1478. priv->isr_stats.unhandled++;
  1479. }
  1480. if (inta & ~priv->inta_mask) {
  1481. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1482. inta & ~priv->inta_mask);
  1483. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1484. }
  1485. /* Re-enable all interrupts */
  1486. /* only Re-enable if disabled by irq */
  1487. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1488. iwl_legacy_enable_interrupts(priv);
  1489. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  1490. if (iwl_legacy_get_debug_level(priv) & (IWL_DL_ISR)) {
  1491. inta = iwl_read32(priv, CSR_INT);
  1492. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1493. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1494. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1495. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1496. }
  1497. #endif
  1498. }
  1499. static int iwl3945_get_single_channel_for_scan(struct iwl_priv *priv,
  1500. struct ieee80211_vif *vif,
  1501. enum ieee80211_band band,
  1502. struct iwl3945_scan_channel *scan_ch)
  1503. {
  1504. const struct ieee80211_supported_band *sband;
  1505. u16 passive_dwell = 0;
  1506. u16 active_dwell = 0;
  1507. int added = 0;
  1508. u8 channel = 0;
  1509. sband = iwl_get_hw_mode(priv, band);
  1510. if (!sband) {
  1511. IWL_ERR(priv, "invalid band\n");
  1512. return added;
  1513. }
  1514. active_dwell = iwl_legacy_get_active_dwell_time(priv, band, 0);
  1515. passive_dwell = iwl_legacy_get_passive_dwell_time(priv, band, vif);
  1516. if (passive_dwell <= active_dwell)
  1517. passive_dwell = active_dwell + 1;
  1518. channel = iwl_legacy_get_single_channel_number(priv, band);
  1519. if (channel) {
  1520. scan_ch->channel = channel;
  1521. scan_ch->type = 0; /* passive */
  1522. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1523. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1524. /* Set txpower levels to defaults */
  1525. scan_ch->tpc.dsp_atten = 110;
  1526. if (band == IEEE80211_BAND_5GHZ)
  1527. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1528. else
  1529. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1530. added++;
  1531. } else
  1532. IWL_ERR(priv, "no valid channel found\n");
  1533. return added;
  1534. }
  1535. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1536. enum ieee80211_band band,
  1537. u8 is_active, u8 n_probes,
  1538. struct iwl3945_scan_channel *scan_ch,
  1539. struct ieee80211_vif *vif)
  1540. {
  1541. struct ieee80211_channel *chan;
  1542. const struct ieee80211_supported_band *sband;
  1543. const struct iwl_channel_info *ch_info;
  1544. u16 passive_dwell = 0;
  1545. u16 active_dwell = 0;
  1546. int added, i;
  1547. sband = iwl_get_hw_mode(priv, band);
  1548. if (!sband)
  1549. return 0;
  1550. active_dwell = iwl_legacy_get_active_dwell_time(priv, band, n_probes);
  1551. passive_dwell = iwl_legacy_get_passive_dwell_time(priv, band, vif);
  1552. if (passive_dwell <= active_dwell)
  1553. passive_dwell = active_dwell + 1;
  1554. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1555. chan = priv->scan_request->channels[i];
  1556. if (chan->band != band)
  1557. continue;
  1558. scan_ch->channel = chan->hw_value;
  1559. ch_info = iwl_legacy_get_channel_info(priv, band,
  1560. scan_ch->channel);
  1561. if (!iwl_legacy_is_channel_valid(ch_info)) {
  1562. IWL_DEBUG_SCAN(priv,
  1563. "Channel %d is INVALID for this band.\n",
  1564. scan_ch->channel);
  1565. continue;
  1566. }
  1567. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1568. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1569. /* If passive , set up for auto-switch
  1570. * and use long active_dwell time.
  1571. */
  1572. if (!is_active || iwl_legacy_is_channel_passive(ch_info) ||
  1573. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1574. scan_ch->type = 0; /* passive */
  1575. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1576. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1577. } else {
  1578. scan_ch->type = 1; /* active */
  1579. }
  1580. /* Set direct probe bits. These may be used both for active
  1581. * scan channels (probes gets sent right away),
  1582. * or for passive channels (probes get se sent only after
  1583. * hearing clear Rx packet).*/
  1584. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1585. if (n_probes)
  1586. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1587. } else {
  1588. /* uCode v1 does not allow setting direct probe bits on
  1589. * passive channel. */
  1590. if ((scan_ch->type & 1) && n_probes)
  1591. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1592. }
  1593. /* Set txpower levels to defaults */
  1594. scan_ch->tpc.dsp_atten = 110;
  1595. /* scan_pwr_info->tpc.dsp_atten; */
  1596. /*scan_pwr_info->tpc.tx_gain; */
  1597. if (band == IEEE80211_BAND_5GHZ)
  1598. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1599. else {
  1600. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1601. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1602. * power level:
  1603. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1604. */
  1605. }
  1606. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1607. scan_ch->channel,
  1608. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1609. (scan_ch->type & 1) ?
  1610. active_dwell : passive_dwell);
  1611. scan_ch++;
  1612. added++;
  1613. }
  1614. IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
  1615. return added;
  1616. }
  1617. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1618. struct ieee80211_rate *rates)
  1619. {
  1620. int i;
  1621. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  1622. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1623. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1624. rates[i].hw_value_short = i;
  1625. rates[i].flags = 0;
  1626. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1627. /*
  1628. * If CCK != 1M then set short preamble rate flag.
  1629. */
  1630. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1631. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1632. }
  1633. }
  1634. }
  1635. /******************************************************************************
  1636. *
  1637. * uCode download functions
  1638. *
  1639. ******************************************************************************/
  1640. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1641. {
  1642. iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1643. iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1644. iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1645. iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1646. iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1647. iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1648. }
  1649. /**
  1650. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1651. * looking at all data.
  1652. */
  1653. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1654. {
  1655. u32 val;
  1656. u32 save_len = len;
  1657. int rc = 0;
  1658. u32 errcnt;
  1659. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1660. iwl_legacy_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1661. IWL39_RTC_INST_LOWER_BOUND);
  1662. errcnt = 0;
  1663. for (; len > 0; len -= sizeof(u32), image++) {
  1664. /* read data comes through single port, auto-incr addr */
  1665. /* NOTE: Use the debugless read so we don't flood kernel log
  1666. * if IWL_DL_IO is set */
  1667. val = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1668. if (val != le32_to_cpu(*image)) {
  1669. IWL_ERR(priv, "uCode INST section is invalid at "
  1670. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1671. save_len - len, val, le32_to_cpu(*image));
  1672. rc = -EIO;
  1673. errcnt++;
  1674. if (errcnt >= 20)
  1675. break;
  1676. }
  1677. }
  1678. if (!errcnt)
  1679. IWL_DEBUG_INFO(priv,
  1680. "ucode image in INSTRUCTION memory is good\n");
  1681. return rc;
  1682. }
  1683. /**
  1684. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1685. * using sample data 100 bytes apart. If these sample points are good,
  1686. * it's a pretty good bet that everything between them is good, too.
  1687. */
  1688. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1689. {
  1690. u32 val;
  1691. int rc = 0;
  1692. u32 errcnt = 0;
  1693. u32 i;
  1694. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1695. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1696. /* read data comes through single port, auto-incr addr */
  1697. /* NOTE: Use the debugless read so we don't flood kernel log
  1698. * if IWL_DL_IO is set */
  1699. iwl_legacy_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1700. i + IWL39_RTC_INST_LOWER_BOUND);
  1701. val = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1702. if (val != le32_to_cpu(*image)) {
  1703. #if 0 /* Enable this if you want to see details */
  1704. IWL_ERR(priv, "uCode INST section is invalid at "
  1705. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1706. i, val, *image);
  1707. #endif
  1708. rc = -EIO;
  1709. errcnt++;
  1710. if (errcnt >= 3)
  1711. break;
  1712. }
  1713. }
  1714. return rc;
  1715. }
  1716. /**
  1717. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1718. * and verify its contents
  1719. */
  1720. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1721. {
  1722. __le32 *image;
  1723. u32 len;
  1724. int rc = 0;
  1725. /* Try bootstrap */
  1726. image = (__le32 *)priv->ucode_boot.v_addr;
  1727. len = priv->ucode_boot.len;
  1728. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1729. if (rc == 0) {
  1730. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1731. return 0;
  1732. }
  1733. /* Try initialize */
  1734. image = (__le32 *)priv->ucode_init.v_addr;
  1735. len = priv->ucode_init.len;
  1736. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1737. if (rc == 0) {
  1738. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1739. return 0;
  1740. }
  1741. /* Try runtime/protocol */
  1742. image = (__le32 *)priv->ucode_code.v_addr;
  1743. len = priv->ucode_code.len;
  1744. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1745. if (rc == 0) {
  1746. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1747. return 0;
  1748. }
  1749. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1750. /* Since nothing seems to match, show first several data entries in
  1751. * instruction SRAM, so maybe visual inspection will give a clue.
  1752. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1753. image = (__le32 *)priv->ucode_boot.v_addr;
  1754. len = priv->ucode_boot.len;
  1755. rc = iwl3945_verify_inst_full(priv, image, len);
  1756. return rc;
  1757. }
  1758. static void iwl3945_nic_start(struct iwl_priv *priv)
  1759. {
  1760. /* Remove all resets to allow NIC to operate */
  1761. iwl_write32(priv, CSR_RESET, 0);
  1762. }
  1763. #define IWL3945_UCODE_GET(item) \
  1764. static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
  1765. { \
  1766. return le32_to_cpu(ucode->v1.item); \
  1767. }
  1768. static u32 iwl3945_ucode_get_header_size(u32 api_ver)
  1769. {
  1770. return 24;
  1771. }
  1772. static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
  1773. {
  1774. return (u8 *) ucode->v1.data;
  1775. }
  1776. IWL3945_UCODE_GET(inst_size);
  1777. IWL3945_UCODE_GET(data_size);
  1778. IWL3945_UCODE_GET(init_size);
  1779. IWL3945_UCODE_GET(init_data_size);
  1780. IWL3945_UCODE_GET(boot_size);
  1781. /**
  1782. * iwl3945_read_ucode - Read uCode images from disk file.
  1783. *
  1784. * Copy into buffers for card to fetch via bus-mastering
  1785. */
  1786. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1787. {
  1788. const struct iwl_ucode_header *ucode;
  1789. int ret = -EINVAL, index;
  1790. const struct firmware *ucode_raw;
  1791. /* firmware file name contains uCode/driver compatibility version */
  1792. const char *name_pre = priv->cfg->fw_name_pre;
  1793. const unsigned int api_max = priv->cfg->ucode_api_max;
  1794. const unsigned int api_min = priv->cfg->ucode_api_min;
  1795. char buf[25];
  1796. u8 *src;
  1797. size_t len;
  1798. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1799. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1800. * request_firmware() is synchronous, file is in memory on return. */
  1801. for (index = api_max; index >= api_min; index--) {
  1802. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1803. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1804. if (ret < 0) {
  1805. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1806. buf, ret);
  1807. if (ret == -ENOENT)
  1808. continue;
  1809. else
  1810. goto error;
  1811. } else {
  1812. if (index < api_max)
  1813. IWL_ERR(priv, "Loaded firmware %s, "
  1814. "which is deprecated. "
  1815. " Please use API v%u instead.\n",
  1816. buf, api_max);
  1817. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1818. "(%zd bytes) from disk\n",
  1819. buf, ucode_raw->size);
  1820. break;
  1821. }
  1822. }
  1823. if (ret < 0)
  1824. goto error;
  1825. /* Make sure that we got at least our header! */
  1826. if (ucode_raw->size < iwl3945_ucode_get_header_size(1)) {
  1827. IWL_ERR(priv, "File size way too small!\n");
  1828. ret = -EINVAL;
  1829. goto err_release;
  1830. }
  1831. /* Data from ucode file: header followed by uCode images */
  1832. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1833. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1834. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1835. inst_size = iwl3945_ucode_get_inst_size(ucode);
  1836. data_size = iwl3945_ucode_get_data_size(ucode);
  1837. init_size = iwl3945_ucode_get_init_size(ucode);
  1838. init_data_size = iwl3945_ucode_get_init_data_size(ucode);
  1839. boot_size = iwl3945_ucode_get_boot_size(ucode);
  1840. src = iwl3945_ucode_get_data(ucode);
  1841. /* api_ver should match the api version forming part of the
  1842. * firmware filename ... but we don't check for that and only rely
  1843. * on the API version read from firmware header from here on forward */
  1844. if (api_ver < api_min || api_ver > api_max) {
  1845. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1846. "Driver supports v%u, firmware is v%u.\n",
  1847. api_max, api_ver);
  1848. priv->ucode_ver = 0;
  1849. ret = -EINVAL;
  1850. goto err_release;
  1851. }
  1852. if (api_ver != api_max)
  1853. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1854. "got %u. New firmware can be obtained "
  1855. "from http://www.intellinuxwireless.org.\n",
  1856. api_max, api_ver);
  1857. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1858. IWL_UCODE_MAJOR(priv->ucode_ver),
  1859. IWL_UCODE_MINOR(priv->ucode_ver),
  1860. IWL_UCODE_API(priv->ucode_ver),
  1861. IWL_UCODE_SERIAL(priv->ucode_ver));
  1862. snprintf(priv->hw->wiphy->fw_version,
  1863. sizeof(priv->hw->wiphy->fw_version),
  1864. "%u.%u.%u.%u",
  1865. IWL_UCODE_MAJOR(priv->ucode_ver),
  1866. IWL_UCODE_MINOR(priv->ucode_ver),
  1867. IWL_UCODE_API(priv->ucode_ver),
  1868. IWL_UCODE_SERIAL(priv->ucode_ver));
  1869. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1870. priv->ucode_ver);
  1871. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1872. inst_size);
  1873. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1874. data_size);
  1875. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1876. init_size);
  1877. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1878. init_data_size);
  1879. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1880. boot_size);
  1881. /* Verify size of file vs. image size info in file's header */
  1882. if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
  1883. inst_size + data_size + init_size +
  1884. init_data_size + boot_size) {
  1885. IWL_DEBUG_INFO(priv,
  1886. "uCode file size %zd does not match expected size\n",
  1887. ucode_raw->size);
  1888. ret = -EINVAL;
  1889. goto err_release;
  1890. }
  1891. /* Verify that uCode images will fit in card's SRAM */
  1892. if (inst_size > IWL39_MAX_INST_SIZE) {
  1893. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1894. inst_size);
  1895. ret = -EINVAL;
  1896. goto err_release;
  1897. }
  1898. if (data_size > IWL39_MAX_DATA_SIZE) {
  1899. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1900. data_size);
  1901. ret = -EINVAL;
  1902. goto err_release;
  1903. }
  1904. if (init_size > IWL39_MAX_INST_SIZE) {
  1905. IWL_DEBUG_INFO(priv,
  1906. "uCode init instr len %d too large to fit in\n",
  1907. init_size);
  1908. ret = -EINVAL;
  1909. goto err_release;
  1910. }
  1911. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1912. IWL_DEBUG_INFO(priv,
  1913. "uCode init data len %d too large to fit in\n",
  1914. init_data_size);
  1915. ret = -EINVAL;
  1916. goto err_release;
  1917. }
  1918. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1919. IWL_DEBUG_INFO(priv,
  1920. "uCode boot instr len %d too large to fit in\n",
  1921. boot_size);
  1922. ret = -EINVAL;
  1923. goto err_release;
  1924. }
  1925. /* Allocate ucode buffers for card's bus-master loading ... */
  1926. /* Runtime instructions and 2 copies of data:
  1927. * 1) unmodified from disk
  1928. * 2) backup cache for save/restore during power-downs */
  1929. priv->ucode_code.len = inst_size;
  1930. iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1931. priv->ucode_data.len = data_size;
  1932. iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1933. priv->ucode_data_backup.len = data_size;
  1934. iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1935. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1936. !priv->ucode_data_backup.v_addr)
  1937. goto err_pci_alloc;
  1938. /* Initialization instructions and data */
  1939. if (init_size && init_data_size) {
  1940. priv->ucode_init.len = init_size;
  1941. iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1942. priv->ucode_init_data.len = init_data_size;
  1943. iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1944. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1945. goto err_pci_alloc;
  1946. }
  1947. /* Bootstrap (instructions only, no data) */
  1948. if (boot_size) {
  1949. priv->ucode_boot.len = boot_size;
  1950. iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1951. if (!priv->ucode_boot.v_addr)
  1952. goto err_pci_alloc;
  1953. }
  1954. /* Copy images into buffers for card's bus-master reads ... */
  1955. /* Runtime instructions (first block of data in file) */
  1956. len = inst_size;
  1957. IWL_DEBUG_INFO(priv,
  1958. "Copying (but not loading) uCode instr len %zd\n", len);
  1959. memcpy(priv->ucode_code.v_addr, src, len);
  1960. src += len;
  1961. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1962. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1963. /* Runtime data (2nd block)
  1964. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1965. len = data_size;
  1966. IWL_DEBUG_INFO(priv,
  1967. "Copying (but not loading) uCode data len %zd\n", len);
  1968. memcpy(priv->ucode_data.v_addr, src, len);
  1969. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1970. src += len;
  1971. /* Initialization instructions (3rd block) */
  1972. if (init_size) {
  1973. len = init_size;
  1974. IWL_DEBUG_INFO(priv,
  1975. "Copying (but not loading) init instr len %zd\n", len);
  1976. memcpy(priv->ucode_init.v_addr, src, len);
  1977. src += len;
  1978. }
  1979. /* Initialization data (4th block) */
  1980. if (init_data_size) {
  1981. len = init_data_size;
  1982. IWL_DEBUG_INFO(priv,
  1983. "Copying (but not loading) init data len %zd\n", len);
  1984. memcpy(priv->ucode_init_data.v_addr, src, len);
  1985. src += len;
  1986. }
  1987. /* Bootstrap instructions (5th block) */
  1988. len = boot_size;
  1989. IWL_DEBUG_INFO(priv,
  1990. "Copying (but not loading) boot instr len %zd\n", len);
  1991. memcpy(priv->ucode_boot.v_addr, src, len);
  1992. /* We have our copies now, allow OS release its copies */
  1993. release_firmware(ucode_raw);
  1994. return 0;
  1995. err_pci_alloc:
  1996. IWL_ERR(priv, "failed to allocate pci memory\n");
  1997. ret = -ENOMEM;
  1998. iwl3945_dealloc_ucode_pci(priv);
  1999. err_release:
  2000. release_firmware(ucode_raw);
  2001. error:
  2002. return ret;
  2003. }
  2004. /**
  2005. * iwl3945_set_ucode_ptrs - Set uCode address location
  2006. *
  2007. * Tell initialization uCode where to find runtime uCode.
  2008. *
  2009. * BSM registers initially contain pointers to initialization uCode.
  2010. * We need to replace them to load runtime uCode inst and data,
  2011. * and to save runtime data when powering down.
  2012. */
  2013. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2014. {
  2015. dma_addr_t pinst;
  2016. dma_addr_t pdata;
  2017. /* bits 31:0 for 3945 */
  2018. pinst = priv->ucode_code.p_addr;
  2019. pdata = priv->ucode_data_backup.p_addr;
  2020. /* Tell bootstrap uCode where to find image to load */
  2021. iwl_legacy_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2022. iwl_legacy_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2023. iwl_legacy_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2024. priv->ucode_data.len);
  2025. /* Inst byte count must be last to set up, bit 31 signals uCode
  2026. * that all new ptr/size info is in place */
  2027. iwl_legacy_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2028. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2029. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2030. return 0;
  2031. }
  2032. /**
  2033. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2034. *
  2035. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2036. *
  2037. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2038. */
  2039. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2040. {
  2041. /* Check alive response for "valid" sign from uCode */
  2042. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2043. /* We had an error bringing up the hardware, so take it
  2044. * all the way back down so we can try again */
  2045. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2046. goto restart;
  2047. }
  2048. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2049. * This is a paranoid check, because we would not have gotten the
  2050. * "initialize" alive if code weren't properly loaded. */
  2051. if (iwl3945_verify_ucode(priv)) {
  2052. /* Runtime instruction load was bad;
  2053. * take it all the way back down so we can try again */
  2054. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2055. goto restart;
  2056. }
  2057. /* Send pointers to protocol/runtime uCode image ... init code will
  2058. * load and launch runtime uCode, which will send us another "Alive"
  2059. * notification. */
  2060. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2061. if (iwl3945_set_ucode_ptrs(priv)) {
  2062. /* Runtime instruction load won't happen;
  2063. * take it all the way back down so we can try again */
  2064. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2065. goto restart;
  2066. }
  2067. return;
  2068. restart:
  2069. queue_work(priv->workqueue, &priv->restart);
  2070. }
  2071. /**
  2072. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2073. * from protocol/runtime uCode (initialization uCode's
  2074. * Alive gets handled by iwl3945_init_alive_start()).
  2075. */
  2076. static void iwl3945_alive_start(struct iwl_priv *priv)
  2077. {
  2078. int thermal_spin = 0;
  2079. u32 rfkill;
  2080. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2081. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2082. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2083. /* We had an error bringing up the hardware, so take it
  2084. * all the way back down so we can try again */
  2085. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2086. goto restart;
  2087. }
  2088. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2089. * This is a paranoid check, because we would not have gotten the
  2090. * "runtime" alive if code weren't properly loaded. */
  2091. if (iwl3945_verify_ucode(priv)) {
  2092. /* Runtime instruction load was bad;
  2093. * take it all the way back down so we can try again */
  2094. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2095. goto restart;
  2096. }
  2097. rfkill = iwl_legacy_read_prph(priv, APMG_RFKILL_REG);
  2098. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2099. if (rfkill & 0x1) {
  2100. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2101. /* if RFKILL is not on, then wait for thermal
  2102. * sensor in adapter to kick in */
  2103. while (iwl3945_hw_get_temperature(priv) == 0) {
  2104. thermal_spin++;
  2105. udelay(10);
  2106. }
  2107. if (thermal_spin)
  2108. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2109. thermal_spin * 10);
  2110. } else
  2111. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2112. /* After the ALIVE response, we can send commands to 3945 uCode */
  2113. set_bit(STATUS_ALIVE, &priv->status);
  2114. /* Enable watchdog to monitor the driver tx queues */
  2115. iwl_legacy_setup_watchdog(priv);
  2116. if (iwl_legacy_is_rfkill(priv))
  2117. return;
  2118. ieee80211_wake_queues(priv->hw);
  2119. priv->active_rate = IWL_RATES_MASK_3945;
  2120. iwl_legacy_power_update_mode(priv, true);
  2121. if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS)) {
  2122. struct iwl3945_rxon_cmd *active_rxon =
  2123. (struct iwl3945_rxon_cmd *)(&ctx->active);
  2124. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2125. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2126. } else {
  2127. /* Initialize our rx_config data */
  2128. iwl_legacy_connection_init_rx_config(priv, ctx);
  2129. }
  2130. /* Configure Bluetooth device coexistence support */
  2131. iwl_legacy_send_bt_config(priv);
  2132. set_bit(STATUS_READY, &priv->status);
  2133. /* Configure the adapter for unassociated operation */
  2134. iwl3945_commit_rxon(priv, ctx);
  2135. iwl3945_reg_txpower_periodic(priv);
  2136. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2137. wake_up(&priv->wait_command_queue);
  2138. return;
  2139. restart:
  2140. queue_work(priv->workqueue, &priv->restart);
  2141. }
  2142. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2143. static void __iwl3945_down(struct iwl_priv *priv)
  2144. {
  2145. unsigned long flags;
  2146. int exit_pending;
  2147. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2148. iwl_legacy_scan_cancel_timeout(priv, 200);
  2149. exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
  2150. /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
  2151. * to prevent rearm timer */
  2152. del_timer_sync(&priv->watchdog);
  2153. /* Station information will now be cleared in device */
  2154. iwl_legacy_clear_ucode_stations(priv, NULL);
  2155. iwl_legacy_dealloc_bcast_stations(priv);
  2156. iwl_legacy_clear_driver_stations(priv);
  2157. /* Unblock any waiting calls */
  2158. wake_up_all(&priv->wait_command_queue);
  2159. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2160. * exiting the module */
  2161. if (!exit_pending)
  2162. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2163. /* stop and reset the on-board processor */
  2164. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2165. /* tell the device to stop sending interrupts */
  2166. spin_lock_irqsave(&priv->lock, flags);
  2167. iwl_legacy_disable_interrupts(priv);
  2168. spin_unlock_irqrestore(&priv->lock, flags);
  2169. iwl3945_synchronize_irq(priv);
  2170. if (priv->mac80211_registered)
  2171. ieee80211_stop_queues(priv->hw);
  2172. /* If we have not previously called iwl3945_init() then
  2173. * clear all bits but the RF Kill bits and return */
  2174. if (!iwl_legacy_is_init(priv)) {
  2175. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2176. STATUS_RF_KILL_HW |
  2177. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2178. STATUS_GEO_CONFIGURED |
  2179. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2180. STATUS_EXIT_PENDING;
  2181. goto exit;
  2182. }
  2183. /* ...otherwise clear out all the status bits but the RF Kill
  2184. * bit and continue taking the NIC down. */
  2185. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2186. STATUS_RF_KILL_HW |
  2187. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2188. STATUS_GEO_CONFIGURED |
  2189. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2190. STATUS_FW_ERROR |
  2191. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2192. STATUS_EXIT_PENDING;
  2193. iwl3945_hw_txq_ctx_stop(priv);
  2194. iwl3945_hw_rxq_stop(priv);
  2195. /* Power-down device's busmaster DMA clocks */
  2196. iwl_legacy_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  2197. udelay(5);
  2198. /* Stop the device, and put it in low power state */
  2199. iwl_legacy_apm_stop(priv);
  2200. exit:
  2201. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2202. if (priv->beacon_skb)
  2203. dev_kfree_skb(priv->beacon_skb);
  2204. priv->beacon_skb = NULL;
  2205. /* clear out any free frames */
  2206. iwl3945_clear_free_frames(priv);
  2207. }
  2208. static void iwl3945_down(struct iwl_priv *priv)
  2209. {
  2210. mutex_lock(&priv->mutex);
  2211. __iwl3945_down(priv);
  2212. mutex_unlock(&priv->mutex);
  2213. iwl3945_cancel_deferred_work(priv);
  2214. }
  2215. #define MAX_HW_RESTARTS 5
  2216. static int iwl3945_alloc_bcast_station(struct iwl_priv *priv)
  2217. {
  2218. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2219. unsigned long flags;
  2220. u8 sta_id;
  2221. spin_lock_irqsave(&priv->sta_lock, flags);
  2222. sta_id = iwl_legacy_prep_station(priv, ctx,
  2223. iwlegacy_bcast_addr, false, NULL);
  2224. if (sta_id == IWL_INVALID_STATION) {
  2225. IWL_ERR(priv, "Unable to prepare broadcast station\n");
  2226. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2227. return -EINVAL;
  2228. }
  2229. priv->stations[sta_id].used |= IWL_STA_DRIVER_ACTIVE;
  2230. priv->stations[sta_id].used |= IWL_STA_BCAST;
  2231. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2232. return 0;
  2233. }
  2234. static int __iwl3945_up(struct iwl_priv *priv)
  2235. {
  2236. int rc, i;
  2237. rc = iwl3945_alloc_bcast_station(priv);
  2238. if (rc)
  2239. return rc;
  2240. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2241. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2242. return -EIO;
  2243. }
  2244. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2245. IWL_ERR(priv, "ucode not available for device bring up\n");
  2246. return -EIO;
  2247. }
  2248. /* If platform's RF_KILL switch is NOT set to KILL */
  2249. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2250. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2251. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2252. else {
  2253. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2254. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2255. return -ENODEV;
  2256. }
  2257. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2258. rc = iwl3945_hw_nic_init(priv);
  2259. if (rc) {
  2260. IWL_ERR(priv, "Unable to int nic\n");
  2261. return rc;
  2262. }
  2263. /* make sure rfkill handshake bits are cleared */
  2264. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2265. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2266. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2267. /* clear (again), then enable host interrupts */
  2268. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2269. iwl_legacy_enable_interrupts(priv);
  2270. /* really make sure rfkill handshake bits are cleared */
  2271. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2272. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2273. /* Copy original ucode data image from disk into backup cache.
  2274. * This will be used to initialize the on-board processor's
  2275. * data SRAM for a clean start when the runtime program first loads. */
  2276. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2277. priv->ucode_data.len);
  2278. /* We return success when we resume from suspend and rf_kill is on. */
  2279. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2280. return 0;
  2281. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2282. /* load bootstrap state machine,
  2283. * load bootstrap program into processor's memory,
  2284. * prepare to load the "initialize" uCode */
  2285. rc = priv->cfg->ops->lib->load_ucode(priv);
  2286. if (rc) {
  2287. IWL_ERR(priv,
  2288. "Unable to set up bootstrap uCode: %d\n", rc);
  2289. continue;
  2290. }
  2291. /* start card; "initialize" will load runtime ucode */
  2292. iwl3945_nic_start(priv);
  2293. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2294. return 0;
  2295. }
  2296. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2297. __iwl3945_down(priv);
  2298. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2299. /* tried to restart and config the device for as long as our
  2300. * patience could withstand */
  2301. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2302. return -EIO;
  2303. }
  2304. /*****************************************************************************
  2305. *
  2306. * Workqueue callbacks
  2307. *
  2308. *****************************************************************************/
  2309. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2310. {
  2311. struct iwl_priv *priv =
  2312. container_of(data, struct iwl_priv, init_alive_start.work);
  2313. mutex_lock(&priv->mutex);
  2314. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2315. goto out;
  2316. iwl3945_init_alive_start(priv);
  2317. out:
  2318. mutex_unlock(&priv->mutex);
  2319. }
  2320. static void iwl3945_bg_alive_start(struct work_struct *data)
  2321. {
  2322. struct iwl_priv *priv =
  2323. container_of(data, struct iwl_priv, alive_start.work);
  2324. mutex_lock(&priv->mutex);
  2325. if (test_bit(STATUS_EXIT_PENDING, &priv->status) || priv->txq == NULL)
  2326. goto out;
  2327. iwl3945_alive_start(priv);
  2328. out:
  2329. mutex_unlock(&priv->mutex);
  2330. }
  2331. /*
  2332. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2333. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2334. * *is* readable even when device has been SW_RESET into low power mode
  2335. * (e.g. during RF KILL).
  2336. */
  2337. static void iwl3945_rfkill_poll(struct work_struct *data)
  2338. {
  2339. struct iwl_priv *priv =
  2340. container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
  2341. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2342. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2343. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2344. if (new_rfkill != old_rfkill) {
  2345. if (new_rfkill)
  2346. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2347. else
  2348. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2349. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2350. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2351. new_rfkill ? "disable radio" : "enable radio");
  2352. }
  2353. /* Keep this running, even if radio now enabled. This will be
  2354. * cancelled in mac_start() if system decides to start again */
  2355. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  2356. round_jiffies_relative(2 * HZ));
  2357. }
  2358. int iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
  2359. {
  2360. struct iwl_host_cmd cmd = {
  2361. .id = REPLY_SCAN_CMD,
  2362. .len = sizeof(struct iwl3945_scan_cmd),
  2363. .flags = CMD_SIZE_HUGE,
  2364. };
  2365. struct iwl3945_scan_cmd *scan;
  2366. u8 n_probes = 0;
  2367. enum ieee80211_band band;
  2368. bool is_active = false;
  2369. int ret;
  2370. lockdep_assert_held(&priv->mutex);
  2371. if (!priv->scan_cmd) {
  2372. priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2373. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2374. if (!priv->scan_cmd) {
  2375. IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
  2376. return -ENOMEM;
  2377. }
  2378. }
  2379. scan = priv->scan_cmd;
  2380. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2381. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2382. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2383. if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS)) {
  2384. u16 interval = 0;
  2385. u32 extra;
  2386. u32 suspend_time = 100;
  2387. u32 scan_suspend_time = 100;
  2388. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2389. if (priv->is_internal_short_scan)
  2390. interval = 0;
  2391. else
  2392. interval = vif->bss_conf.beacon_int;
  2393. scan->suspend_time = 0;
  2394. scan->max_out_time = cpu_to_le32(200 * 1024);
  2395. if (!interval)
  2396. interval = suspend_time;
  2397. /*
  2398. * suspend time format:
  2399. * 0-19: beacon interval in usec (time before exec.)
  2400. * 20-23: 0
  2401. * 24-31: number of beacons (suspend between channels)
  2402. */
  2403. extra = (suspend_time / interval) << 24;
  2404. scan_suspend_time = 0xFF0FFFFF &
  2405. (extra | ((suspend_time % interval) * 1024));
  2406. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2407. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2408. scan_suspend_time, interval);
  2409. }
  2410. if (priv->is_internal_short_scan) {
  2411. IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
  2412. } else if (priv->scan_request->n_ssids) {
  2413. int i, p = 0;
  2414. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2415. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2416. /* always does wildcard anyway */
  2417. if (!priv->scan_request->ssids[i].ssid_len)
  2418. continue;
  2419. scan->direct_scan[p].id = WLAN_EID_SSID;
  2420. scan->direct_scan[p].len =
  2421. priv->scan_request->ssids[i].ssid_len;
  2422. memcpy(scan->direct_scan[p].ssid,
  2423. priv->scan_request->ssids[i].ssid,
  2424. priv->scan_request->ssids[i].ssid_len);
  2425. n_probes++;
  2426. p++;
  2427. }
  2428. is_active = true;
  2429. } else
  2430. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2431. /* We don't build a direct scan probe request; the uCode will do
  2432. * that based on the direct_mask added to each channel entry */
  2433. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2434. scan->tx_cmd.sta_id = priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id;
  2435. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2436. /* flags + rate selection */
  2437. switch (priv->scan_band) {
  2438. case IEEE80211_BAND_2GHZ:
  2439. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2440. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2441. band = IEEE80211_BAND_2GHZ;
  2442. break;
  2443. case IEEE80211_BAND_5GHZ:
  2444. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2445. band = IEEE80211_BAND_5GHZ;
  2446. break;
  2447. default:
  2448. IWL_WARN(priv, "Invalid scan band\n");
  2449. return -EIO;
  2450. }
  2451. /*
  2452. * If active scaning is requested but a certain channel is marked
  2453. * passive, we can do active scanning if we detect transmissions. For
  2454. * passive only scanning disable switching to active on any channel.
  2455. */
  2456. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
  2457. IWL_GOOD_CRC_TH_NEVER;
  2458. if (!priv->is_internal_short_scan) {
  2459. scan->tx_cmd.len = cpu_to_le16(
  2460. iwl_legacy_fill_probe_req(priv,
  2461. (struct ieee80211_mgmt *)scan->data,
  2462. vif->addr,
  2463. priv->scan_request->ie,
  2464. priv->scan_request->ie_len,
  2465. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2466. } else {
  2467. /* use bcast addr, will not be transmitted but must be valid */
  2468. scan->tx_cmd.len = cpu_to_le16(
  2469. iwl_legacy_fill_probe_req(priv,
  2470. (struct ieee80211_mgmt *)scan->data,
  2471. iwlegacy_bcast_addr, NULL, 0,
  2472. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2473. }
  2474. /* select Rx antennas */
  2475. scan->flags |= iwl3945_get_antenna_flags(priv);
  2476. if (priv->is_internal_short_scan) {
  2477. scan->channel_count =
  2478. iwl3945_get_single_channel_for_scan(priv, vif, band,
  2479. (void *)&scan->data[le16_to_cpu(
  2480. scan->tx_cmd.len)]);
  2481. } else {
  2482. scan->channel_count =
  2483. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2484. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif);
  2485. }
  2486. if (scan->channel_count == 0) {
  2487. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2488. return -EIO;
  2489. }
  2490. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2491. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2492. cmd.data = scan;
  2493. scan->len = cpu_to_le16(cmd.len);
  2494. set_bit(STATUS_SCAN_HW, &priv->status);
  2495. ret = iwl_legacy_send_cmd_sync(priv, &cmd);
  2496. if (ret)
  2497. clear_bit(STATUS_SCAN_HW, &priv->status);
  2498. return ret;
  2499. }
  2500. void iwl3945_post_scan(struct iwl_priv *priv)
  2501. {
  2502. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2503. /*
  2504. * Since setting the RXON may have been deferred while
  2505. * performing the scan, fire one off if needed
  2506. */
  2507. if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
  2508. iwl3945_commit_rxon(priv, ctx);
  2509. }
  2510. static void iwl3945_bg_restart(struct work_struct *data)
  2511. {
  2512. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2513. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2514. return;
  2515. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2516. struct iwl_rxon_context *ctx;
  2517. mutex_lock(&priv->mutex);
  2518. for_each_context(priv, ctx)
  2519. ctx->vif = NULL;
  2520. priv->is_open = 0;
  2521. mutex_unlock(&priv->mutex);
  2522. iwl3945_down(priv);
  2523. ieee80211_restart_hw(priv->hw);
  2524. } else {
  2525. iwl3945_down(priv);
  2526. mutex_lock(&priv->mutex);
  2527. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2528. mutex_unlock(&priv->mutex);
  2529. return;
  2530. }
  2531. __iwl3945_up(priv);
  2532. mutex_unlock(&priv->mutex);
  2533. }
  2534. }
  2535. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2536. {
  2537. struct iwl_priv *priv =
  2538. container_of(data, struct iwl_priv, rx_replenish);
  2539. mutex_lock(&priv->mutex);
  2540. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2541. goto out;
  2542. iwl3945_rx_replenish(priv);
  2543. out:
  2544. mutex_unlock(&priv->mutex);
  2545. }
  2546. void iwl3945_post_associate(struct iwl_priv *priv)
  2547. {
  2548. int rc = 0;
  2549. struct ieee80211_conf *conf = NULL;
  2550. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2551. if (!ctx->vif || !priv->is_open)
  2552. return;
  2553. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2554. ctx->vif->bss_conf.aid, ctx->active.bssid_addr);
  2555. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2556. return;
  2557. iwl_legacy_scan_cancel_timeout(priv, 200);
  2558. conf = iwl_legacy_ieee80211_get_hw_conf(priv->hw);
  2559. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2560. iwl3945_commit_rxon(priv, ctx);
  2561. rc = iwl_legacy_send_rxon_timing(priv, ctx);
  2562. if (rc)
  2563. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2564. "Attempting to continue.\n");
  2565. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2566. ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid);
  2567. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2568. ctx->vif->bss_conf.aid, ctx->vif->bss_conf.beacon_int);
  2569. if (ctx->vif->bss_conf.use_short_preamble)
  2570. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2571. else
  2572. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2573. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2574. if (ctx->vif->bss_conf.use_short_slot)
  2575. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2576. else
  2577. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2578. }
  2579. iwl3945_commit_rxon(priv, ctx);
  2580. switch (ctx->vif->type) {
  2581. case NL80211_IFTYPE_STATION:
  2582. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2583. break;
  2584. case NL80211_IFTYPE_ADHOC:
  2585. iwl3945_send_beacon_cmd(priv);
  2586. break;
  2587. default:
  2588. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2589. __func__, ctx->vif->type);
  2590. break;
  2591. }
  2592. }
  2593. /*****************************************************************************
  2594. *
  2595. * mac80211 entry point functions
  2596. *
  2597. *****************************************************************************/
  2598. #define UCODE_READY_TIMEOUT (2 * HZ)
  2599. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2600. {
  2601. struct iwl_priv *priv = hw->priv;
  2602. int ret;
  2603. IWL_DEBUG_MAC80211(priv, "enter\n");
  2604. /* we should be verifying the device is ready to be opened */
  2605. mutex_lock(&priv->mutex);
  2606. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2607. * ucode filename and max sizes are card-specific. */
  2608. if (!priv->ucode_code.len) {
  2609. ret = iwl3945_read_ucode(priv);
  2610. if (ret) {
  2611. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2612. mutex_unlock(&priv->mutex);
  2613. goto out_release_irq;
  2614. }
  2615. }
  2616. ret = __iwl3945_up(priv);
  2617. mutex_unlock(&priv->mutex);
  2618. if (ret)
  2619. goto out_release_irq;
  2620. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2621. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2622. * mac80211 will not be run successfully. */
  2623. ret = wait_event_timeout(priv->wait_command_queue,
  2624. test_bit(STATUS_READY, &priv->status),
  2625. UCODE_READY_TIMEOUT);
  2626. if (!ret) {
  2627. if (!test_bit(STATUS_READY, &priv->status)) {
  2628. IWL_ERR(priv,
  2629. "Wait for START_ALIVE timeout after %dms.\n",
  2630. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2631. ret = -ETIMEDOUT;
  2632. goto out_release_irq;
  2633. }
  2634. }
  2635. /* ucode is running and will send rfkill notifications,
  2636. * no need to poll the killswitch state anymore */
  2637. cancel_delayed_work(&priv->_3945.rfkill_poll);
  2638. priv->is_open = 1;
  2639. IWL_DEBUG_MAC80211(priv, "leave\n");
  2640. return 0;
  2641. out_release_irq:
  2642. priv->is_open = 0;
  2643. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2644. return ret;
  2645. }
  2646. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2647. {
  2648. struct iwl_priv *priv = hw->priv;
  2649. IWL_DEBUG_MAC80211(priv, "enter\n");
  2650. if (!priv->is_open) {
  2651. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2652. return;
  2653. }
  2654. priv->is_open = 0;
  2655. iwl3945_down(priv);
  2656. flush_workqueue(priv->workqueue);
  2657. /* start polling the killswitch state again */
  2658. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  2659. round_jiffies_relative(2 * HZ));
  2660. IWL_DEBUG_MAC80211(priv, "leave\n");
  2661. }
  2662. static void iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2663. {
  2664. struct iwl_priv *priv = hw->priv;
  2665. IWL_DEBUG_MAC80211(priv, "enter\n");
  2666. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2667. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2668. if (iwl3945_tx_skb(priv, skb))
  2669. dev_kfree_skb_any(skb);
  2670. IWL_DEBUG_MAC80211(priv, "leave\n");
  2671. }
  2672. void iwl3945_config_ap(struct iwl_priv *priv)
  2673. {
  2674. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2675. struct ieee80211_vif *vif = ctx->vif;
  2676. int rc = 0;
  2677. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2678. return;
  2679. /* The following should be done only at AP bring up */
  2680. if (!(iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS))) {
  2681. /* RXON - unassoc (to set timing command) */
  2682. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2683. iwl3945_commit_rxon(priv, ctx);
  2684. /* RXON Timing */
  2685. rc = iwl_legacy_send_rxon_timing(priv, ctx);
  2686. if (rc)
  2687. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2688. "Attempting to continue.\n");
  2689. ctx->staging.assoc_id = 0;
  2690. if (vif->bss_conf.use_short_preamble)
  2691. ctx->staging.flags |=
  2692. RXON_FLG_SHORT_PREAMBLE_MSK;
  2693. else
  2694. ctx->staging.flags &=
  2695. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2696. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2697. if (vif->bss_conf.use_short_slot)
  2698. ctx->staging.flags |=
  2699. RXON_FLG_SHORT_SLOT_MSK;
  2700. else
  2701. ctx->staging.flags &=
  2702. ~RXON_FLG_SHORT_SLOT_MSK;
  2703. }
  2704. /* restore RXON assoc */
  2705. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2706. iwl3945_commit_rxon(priv, ctx);
  2707. }
  2708. iwl3945_send_beacon_cmd(priv);
  2709. }
  2710. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2711. struct ieee80211_vif *vif,
  2712. struct ieee80211_sta *sta,
  2713. struct ieee80211_key_conf *key)
  2714. {
  2715. struct iwl_priv *priv = hw->priv;
  2716. int ret = 0;
  2717. u8 sta_id = IWL_INVALID_STATION;
  2718. u8 static_key;
  2719. IWL_DEBUG_MAC80211(priv, "enter\n");
  2720. if (iwl3945_mod_params.sw_crypto) {
  2721. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2722. return -EOPNOTSUPP;
  2723. }
  2724. /*
  2725. * To support IBSS RSN, don't program group keys in IBSS, the
  2726. * hardware will then not attempt to decrypt the frames.
  2727. */
  2728. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2729. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
  2730. return -EOPNOTSUPP;
  2731. static_key = !iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS);
  2732. if (!static_key) {
  2733. sta_id = iwl_legacy_sta_id_or_broadcast(
  2734. priv, &priv->contexts[IWL_RXON_CTX_BSS], sta);
  2735. if (sta_id == IWL_INVALID_STATION)
  2736. return -EINVAL;
  2737. }
  2738. mutex_lock(&priv->mutex);
  2739. iwl_legacy_scan_cancel_timeout(priv, 100);
  2740. switch (cmd) {
  2741. case SET_KEY:
  2742. if (static_key)
  2743. ret = iwl3945_set_static_key(priv, key);
  2744. else
  2745. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2746. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2747. break;
  2748. case DISABLE_KEY:
  2749. if (static_key)
  2750. ret = iwl3945_remove_static_key(priv);
  2751. else
  2752. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2753. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2754. break;
  2755. default:
  2756. ret = -EINVAL;
  2757. }
  2758. mutex_unlock(&priv->mutex);
  2759. IWL_DEBUG_MAC80211(priv, "leave\n");
  2760. return ret;
  2761. }
  2762. static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
  2763. struct ieee80211_vif *vif,
  2764. struct ieee80211_sta *sta)
  2765. {
  2766. struct iwl_priv *priv = hw->priv;
  2767. struct iwl3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2768. int ret;
  2769. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2770. u8 sta_id;
  2771. IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
  2772. sta->addr);
  2773. mutex_lock(&priv->mutex);
  2774. IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
  2775. sta->addr);
  2776. sta_priv->common.sta_id = IWL_INVALID_STATION;
  2777. ret = iwl_legacy_add_station_common(priv,
  2778. &priv->contexts[IWL_RXON_CTX_BSS],
  2779. sta->addr, is_ap, sta, &sta_id);
  2780. if (ret) {
  2781. IWL_ERR(priv, "Unable to add station %pM (%d)\n",
  2782. sta->addr, ret);
  2783. /* Should we return success if return code is EEXIST ? */
  2784. mutex_unlock(&priv->mutex);
  2785. return ret;
  2786. }
  2787. sta_priv->common.sta_id = sta_id;
  2788. /* Initialize rate scaling */
  2789. IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
  2790. sta->addr);
  2791. iwl3945_rs_rate_init(priv, sta, sta_id);
  2792. mutex_unlock(&priv->mutex);
  2793. return 0;
  2794. }
  2795. static void iwl3945_configure_filter(struct ieee80211_hw *hw,
  2796. unsigned int changed_flags,
  2797. unsigned int *total_flags,
  2798. u64 multicast)
  2799. {
  2800. struct iwl_priv *priv = hw->priv;
  2801. __le32 filter_or = 0, filter_nand = 0;
  2802. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2803. #define CHK(test, flag) do { \
  2804. if (*total_flags & (test)) \
  2805. filter_or |= (flag); \
  2806. else \
  2807. filter_nand |= (flag); \
  2808. } while (0)
  2809. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  2810. changed_flags, *total_flags);
  2811. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2812. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2813. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2814. #undef CHK
  2815. mutex_lock(&priv->mutex);
  2816. ctx->staging.filter_flags &= ~filter_nand;
  2817. ctx->staging.filter_flags |= filter_or;
  2818. /*
  2819. * Not committing directly because hardware can perform a scan,
  2820. * but even if hw is ready, committing here breaks for some reason,
  2821. * we'll eventually commit the filter flags change anyway.
  2822. */
  2823. mutex_unlock(&priv->mutex);
  2824. /*
  2825. * Receiving all multicast frames is always enabled by the
  2826. * default flags setup in iwl_legacy_connection_init_rx_config()
  2827. * since we currently do not support programming multicast
  2828. * filters into the device.
  2829. */
  2830. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2831. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2832. }
  2833. /*****************************************************************************
  2834. *
  2835. * sysfs attributes
  2836. *
  2837. *****************************************************************************/
  2838. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  2839. /*
  2840. * The following adds a new attribute to the sysfs representation
  2841. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2842. * used for controlling the debug level.
  2843. *
  2844. * See the level definitions in iwl for details.
  2845. *
  2846. * The debug_level being managed using sysfs below is a per device debug
  2847. * level that is used instead of the global debug level if it (the per
  2848. * device debug level) is set.
  2849. */
  2850. static ssize_t iwl3945_show_debug_level(struct device *d,
  2851. struct device_attribute *attr, char *buf)
  2852. {
  2853. struct iwl_priv *priv = dev_get_drvdata(d);
  2854. return sprintf(buf, "0x%08X\n", iwl_legacy_get_debug_level(priv));
  2855. }
  2856. static ssize_t iwl3945_store_debug_level(struct device *d,
  2857. struct device_attribute *attr,
  2858. const char *buf, size_t count)
  2859. {
  2860. struct iwl_priv *priv = dev_get_drvdata(d);
  2861. unsigned long val;
  2862. int ret;
  2863. ret = strict_strtoul(buf, 0, &val);
  2864. if (ret)
  2865. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2866. else {
  2867. priv->debug_level = val;
  2868. if (iwl_legacy_alloc_traffic_mem(priv))
  2869. IWL_ERR(priv,
  2870. "Not enough memory to generate traffic log\n");
  2871. }
  2872. return strnlen(buf, count);
  2873. }
  2874. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2875. iwl3945_show_debug_level, iwl3945_store_debug_level);
  2876. #endif /* CONFIG_IWLWIFI_LEGACY_DEBUG */
  2877. static ssize_t iwl3945_show_temperature(struct device *d,
  2878. struct device_attribute *attr, char *buf)
  2879. {
  2880. struct iwl_priv *priv = dev_get_drvdata(d);
  2881. if (!iwl_legacy_is_alive(priv))
  2882. return -EAGAIN;
  2883. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2884. }
  2885. static DEVICE_ATTR(temperature, S_IRUGO, iwl3945_show_temperature, NULL);
  2886. static ssize_t iwl3945_show_tx_power(struct device *d,
  2887. struct device_attribute *attr, char *buf)
  2888. {
  2889. struct iwl_priv *priv = dev_get_drvdata(d);
  2890. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2891. }
  2892. static ssize_t iwl3945_store_tx_power(struct device *d,
  2893. struct device_attribute *attr,
  2894. const char *buf, size_t count)
  2895. {
  2896. struct iwl_priv *priv = dev_get_drvdata(d);
  2897. char *p = (char *)buf;
  2898. u32 val;
  2899. val = simple_strtoul(p, &p, 10);
  2900. if (p == buf)
  2901. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2902. else
  2903. iwl3945_hw_reg_set_txpower(priv, val);
  2904. return count;
  2905. }
  2906. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, iwl3945_show_tx_power, iwl3945_store_tx_power);
  2907. static ssize_t iwl3945_show_flags(struct device *d,
  2908. struct device_attribute *attr, char *buf)
  2909. {
  2910. struct iwl_priv *priv = dev_get_drvdata(d);
  2911. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2912. return sprintf(buf, "0x%04X\n", ctx->active.flags);
  2913. }
  2914. static ssize_t iwl3945_store_flags(struct device *d,
  2915. struct device_attribute *attr,
  2916. const char *buf, size_t count)
  2917. {
  2918. struct iwl_priv *priv = dev_get_drvdata(d);
  2919. u32 flags = simple_strtoul(buf, NULL, 0);
  2920. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2921. mutex_lock(&priv->mutex);
  2922. if (le32_to_cpu(ctx->staging.flags) != flags) {
  2923. /* Cancel any currently running scans... */
  2924. if (iwl_legacy_scan_cancel_timeout(priv, 100))
  2925. IWL_WARN(priv, "Could not cancel scan.\n");
  2926. else {
  2927. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2928. flags);
  2929. ctx->staging.flags = cpu_to_le32(flags);
  2930. iwl3945_commit_rxon(priv, ctx);
  2931. }
  2932. }
  2933. mutex_unlock(&priv->mutex);
  2934. return count;
  2935. }
  2936. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, iwl3945_show_flags, iwl3945_store_flags);
  2937. static ssize_t iwl3945_show_filter_flags(struct device *d,
  2938. struct device_attribute *attr, char *buf)
  2939. {
  2940. struct iwl_priv *priv = dev_get_drvdata(d);
  2941. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2942. return sprintf(buf, "0x%04X\n",
  2943. le32_to_cpu(ctx->active.filter_flags));
  2944. }
  2945. static ssize_t iwl3945_store_filter_flags(struct device *d,
  2946. struct device_attribute *attr,
  2947. const char *buf, size_t count)
  2948. {
  2949. struct iwl_priv *priv = dev_get_drvdata(d);
  2950. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2951. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2952. mutex_lock(&priv->mutex);
  2953. if (le32_to_cpu(ctx->staging.filter_flags) != filter_flags) {
  2954. /* Cancel any currently running scans... */
  2955. if (iwl_legacy_scan_cancel_timeout(priv, 100))
  2956. IWL_WARN(priv, "Could not cancel scan.\n");
  2957. else {
  2958. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2959. "0x%04X\n", filter_flags);
  2960. ctx->staging.filter_flags =
  2961. cpu_to_le32(filter_flags);
  2962. iwl3945_commit_rxon(priv, ctx);
  2963. }
  2964. }
  2965. mutex_unlock(&priv->mutex);
  2966. return count;
  2967. }
  2968. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, iwl3945_show_filter_flags,
  2969. iwl3945_store_filter_flags);
  2970. static ssize_t iwl3945_show_measurement(struct device *d,
  2971. struct device_attribute *attr, char *buf)
  2972. {
  2973. struct iwl_priv *priv = dev_get_drvdata(d);
  2974. struct iwl_spectrum_notification measure_report;
  2975. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2976. u8 *data = (u8 *)&measure_report;
  2977. unsigned long flags;
  2978. spin_lock_irqsave(&priv->lock, flags);
  2979. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2980. spin_unlock_irqrestore(&priv->lock, flags);
  2981. return 0;
  2982. }
  2983. memcpy(&measure_report, &priv->measure_report, size);
  2984. priv->measurement_status = 0;
  2985. spin_unlock_irqrestore(&priv->lock, flags);
  2986. while (size && (PAGE_SIZE - len)) {
  2987. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2988. PAGE_SIZE - len, 1);
  2989. len = strlen(buf);
  2990. if (PAGE_SIZE - len)
  2991. buf[len++] = '\n';
  2992. ofs += 16;
  2993. size -= min(size, 16U);
  2994. }
  2995. return len;
  2996. }
  2997. static ssize_t iwl3945_store_measurement(struct device *d,
  2998. struct device_attribute *attr,
  2999. const char *buf, size_t count)
  3000. {
  3001. struct iwl_priv *priv = dev_get_drvdata(d);
  3002. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  3003. struct ieee80211_measurement_params params = {
  3004. .channel = le16_to_cpu(ctx->active.channel),
  3005. .start_time = cpu_to_le64(priv->_3945.last_tsf),
  3006. .duration = cpu_to_le16(1),
  3007. };
  3008. u8 type = IWL_MEASURE_BASIC;
  3009. u8 buffer[32];
  3010. u8 channel;
  3011. if (count) {
  3012. char *p = buffer;
  3013. strncpy(buffer, buf, min(sizeof(buffer), count));
  3014. channel = simple_strtoul(p, NULL, 0);
  3015. if (channel)
  3016. params.channel = channel;
  3017. p = buffer;
  3018. while (*p && *p != ' ')
  3019. p++;
  3020. if (*p)
  3021. type = simple_strtoul(p + 1, NULL, 0);
  3022. }
  3023. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3024. "channel %d (for '%s')\n", type, params.channel, buf);
  3025. iwl3945_get_measurement(priv, &params, type);
  3026. return count;
  3027. }
  3028. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3029. iwl3945_show_measurement, iwl3945_store_measurement);
  3030. static ssize_t iwl3945_store_retry_rate(struct device *d,
  3031. struct device_attribute *attr,
  3032. const char *buf, size_t count)
  3033. {
  3034. struct iwl_priv *priv = dev_get_drvdata(d);
  3035. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3036. if (priv->retry_rate <= 0)
  3037. priv->retry_rate = 1;
  3038. return count;
  3039. }
  3040. static ssize_t iwl3945_show_retry_rate(struct device *d,
  3041. struct device_attribute *attr, char *buf)
  3042. {
  3043. struct iwl_priv *priv = dev_get_drvdata(d);
  3044. return sprintf(buf, "%d", priv->retry_rate);
  3045. }
  3046. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, iwl3945_show_retry_rate,
  3047. iwl3945_store_retry_rate);
  3048. static ssize_t iwl3945_show_channels(struct device *d,
  3049. struct device_attribute *attr, char *buf)
  3050. {
  3051. /* all this shit doesn't belong into sysfs anyway */
  3052. return 0;
  3053. }
  3054. static DEVICE_ATTR(channels, S_IRUSR, iwl3945_show_channels, NULL);
  3055. static ssize_t iwl3945_show_antenna(struct device *d,
  3056. struct device_attribute *attr, char *buf)
  3057. {
  3058. struct iwl_priv *priv = dev_get_drvdata(d);
  3059. if (!iwl_legacy_is_alive(priv))
  3060. return -EAGAIN;
  3061. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3062. }
  3063. static ssize_t iwl3945_store_antenna(struct device *d,
  3064. struct device_attribute *attr,
  3065. const char *buf, size_t count)
  3066. {
  3067. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3068. int ant;
  3069. if (count == 0)
  3070. return 0;
  3071. if (sscanf(buf, "%1i", &ant) != 1) {
  3072. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3073. return count;
  3074. }
  3075. if ((ant >= 0) && (ant <= 2)) {
  3076. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3077. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3078. } else
  3079. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3080. return count;
  3081. }
  3082. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, iwl3945_show_antenna, iwl3945_store_antenna);
  3083. static ssize_t iwl3945_show_status(struct device *d,
  3084. struct device_attribute *attr, char *buf)
  3085. {
  3086. struct iwl_priv *priv = dev_get_drvdata(d);
  3087. if (!iwl_legacy_is_alive(priv))
  3088. return -EAGAIN;
  3089. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3090. }
  3091. static DEVICE_ATTR(status, S_IRUGO, iwl3945_show_status, NULL);
  3092. static ssize_t iwl3945_dump_error_log(struct device *d,
  3093. struct device_attribute *attr,
  3094. const char *buf, size_t count)
  3095. {
  3096. struct iwl_priv *priv = dev_get_drvdata(d);
  3097. char *p = (char *)buf;
  3098. if (p[0] == '1')
  3099. iwl3945_dump_nic_error_log(priv);
  3100. return strnlen(buf, count);
  3101. }
  3102. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, iwl3945_dump_error_log);
  3103. /*****************************************************************************
  3104. *
  3105. * driver setup and tear down
  3106. *
  3107. *****************************************************************************/
  3108. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3109. {
  3110. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3111. init_waitqueue_head(&priv->wait_command_queue);
  3112. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3113. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3114. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3115. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3116. INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
  3117. iwl_legacy_setup_scan_deferred_work(priv);
  3118. iwl3945_hw_setup_deferred_work(priv);
  3119. init_timer(&priv->watchdog);
  3120. priv->watchdog.data = (unsigned long)priv;
  3121. priv->watchdog.function = iwl_legacy_bg_watchdog;
  3122. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3123. iwl3945_irq_tasklet, (unsigned long)priv);
  3124. }
  3125. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3126. {
  3127. iwl3945_hw_cancel_deferred_work(priv);
  3128. cancel_delayed_work_sync(&priv->init_alive_start);
  3129. cancel_delayed_work(&priv->alive_start);
  3130. iwl_legacy_cancel_scan_deferred_work(priv);
  3131. }
  3132. static struct attribute *iwl3945_sysfs_entries[] = {
  3133. &dev_attr_antenna.attr,
  3134. &dev_attr_channels.attr,
  3135. &dev_attr_dump_errors.attr,
  3136. &dev_attr_flags.attr,
  3137. &dev_attr_filter_flags.attr,
  3138. &dev_attr_measurement.attr,
  3139. &dev_attr_retry_rate.attr,
  3140. &dev_attr_status.attr,
  3141. &dev_attr_temperature.attr,
  3142. &dev_attr_tx_power.attr,
  3143. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  3144. &dev_attr_debug_level.attr,
  3145. #endif
  3146. NULL
  3147. };
  3148. static struct attribute_group iwl3945_attribute_group = {
  3149. .name = NULL, /* put in device directory */
  3150. .attrs = iwl3945_sysfs_entries,
  3151. };
  3152. struct ieee80211_ops iwl3945_hw_ops = {
  3153. .tx = iwl3945_mac_tx,
  3154. .start = iwl3945_mac_start,
  3155. .stop = iwl3945_mac_stop,
  3156. .add_interface = iwl_legacy_mac_add_interface,
  3157. .remove_interface = iwl_legacy_mac_remove_interface,
  3158. .change_interface = iwl_legacy_mac_change_interface,
  3159. .config = iwl_legacy_mac_config,
  3160. .configure_filter = iwl3945_configure_filter,
  3161. .set_key = iwl3945_mac_set_key,
  3162. .conf_tx = iwl_legacy_mac_conf_tx,
  3163. .reset_tsf = iwl_legacy_mac_reset_tsf,
  3164. .bss_info_changed = iwl_legacy_mac_bss_info_changed,
  3165. .hw_scan = iwl_legacy_mac_hw_scan,
  3166. .sta_add = iwl3945_mac_sta_add,
  3167. .sta_remove = iwl_legacy_mac_sta_remove,
  3168. .tx_last_beacon = iwl_legacy_mac_tx_last_beacon,
  3169. };
  3170. static int iwl3945_init_drv(struct iwl_priv *priv)
  3171. {
  3172. int ret;
  3173. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3174. priv->retry_rate = 1;
  3175. priv->beacon_skb = NULL;
  3176. spin_lock_init(&priv->sta_lock);
  3177. spin_lock_init(&priv->hcmd_lock);
  3178. INIT_LIST_HEAD(&priv->free_frames);
  3179. mutex_init(&priv->mutex);
  3180. priv->ieee_channels = NULL;
  3181. priv->ieee_rates = NULL;
  3182. priv->band = IEEE80211_BAND_2GHZ;
  3183. priv->iw_mode = NL80211_IFTYPE_STATION;
  3184. priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
  3185. /* initialize force reset */
  3186. priv->force_reset[IWL_RF_RESET].reset_duration =
  3187. IWL_DELAY_NEXT_FORCE_RF_RESET;
  3188. priv->force_reset[IWL_FW_RESET].reset_duration =
  3189. IWL_DELAY_NEXT_FORCE_FW_RELOAD;
  3190. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3191. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3192. eeprom->version);
  3193. ret = -EINVAL;
  3194. goto err;
  3195. }
  3196. ret = iwl_legacy_init_channel_map(priv);
  3197. if (ret) {
  3198. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3199. goto err;
  3200. }
  3201. /* Set up txpower settings in driver for all channels */
  3202. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3203. ret = -EIO;
  3204. goto err_free_channel_map;
  3205. }
  3206. ret = iwl_legacy_init_geos(priv);
  3207. if (ret) {
  3208. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3209. goto err_free_channel_map;
  3210. }
  3211. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3212. return 0;
  3213. err_free_channel_map:
  3214. iwl_legacy_free_channel_map(priv);
  3215. err:
  3216. return ret;
  3217. }
  3218. #define IWL3945_MAX_PROBE_REQUEST 200
  3219. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3220. {
  3221. int ret;
  3222. struct ieee80211_hw *hw = priv->hw;
  3223. hw->rate_control_algorithm = "iwl-3945-rs";
  3224. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3225. hw->vif_data_size = sizeof(struct iwl_vif_priv);
  3226. /* Tell mac80211 our characteristics */
  3227. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3228. IEEE80211_HW_SPECTRUM_MGMT;
  3229. hw->wiphy->interface_modes =
  3230. priv->contexts[IWL_RXON_CTX_BSS].interface_modes;
  3231. hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
  3232. WIPHY_FLAG_DISABLE_BEACON_HINTS |
  3233. WIPHY_FLAG_IBSS_RSN;
  3234. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3235. /* we create the 802.11 header and a zero-length SSID element */
  3236. hw->wiphy->max_scan_ie_len = IWL3945_MAX_PROBE_REQUEST - 24 - 2;
  3237. /* Default value; 4 EDCA QOS priorities */
  3238. hw->queues = 4;
  3239. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3240. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3241. &priv->bands[IEEE80211_BAND_2GHZ];
  3242. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3243. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3244. &priv->bands[IEEE80211_BAND_5GHZ];
  3245. iwl_legacy_leds_init(priv);
  3246. ret = ieee80211_register_hw(priv->hw);
  3247. if (ret) {
  3248. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3249. return ret;
  3250. }
  3251. priv->mac80211_registered = 1;
  3252. return 0;
  3253. }
  3254. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3255. {
  3256. int err = 0, i;
  3257. struct iwl_priv *priv;
  3258. struct ieee80211_hw *hw;
  3259. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3260. struct iwl3945_eeprom *eeprom;
  3261. unsigned long flags;
  3262. /***********************
  3263. * 1. Allocating HW data
  3264. * ********************/
  3265. /* mac80211 allocates memory for this device instance, including
  3266. * space for this driver's private structure */
  3267. hw = iwl_legacy_alloc_all(cfg);
  3268. if (hw == NULL) {
  3269. pr_err("Can not allocate network device\n");
  3270. err = -ENOMEM;
  3271. goto out;
  3272. }
  3273. priv = hw->priv;
  3274. SET_IEEE80211_DEV(hw, &pdev->dev);
  3275. priv->cmd_queue = IWL39_CMD_QUEUE_NUM;
  3276. /* 3945 has only one valid context */
  3277. priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
  3278. for (i = 0; i < NUM_IWL_RXON_CTX; i++)
  3279. priv->contexts[i].ctxid = i;
  3280. priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
  3281. priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
  3282. priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
  3283. priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
  3284. priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
  3285. priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
  3286. priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
  3287. BIT(NL80211_IFTYPE_STATION) |
  3288. BIT(NL80211_IFTYPE_ADHOC);
  3289. priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
  3290. priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
  3291. priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
  3292. /*
  3293. * Disabling hardware scan means that mac80211 will perform scans
  3294. * "the hard way", rather than using device's scan.
  3295. */
  3296. if (iwl3945_mod_params.disable_hw_scan) {
  3297. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3298. iwl3945_hw_ops.hw_scan = NULL;
  3299. }
  3300. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3301. priv->cfg = cfg;
  3302. priv->pci_dev = pdev;
  3303. priv->inta_mask = CSR_INI_SET_MASK;
  3304. if (iwl_legacy_alloc_traffic_mem(priv))
  3305. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3306. /***************************
  3307. * 2. Initializing PCI bus
  3308. * *************************/
  3309. pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  3310. PCIE_LINK_STATE_CLKPM);
  3311. if (pci_enable_device(pdev)) {
  3312. err = -ENODEV;
  3313. goto out_ieee80211_free_hw;
  3314. }
  3315. pci_set_master(pdev);
  3316. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3317. if (!err)
  3318. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3319. if (err) {
  3320. IWL_WARN(priv, "No suitable DMA available.\n");
  3321. goto out_pci_disable_device;
  3322. }
  3323. pci_set_drvdata(pdev, priv);
  3324. err = pci_request_regions(pdev, DRV_NAME);
  3325. if (err)
  3326. goto out_pci_disable_device;
  3327. /***********************
  3328. * 3. Read REV Register
  3329. * ********************/
  3330. priv->hw_base = pci_iomap(pdev, 0, 0);
  3331. if (!priv->hw_base) {
  3332. err = -ENODEV;
  3333. goto out_pci_release_regions;
  3334. }
  3335. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3336. (unsigned long long) pci_resource_len(pdev, 0));
  3337. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3338. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3339. * PCI Tx retries from interfering with C3 CPU state */
  3340. pci_write_config_byte(pdev, 0x41, 0x00);
  3341. /* these spin locks will be used in apm_ops.init and EEPROM access
  3342. * we should init now
  3343. */
  3344. spin_lock_init(&priv->reg_lock);
  3345. spin_lock_init(&priv->lock);
  3346. /*
  3347. * stop and reset the on-board processor just in case it is in a
  3348. * strange state ... like being left stranded by a primary kernel
  3349. * and this is now the kdump kernel trying to start up
  3350. */
  3351. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3352. /***********************
  3353. * 4. Read EEPROM
  3354. * ********************/
  3355. /* Read the EEPROM */
  3356. err = iwl_legacy_eeprom_init(priv);
  3357. if (err) {
  3358. IWL_ERR(priv, "Unable to init EEPROM\n");
  3359. goto out_iounmap;
  3360. }
  3361. /* MAC Address location in EEPROM same for 3945/4965 */
  3362. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3363. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", eeprom->mac_address);
  3364. SET_IEEE80211_PERM_ADDR(priv->hw, eeprom->mac_address);
  3365. /***********************
  3366. * 5. Setup HW Constants
  3367. * ********************/
  3368. /* Device-specific setup */
  3369. if (iwl3945_hw_set_hw_params(priv)) {
  3370. IWL_ERR(priv, "failed to set hw settings\n");
  3371. goto out_eeprom_free;
  3372. }
  3373. /***********************
  3374. * 6. Setup priv
  3375. * ********************/
  3376. err = iwl3945_init_drv(priv);
  3377. if (err) {
  3378. IWL_ERR(priv, "initializing driver failed\n");
  3379. goto out_unset_hw_params;
  3380. }
  3381. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3382. priv->cfg->name);
  3383. /***********************
  3384. * 7. Setup Services
  3385. * ********************/
  3386. spin_lock_irqsave(&priv->lock, flags);
  3387. iwl_legacy_disable_interrupts(priv);
  3388. spin_unlock_irqrestore(&priv->lock, flags);
  3389. pci_enable_msi(priv->pci_dev);
  3390. err = request_irq(priv->pci_dev->irq, iwl_legacy_isr,
  3391. IRQF_SHARED, DRV_NAME, priv);
  3392. if (err) {
  3393. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3394. goto out_disable_msi;
  3395. }
  3396. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3397. if (err) {
  3398. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3399. goto out_release_irq;
  3400. }
  3401. iwl_legacy_set_rxon_channel(priv,
  3402. &priv->bands[IEEE80211_BAND_2GHZ].channels[5],
  3403. &priv->contexts[IWL_RXON_CTX_BSS]);
  3404. iwl3945_setup_deferred_work(priv);
  3405. iwl3945_setup_rx_handlers(priv);
  3406. iwl_legacy_power_initialize(priv);
  3407. /*********************************
  3408. * 8. Setup and Register mac80211
  3409. * *******************************/
  3410. iwl_legacy_enable_interrupts(priv);
  3411. err = iwl3945_setup_mac(priv);
  3412. if (err)
  3413. goto out_remove_sysfs;
  3414. err = iwl_legacy_dbgfs_register(priv, DRV_NAME);
  3415. if (err)
  3416. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3417. /* Start monitoring the killswitch */
  3418. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  3419. 2 * HZ);
  3420. return 0;
  3421. out_remove_sysfs:
  3422. destroy_workqueue(priv->workqueue);
  3423. priv->workqueue = NULL;
  3424. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3425. out_release_irq:
  3426. free_irq(priv->pci_dev->irq, priv);
  3427. out_disable_msi:
  3428. pci_disable_msi(priv->pci_dev);
  3429. iwl_legacy_free_geos(priv);
  3430. iwl_legacy_free_channel_map(priv);
  3431. out_unset_hw_params:
  3432. iwl3945_unset_hw_params(priv);
  3433. out_eeprom_free:
  3434. iwl_legacy_eeprom_free(priv);
  3435. out_iounmap:
  3436. pci_iounmap(pdev, priv->hw_base);
  3437. out_pci_release_regions:
  3438. pci_release_regions(pdev);
  3439. out_pci_disable_device:
  3440. pci_set_drvdata(pdev, NULL);
  3441. pci_disable_device(pdev);
  3442. out_ieee80211_free_hw:
  3443. iwl_legacy_free_traffic_mem(priv);
  3444. ieee80211_free_hw(priv->hw);
  3445. out:
  3446. return err;
  3447. }
  3448. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3449. {
  3450. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3451. unsigned long flags;
  3452. if (!priv)
  3453. return;
  3454. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3455. iwl_legacy_dbgfs_unregister(priv);
  3456. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3457. iwl_legacy_leds_exit(priv);
  3458. if (priv->mac80211_registered) {
  3459. ieee80211_unregister_hw(priv->hw);
  3460. priv->mac80211_registered = 0;
  3461. } else {
  3462. iwl3945_down(priv);
  3463. }
  3464. /*
  3465. * Make sure device is reset to low power before unloading driver.
  3466. * This may be redundant with iwl_down(), but there are paths to
  3467. * run iwl_down() without calling apm_ops.stop(), and there are
  3468. * paths to avoid running iwl_down() at all before leaving driver.
  3469. * This (inexpensive) call *makes sure* device is reset.
  3470. */
  3471. iwl_legacy_apm_stop(priv);
  3472. /* make sure we flush any pending irq or
  3473. * tasklet for the driver
  3474. */
  3475. spin_lock_irqsave(&priv->lock, flags);
  3476. iwl_legacy_disable_interrupts(priv);
  3477. spin_unlock_irqrestore(&priv->lock, flags);
  3478. iwl3945_synchronize_irq(priv);
  3479. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3480. cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
  3481. iwl3945_dealloc_ucode_pci(priv);
  3482. if (priv->rxq.bd)
  3483. iwl3945_rx_queue_free(priv, &priv->rxq);
  3484. iwl3945_hw_txq_ctx_free(priv);
  3485. iwl3945_unset_hw_params(priv);
  3486. /*netif_stop_queue(dev); */
  3487. flush_workqueue(priv->workqueue);
  3488. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3489. * priv->workqueue... so we can't take down the workqueue
  3490. * until now... */
  3491. destroy_workqueue(priv->workqueue);
  3492. priv->workqueue = NULL;
  3493. iwl_legacy_free_traffic_mem(priv);
  3494. free_irq(pdev->irq, priv);
  3495. pci_disable_msi(pdev);
  3496. pci_iounmap(pdev, priv->hw_base);
  3497. pci_release_regions(pdev);
  3498. pci_disable_device(pdev);
  3499. pci_set_drvdata(pdev, NULL);
  3500. iwl_legacy_free_channel_map(priv);
  3501. iwl_legacy_free_geos(priv);
  3502. kfree(priv->scan_cmd);
  3503. if (priv->beacon_skb)
  3504. dev_kfree_skb(priv->beacon_skb);
  3505. ieee80211_free_hw(priv->hw);
  3506. }
  3507. /*****************************************************************************
  3508. *
  3509. * driver and module entry point
  3510. *
  3511. *****************************************************************************/
  3512. static struct pci_driver iwl3945_driver = {
  3513. .name = DRV_NAME,
  3514. .id_table = iwl3945_hw_card_ids,
  3515. .probe = iwl3945_pci_probe,
  3516. .remove = __devexit_p(iwl3945_pci_remove),
  3517. .driver.pm = IWL_LEGACY_PM_OPS,
  3518. };
  3519. static int __init iwl3945_init(void)
  3520. {
  3521. int ret;
  3522. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3523. pr_info(DRV_COPYRIGHT "\n");
  3524. ret = iwl3945_rate_control_register();
  3525. if (ret) {
  3526. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3527. return ret;
  3528. }
  3529. ret = pci_register_driver(&iwl3945_driver);
  3530. if (ret) {
  3531. pr_err("Unable to initialize PCI module\n");
  3532. goto error_register;
  3533. }
  3534. return ret;
  3535. error_register:
  3536. iwl3945_rate_control_unregister();
  3537. return ret;
  3538. }
  3539. static void __exit iwl3945_exit(void)
  3540. {
  3541. pci_unregister_driver(&iwl3945_driver);
  3542. iwl3945_rate_control_unregister();
  3543. }
  3544. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3545. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3546. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3547. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3548. MODULE_PARM_DESC(swcrypto,
  3549. "using software crypto (default 1 [software])");
  3550. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3551. int, S_IRUGO);
  3552. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3553. #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
  3554. module_param_named(debug, iwlegacy_debug_level, uint, S_IRUGO | S_IWUSR);
  3555. MODULE_PARM_DESC(debug, "debug output mask");
  3556. #endif
  3557. module_param_named(fw_restart, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3558. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3559. module_exit(iwl3945_exit);
  3560. module_init(iwl3945_init);