ab8500-gpadc.c 18 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Arun R Murthy <arun.murthy@stericsson.com>
  6. * Author: Daniel Willerud <daniel.willerud@stericsson.com>
  7. * Author: Johan Palsson <johan.palsson@stericsson.com>
  8. */
  9. #include <linux/init.h>
  10. #include <linux/module.h>
  11. #include <linux/device.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/delay.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/completion.h>
  17. #include <linux/regulator/consumer.h>
  18. #include <linux/err.h>
  19. #include <linux/slab.h>
  20. #include <linux/list.h>
  21. #include <linux/mfd/ab8500.h>
  22. #include <linux/mfd/abx500.h>
  23. #include <linux/mfd/ab8500/gpadc.h>
  24. /*
  25. * GPADC register offsets
  26. * Bank : 0x0A
  27. */
  28. #define AB8500_GPADC_CTRL1_REG 0x00
  29. #define AB8500_GPADC_CTRL2_REG 0x01
  30. #define AB8500_GPADC_CTRL3_REG 0x02
  31. #define AB8500_GPADC_AUTO_TIMER_REG 0x03
  32. #define AB8500_GPADC_STAT_REG 0x04
  33. #define AB8500_GPADC_MANDATAL_REG 0x05
  34. #define AB8500_GPADC_MANDATAH_REG 0x06
  35. #define AB8500_GPADC_AUTODATAL_REG 0x07
  36. #define AB8500_GPADC_AUTODATAH_REG 0x08
  37. #define AB8500_GPADC_MUX_CTRL_REG 0x09
  38. /*
  39. * OTP register offsets
  40. * Bank : 0x15
  41. */
  42. #define AB8500_GPADC_CAL_1 0x0F
  43. #define AB8500_GPADC_CAL_2 0x10
  44. #define AB8500_GPADC_CAL_3 0x11
  45. #define AB8500_GPADC_CAL_4 0x12
  46. #define AB8500_GPADC_CAL_5 0x13
  47. #define AB8500_GPADC_CAL_6 0x14
  48. #define AB8500_GPADC_CAL_7 0x15
  49. /* gpadc constants */
  50. #define EN_VINTCORE12 0x04
  51. #define EN_VTVOUT 0x02
  52. #define EN_GPADC 0x01
  53. #define DIS_GPADC 0x00
  54. #define SW_AVG_16 0x60
  55. #define ADC_SW_CONV 0x04
  56. #define EN_ICHAR 0x80
  57. #define BTEMP_PULL_UP 0x08
  58. #define EN_BUF 0x40
  59. #define DIS_ZERO 0x00
  60. #define GPADC_BUSY 0x01
  61. /* GPADC constants from AB8500 spec, UM0836 */
  62. #define ADC_RESOLUTION 1024
  63. #define ADC_CH_BTEMP_MIN 0
  64. #define ADC_CH_BTEMP_MAX 1350
  65. #define ADC_CH_DIETEMP_MIN 0
  66. #define ADC_CH_DIETEMP_MAX 1350
  67. #define ADC_CH_CHG_V_MIN 0
  68. #define ADC_CH_CHG_V_MAX 20030
  69. #define ADC_CH_ACCDET2_MIN 0
  70. #define ADC_CH_ACCDET2_MAX 2500
  71. #define ADC_CH_VBAT_MIN 2300
  72. #define ADC_CH_VBAT_MAX 4800
  73. #define ADC_CH_CHG_I_MIN 0
  74. #define ADC_CH_CHG_I_MAX 1500
  75. #define ADC_CH_BKBAT_MIN 0
  76. #define ADC_CH_BKBAT_MAX 3200
  77. /* This is used to not lose precision when dividing to get gain and offset */
  78. #define CALIB_SCALE 1000
  79. enum cal_channels {
  80. ADC_INPUT_VMAIN = 0,
  81. ADC_INPUT_BTEMP,
  82. ADC_INPUT_VBAT,
  83. NBR_CAL_INPUTS,
  84. };
  85. /**
  86. * struct adc_cal_data - Table for storing gain and offset for the calibrated
  87. * ADC channels
  88. * @gain: Gain of the ADC channel
  89. * @offset: Offset of the ADC channel
  90. */
  91. struct adc_cal_data {
  92. u64 gain;
  93. u64 offset;
  94. };
  95. /**
  96. * struct ab8500_gpadc - AB8500 GPADC device information
  97. * @chip_id ABB chip id
  98. * @dev: pointer to the struct device
  99. * @node: a list of AB8500 GPADCs, hence prepared for
  100. reentrance
  101. * @ab8500_gpadc_complete: pointer to the struct completion, to indicate
  102. * the completion of gpadc conversion
  103. * @ab8500_gpadc_lock: structure of type mutex
  104. * @regu: pointer to the struct regulator
  105. * @irq: interrupt number that is used by gpadc
  106. * @cal_data array of ADC calibration data structs
  107. */
  108. struct ab8500_gpadc {
  109. u8 chip_id;
  110. struct device *dev;
  111. struct list_head node;
  112. struct completion ab8500_gpadc_complete;
  113. struct mutex ab8500_gpadc_lock;
  114. struct regulator *regu;
  115. int irq;
  116. struct adc_cal_data cal_data[NBR_CAL_INPUTS];
  117. };
  118. static LIST_HEAD(ab8500_gpadc_list);
  119. /**
  120. * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
  121. * (i.e. the first GPADC in the instance list)
  122. */
  123. struct ab8500_gpadc *ab8500_gpadc_get(char *name)
  124. {
  125. struct ab8500_gpadc *gpadc;
  126. list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
  127. if (!strcmp(name, dev_name(gpadc->dev)))
  128. return gpadc;
  129. }
  130. return ERR_PTR(-ENOENT);
  131. }
  132. EXPORT_SYMBOL(ab8500_gpadc_get);
  133. static int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 input,
  134. int ad_value)
  135. {
  136. int res;
  137. switch (input) {
  138. case MAIN_CHARGER_V:
  139. /* For some reason we don't have calibrated data */
  140. if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
  141. res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
  142. ADC_CH_CHG_V_MIN) * ad_value /
  143. ADC_RESOLUTION;
  144. break;
  145. }
  146. /* Here we can use the calibrated data */
  147. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
  148. gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
  149. break;
  150. case BAT_CTRL:
  151. case BTEMP_BALL:
  152. case ACC_DETECT1:
  153. case ADC_AUX1:
  154. case ADC_AUX2:
  155. /* For some reason we don't have calibrated data */
  156. if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
  157. res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
  158. ADC_CH_BTEMP_MIN) * ad_value /
  159. ADC_RESOLUTION;
  160. break;
  161. }
  162. /* Here we can use the calibrated data */
  163. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
  164. gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
  165. break;
  166. case MAIN_BAT_V:
  167. /* For some reason we don't have calibrated data */
  168. if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
  169. res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
  170. ADC_CH_VBAT_MIN) * ad_value /
  171. ADC_RESOLUTION;
  172. break;
  173. }
  174. /* Here we can use the calibrated data */
  175. res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
  176. gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
  177. break;
  178. case DIE_TEMP:
  179. res = ADC_CH_DIETEMP_MIN +
  180. (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
  181. ADC_RESOLUTION;
  182. break;
  183. case ACC_DETECT2:
  184. res = ADC_CH_ACCDET2_MIN +
  185. (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
  186. ADC_RESOLUTION;
  187. break;
  188. case VBUS_V:
  189. res = ADC_CH_CHG_V_MIN +
  190. (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
  191. ADC_RESOLUTION;
  192. break;
  193. case MAIN_CHARGER_C:
  194. case USB_CHARGER_C:
  195. res = ADC_CH_CHG_I_MIN +
  196. (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
  197. ADC_RESOLUTION;
  198. break;
  199. case BK_BAT_V:
  200. res = ADC_CH_BKBAT_MIN +
  201. (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
  202. ADC_RESOLUTION;
  203. break;
  204. default:
  205. dev_err(gpadc->dev,
  206. "unknown channel, not possible to convert\n");
  207. res = -EINVAL;
  208. break;
  209. }
  210. return res;
  211. }
  212. /**
  213. * ab8500_gpadc_convert() - gpadc conversion
  214. * @input: analog input to be converted to digital data
  215. *
  216. * This function converts the selected analog i/p to digital
  217. * data.
  218. */
  219. int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 input)
  220. {
  221. int ret;
  222. u16 data = 0;
  223. int looplimit = 0;
  224. u8 val, low_data, high_data;
  225. if (!gpadc)
  226. return -ENODEV;
  227. mutex_lock(&gpadc->ab8500_gpadc_lock);
  228. /* Enable VTVout LDO this is required for GPADC */
  229. regulator_enable(gpadc->regu);
  230. /* Check if ADC is not busy, lock and proceed */
  231. do {
  232. ret = abx500_get_register_interruptible(gpadc->dev,
  233. AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
  234. if (ret < 0)
  235. goto out;
  236. if (!(val & GPADC_BUSY))
  237. break;
  238. msleep(10);
  239. } while (++looplimit < 10);
  240. if (looplimit >= 10 && (val & GPADC_BUSY)) {
  241. dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
  242. ret = -EINVAL;
  243. goto out;
  244. }
  245. /* Enable GPADC */
  246. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  247. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
  248. if (ret < 0) {
  249. dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
  250. goto out;
  251. }
  252. /* Select the input source and set average samples to 16 */
  253. ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  254. AB8500_GPADC_CTRL2_REG, (input | SW_AVG_16));
  255. if (ret < 0) {
  256. dev_err(gpadc->dev,
  257. "gpadc_conversion: set avg samples failed\n");
  258. goto out;
  259. }
  260. /*
  261. * Enable ADC, buffering, select rising edge and enable ADC path
  262. * charging current sense if it needed, ABB 3.0 needs some special
  263. * treatment too.
  264. */
  265. switch (input) {
  266. case MAIN_CHARGER_C:
  267. case USB_CHARGER_C:
  268. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  269. AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
  270. EN_BUF | EN_ICHAR,
  271. EN_BUF | EN_ICHAR);
  272. break;
  273. case BTEMP_BALL:
  274. if (gpadc->chip_id >= AB8500_CUT3P0) {
  275. /* Turn on btemp pull-up on ABB 3.0 */
  276. ret = abx500_mask_and_set_register_interruptible(
  277. gpadc->dev,
  278. AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
  279. EN_BUF | BTEMP_PULL_UP,
  280. EN_BUF | BTEMP_PULL_UP);
  281. /*
  282. * Delay might be needed for ABB8500 cut 3.0, if not, remove
  283. * when hardware will be availible
  284. */
  285. msleep(1);
  286. break;
  287. }
  288. /* Intentional fallthrough */
  289. default:
  290. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  291. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
  292. break;
  293. }
  294. if (ret < 0) {
  295. dev_err(gpadc->dev,
  296. "gpadc_conversion: select falling edge failed\n");
  297. goto out;
  298. }
  299. ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
  300. AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
  301. if (ret < 0) {
  302. dev_err(gpadc->dev,
  303. "gpadc_conversion: start s/w conversion failed\n");
  304. goto out;
  305. }
  306. /* wait for completion of conversion */
  307. if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete, 2*HZ)) {
  308. dev_err(gpadc->dev,
  309. "timeout: didn't receive GPADC conversion interrupt\n");
  310. ret = -EINVAL;
  311. goto out;
  312. }
  313. /* Read the converted RAW data */
  314. ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
  315. AB8500_GPADC_MANDATAL_REG, &low_data);
  316. if (ret < 0) {
  317. dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
  318. goto out;
  319. }
  320. ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
  321. AB8500_GPADC_MANDATAH_REG, &high_data);
  322. if (ret < 0) {
  323. dev_err(gpadc->dev,
  324. "gpadc_conversion: read high data failed\n");
  325. goto out;
  326. }
  327. data = (high_data << 8) | low_data;
  328. /* Disable GPADC */
  329. ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  330. AB8500_GPADC_CTRL1_REG, DIS_GPADC);
  331. if (ret < 0) {
  332. dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
  333. goto out;
  334. }
  335. /* Disable VTVout LDO this is required for GPADC */
  336. regulator_disable(gpadc->regu);
  337. mutex_unlock(&gpadc->ab8500_gpadc_lock);
  338. ret = ab8500_gpadc_ad_to_voltage(gpadc, input, data);
  339. return ret;
  340. out:
  341. /*
  342. * It has shown to be needed to turn off the GPADC if an error occurs,
  343. * otherwise we might have problem when waiting for the busy bit in the
  344. * GPADC status register to go low. In V1.1 there wait_for_completion
  345. * seems to timeout when waiting for an interrupt.. Not seen in V2.0
  346. */
  347. (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
  348. AB8500_GPADC_CTRL1_REG, DIS_GPADC);
  349. regulator_disable(gpadc->regu);
  350. mutex_unlock(&gpadc->ab8500_gpadc_lock);
  351. dev_err(gpadc->dev,
  352. "gpadc_conversion: Failed to AD convert channel %d\n", input);
  353. return ret;
  354. }
  355. EXPORT_SYMBOL(ab8500_gpadc_convert);
  356. /**
  357. * ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
  358. * @irq: irq number
  359. * @data: pointer to the data passed during request irq
  360. *
  361. * This is a interrupt service routine for s/w gpadc conversion completion.
  362. * Notifies the gpadc completion is completed and the converted raw value
  363. * can be read from the registers.
  364. * Returns IRQ status(IRQ_HANDLED)
  365. */
  366. static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
  367. {
  368. struct ab8500_gpadc *gpadc = _gpadc;
  369. complete(&gpadc->ab8500_gpadc_complete);
  370. return IRQ_HANDLED;
  371. }
  372. static int otp_cal_regs[] = {
  373. AB8500_GPADC_CAL_1,
  374. AB8500_GPADC_CAL_2,
  375. AB8500_GPADC_CAL_3,
  376. AB8500_GPADC_CAL_4,
  377. AB8500_GPADC_CAL_5,
  378. AB8500_GPADC_CAL_6,
  379. AB8500_GPADC_CAL_7,
  380. };
  381. static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
  382. {
  383. int i;
  384. int ret[ARRAY_SIZE(otp_cal_regs)];
  385. u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
  386. int vmain_high, vmain_low;
  387. int btemp_high, btemp_low;
  388. int vbat_high, vbat_low;
  389. /* First we read all OTP registers and store the error code */
  390. for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
  391. ret[i] = abx500_get_register_interruptible(gpadc->dev,
  392. AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
  393. if (ret[i] < 0)
  394. dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
  395. __func__, otp_cal_regs[i]);
  396. }
  397. /*
  398. * The ADC calibration data is stored in OTP registers.
  399. * The layout of the calibration data is outlined below and a more
  400. * detailed description can be found in UM0836
  401. *
  402. * vm_h/l = vmain_high/low
  403. * bt_h/l = btemp_high/low
  404. * vb_h/l = vbat_high/low
  405. *
  406. * Data bits:
  407. * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
  408. * |.......|.......|.......|.......|.......|.......|.......|.......
  409. * | | vm_h9 | vm_h8
  410. * |.......|.......|.......|.......|.......|.......|.......|.......
  411. * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
  412. * |.......|.......|.......|.......|.......|.......|.......|.......
  413. * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
  414. * |.......|.......|.......|.......|.......|.......|.......|.......
  415. * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
  416. * |.......|.......|.......|.......|.......|.......|.......|.......
  417. * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
  418. * |.......|.......|.......|.......|.......|.......|.......|.......
  419. * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
  420. * |.......|.......|.......|.......|.......|.......|.......|.......
  421. * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
  422. * |.......|.......|.......|.......|.......|.......|.......|.......
  423. *
  424. *
  425. * Ideal output ADC codes corresponding to injected input voltages
  426. * during manufacturing is:
  427. *
  428. * vmain_high: Vin = 19500mV / ADC ideal code = 997
  429. * vmain_low: Vin = 315mV / ADC ideal code = 16
  430. * btemp_high: Vin = 1300mV / ADC ideal code = 985
  431. * btemp_low: Vin = 21mV / ADC ideal code = 16
  432. * vbat_high: Vin = 4700mV / ADC ideal code = 982
  433. * vbat_low: Vin = 2380mV / ADC ideal code = 33
  434. */
  435. /* Calculate gain and offset for VMAIN if all reads succeeded */
  436. if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
  437. vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
  438. ((gpadc_cal[1] & 0x3F) << 2) |
  439. ((gpadc_cal[2] & 0xC0) >> 6));
  440. vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
  441. gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
  442. (19500 - 315) / (vmain_high - vmain_low);
  443. gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
  444. (CALIB_SCALE * (19500 - 315) /
  445. (vmain_high - vmain_low)) * vmain_high;
  446. } else {
  447. gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
  448. }
  449. /* Calculate gain and offset for BTEMP if all reads succeeded */
  450. if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
  451. btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
  452. (gpadc_cal[3] << 1) |
  453. ((gpadc_cal[4] & 0x80) >> 7));
  454. btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
  455. gpadc->cal_data[ADC_INPUT_BTEMP].gain =
  456. CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
  457. gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
  458. (CALIB_SCALE * (1300 - 21) /
  459. (btemp_high - btemp_low)) * btemp_high;
  460. } else {
  461. gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
  462. }
  463. /* Calculate gain and offset for VBAT if all reads succeeded */
  464. if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
  465. vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
  466. vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
  467. gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
  468. (4700 - 2380) / (vbat_high - vbat_low);
  469. gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
  470. (CALIB_SCALE * (4700 - 2380) /
  471. (vbat_high - vbat_low)) * vbat_high;
  472. } else {
  473. gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
  474. }
  475. dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
  476. gpadc->cal_data[ADC_INPUT_VMAIN].gain,
  477. gpadc->cal_data[ADC_INPUT_VMAIN].offset);
  478. dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
  479. gpadc->cal_data[ADC_INPUT_BTEMP].gain,
  480. gpadc->cal_data[ADC_INPUT_BTEMP].offset);
  481. dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
  482. gpadc->cal_data[ADC_INPUT_VBAT].gain,
  483. gpadc->cal_data[ADC_INPUT_VBAT].offset);
  484. }
  485. static int __devinit ab8500_gpadc_probe(struct platform_device *pdev)
  486. {
  487. int ret = 0;
  488. struct ab8500_gpadc *gpadc;
  489. gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
  490. if (!gpadc) {
  491. dev_err(&pdev->dev, "Error: No memory\n");
  492. return -ENOMEM;
  493. }
  494. gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
  495. if (gpadc->irq < 0) {
  496. dev_err(gpadc->dev, "failed to get platform irq-%d\n",
  497. gpadc->irq);
  498. ret = gpadc->irq;
  499. goto fail;
  500. }
  501. gpadc->dev = &pdev->dev;
  502. mutex_init(&gpadc->ab8500_gpadc_lock);
  503. /* Initialize completion used to notify completion of conversion */
  504. init_completion(&gpadc->ab8500_gpadc_complete);
  505. /* Register interrupt - SwAdcComplete */
  506. ret = request_threaded_irq(gpadc->irq, NULL,
  507. ab8500_bm_gpswadcconvend_handler,
  508. IRQF_NO_SUSPEND | IRQF_SHARED, "ab8500-gpadc", gpadc);
  509. if (ret < 0) {
  510. dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
  511. gpadc->irq);
  512. goto fail;
  513. }
  514. /* Get Chip ID of the ABB ASIC */
  515. ret = abx500_get_chip_id(gpadc->dev);
  516. if (ret < 0) {
  517. dev_err(gpadc->dev, "failed to get chip ID\n");
  518. goto fail_irq;
  519. }
  520. gpadc->chip_id = (u8) ret;
  521. /* VTVout LDO used to power up ab8500-GPADC */
  522. gpadc->regu = regulator_get(&pdev->dev, "vddadc");
  523. if (IS_ERR(gpadc->regu)) {
  524. ret = PTR_ERR(gpadc->regu);
  525. dev_err(gpadc->dev, "failed to get vtvout LDO\n");
  526. goto fail_irq;
  527. }
  528. ab8500_gpadc_read_calibration_data(gpadc);
  529. list_add_tail(&gpadc->node, &ab8500_gpadc_list);
  530. dev_dbg(gpadc->dev, "probe success\n");
  531. return 0;
  532. fail_irq:
  533. free_irq(gpadc->irq, gpadc);
  534. fail:
  535. kfree(gpadc);
  536. gpadc = NULL;
  537. return ret;
  538. }
  539. static int __devexit ab8500_gpadc_remove(struct platform_device *pdev)
  540. {
  541. struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
  542. /* remove this gpadc entry from the list */
  543. list_del(&gpadc->node);
  544. /* remove interrupt - completion of Sw ADC conversion */
  545. free_irq(gpadc->irq, gpadc);
  546. /* disable VTVout LDO that is being used by GPADC */
  547. regulator_put(gpadc->regu);
  548. kfree(gpadc);
  549. gpadc = NULL;
  550. return 0;
  551. }
  552. static struct platform_driver ab8500_gpadc_driver = {
  553. .probe = ab8500_gpadc_probe,
  554. .remove = __devexit_p(ab8500_gpadc_remove),
  555. .driver = {
  556. .name = "ab8500-gpadc",
  557. .owner = THIS_MODULE,
  558. },
  559. };
  560. static int __init ab8500_gpadc_init(void)
  561. {
  562. return platform_driver_register(&ab8500_gpadc_driver);
  563. }
  564. static void __exit ab8500_gpadc_exit(void)
  565. {
  566. platform_driver_unregister(&ab8500_gpadc_driver);
  567. }
  568. subsys_initcall_sync(ab8500_gpadc_init);
  569. module_exit(ab8500_gpadc_exit);
  570. MODULE_LICENSE("GPL v2");
  571. MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
  572. MODULE_ALIAS("platform:ab8500_gpadc");
  573. MODULE_DESCRIPTION("AB8500 GPADC driver");