ab3100-core.c 22 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025
  1. /*
  2. * Copyright (C) 2007-2010 ST-Ericsson
  3. * License terms: GNU General Public License (GPL) version 2
  4. * Low-level core for exclusive access to the AB3100 IC on the I2C bus
  5. * and some basic chip-configuration.
  6. * Author: Linus Walleij <linus.walleij@stericsson.com>
  7. */
  8. #include <linux/i2c.h>
  9. #include <linux/mutex.h>
  10. #include <linux/list.h>
  11. #include <linux/notifier.h>
  12. #include <linux/slab.h>
  13. #include <linux/err.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/device.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/random.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/uaccess.h>
  21. #include <linux/mfd/core.h>
  22. #include <linux/mfd/abx500.h>
  23. /* These are the only registers inside AB3100 used in this main file */
  24. /* Interrupt event registers */
  25. #define AB3100_EVENTA1 0x21
  26. #define AB3100_EVENTA2 0x22
  27. #define AB3100_EVENTA3 0x23
  28. /* AB3100 DAC converter registers */
  29. #define AB3100_DIS 0x00
  30. #define AB3100_D0C 0x01
  31. #define AB3100_D1C 0x02
  32. #define AB3100_D2C 0x03
  33. #define AB3100_D3C 0x04
  34. /* Chip ID register */
  35. #define AB3100_CID 0x20
  36. /* AB3100 interrupt registers */
  37. #define AB3100_IMRA1 0x24
  38. #define AB3100_IMRA2 0x25
  39. #define AB3100_IMRA3 0x26
  40. #define AB3100_IMRB1 0x2B
  41. #define AB3100_IMRB2 0x2C
  42. #define AB3100_IMRB3 0x2D
  43. /* System Power Monitoring and control registers */
  44. #define AB3100_MCA 0x2E
  45. #define AB3100_MCB 0x2F
  46. /* SIM power up */
  47. #define AB3100_SUP 0x50
  48. /*
  49. * I2C communication
  50. *
  51. * The AB3100 is usually assigned address 0x48 (7-bit)
  52. * The chip is defined in the platform i2c_board_data section.
  53. */
  54. static int ab3100_get_chip_id(struct device *dev)
  55. {
  56. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  57. return (int)ab3100->chip_id;
  58. }
  59. static int ab3100_set_register_interruptible(struct ab3100 *ab3100,
  60. u8 reg, u8 regval)
  61. {
  62. u8 regandval[2] = {reg, regval};
  63. int err;
  64. err = mutex_lock_interruptible(&ab3100->access_mutex);
  65. if (err)
  66. return err;
  67. /*
  68. * A two-byte write message with the first byte containing the register
  69. * number and the second byte containing the value to be written
  70. * effectively sets a register in the AB3100.
  71. */
  72. err = i2c_master_send(ab3100->i2c_client, regandval, 2);
  73. if (err < 0) {
  74. dev_err(ab3100->dev,
  75. "write error (write register): %d\n",
  76. err);
  77. } else if (err != 2) {
  78. dev_err(ab3100->dev,
  79. "write error (write register) "
  80. "%d bytes transferred (expected 2)\n",
  81. err);
  82. err = -EIO;
  83. } else {
  84. /* All is well */
  85. err = 0;
  86. }
  87. mutex_unlock(&ab3100->access_mutex);
  88. return err;
  89. }
  90. static int set_register_interruptible(struct device *dev,
  91. u8 bank, u8 reg, u8 value)
  92. {
  93. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  94. return ab3100_set_register_interruptible(ab3100, reg, value);
  95. }
  96. /*
  97. * The test registers exist at an I2C bus address up one
  98. * from the ordinary base. They are not supposed to be used
  99. * in production code, but sometimes you have to do that
  100. * anyway. It's currently only used from this file so declare
  101. * it static and do not export.
  102. */
  103. static int ab3100_set_test_register_interruptible(struct ab3100 *ab3100,
  104. u8 reg, u8 regval)
  105. {
  106. u8 regandval[2] = {reg, regval};
  107. int err;
  108. err = mutex_lock_interruptible(&ab3100->access_mutex);
  109. if (err)
  110. return err;
  111. err = i2c_master_send(ab3100->testreg_client, regandval, 2);
  112. if (err < 0) {
  113. dev_err(ab3100->dev,
  114. "write error (write test register): %d\n",
  115. err);
  116. } else if (err != 2) {
  117. dev_err(ab3100->dev,
  118. "write error (write test register) "
  119. "%d bytes transferred (expected 2)\n",
  120. err);
  121. err = -EIO;
  122. } else {
  123. /* All is well */
  124. err = 0;
  125. }
  126. mutex_unlock(&ab3100->access_mutex);
  127. return err;
  128. }
  129. static int ab3100_get_register_interruptible(struct ab3100 *ab3100,
  130. u8 reg, u8 *regval)
  131. {
  132. int err;
  133. err = mutex_lock_interruptible(&ab3100->access_mutex);
  134. if (err)
  135. return err;
  136. /*
  137. * AB3100 require an I2C "stop" command between each message, else
  138. * it will not work. The only way of achieveing this with the
  139. * message transport layer is to send the read and write messages
  140. * separately.
  141. */
  142. err = i2c_master_send(ab3100->i2c_client, &reg, 1);
  143. if (err < 0) {
  144. dev_err(ab3100->dev,
  145. "write error (send register address): %d\n",
  146. err);
  147. goto get_reg_out_unlock;
  148. } else if (err != 1) {
  149. dev_err(ab3100->dev,
  150. "write error (send register address) "
  151. "%d bytes transferred (expected 1)\n",
  152. err);
  153. err = -EIO;
  154. goto get_reg_out_unlock;
  155. } else {
  156. /* All is well */
  157. err = 0;
  158. }
  159. err = i2c_master_recv(ab3100->i2c_client, regval, 1);
  160. if (err < 0) {
  161. dev_err(ab3100->dev,
  162. "write error (read register): %d\n",
  163. err);
  164. goto get_reg_out_unlock;
  165. } else if (err != 1) {
  166. dev_err(ab3100->dev,
  167. "write error (read register) "
  168. "%d bytes transferred (expected 1)\n",
  169. err);
  170. err = -EIO;
  171. goto get_reg_out_unlock;
  172. } else {
  173. /* All is well */
  174. err = 0;
  175. }
  176. get_reg_out_unlock:
  177. mutex_unlock(&ab3100->access_mutex);
  178. return err;
  179. }
  180. static int get_register_interruptible(struct device *dev, u8 bank, u8 reg,
  181. u8 *value)
  182. {
  183. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  184. return ab3100_get_register_interruptible(ab3100, reg, value);
  185. }
  186. static int ab3100_get_register_page_interruptible(struct ab3100 *ab3100,
  187. u8 first_reg, u8 *regvals, u8 numregs)
  188. {
  189. int err;
  190. if (ab3100->chip_id == 0xa0 ||
  191. ab3100->chip_id == 0xa1)
  192. /* These don't support paged reads */
  193. return -EIO;
  194. err = mutex_lock_interruptible(&ab3100->access_mutex);
  195. if (err)
  196. return err;
  197. /*
  198. * Paged read also require an I2C "stop" command.
  199. */
  200. err = i2c_master_send(ab3100->i2c_client, &first_reg, 1);
  201. if (err < 0) {
  202. dev_err(ab3100->dev,
  203. "write error (send first register address): %d\n",
  204. err);
  205. goto get_reg_page_out_unlock;
  206. } else if (err != 1) {
  207. dev_err(ab3100->dev,
  208. "write error (send first register address) "
  209. "%d bytes transferred (expected 1)\n",
  210. err);
  211. err = -EIO;
  212. goto get_reg_page_out_unlock;
  213. }
  214. err = i2c_master_recv(ab3100->i2c_client, regvals, numregs);
  215. if (err < 0) {
  216. dev_err(ab3100->dev,
  217. "write error (read register page): %d\n",
  218. err);
  219. goto get_reg_page_out_unlock;
  220. } else if (err != numregs) {
  221. dev_err(ab3100->dev,
  222. "write error (read register page) "
  223. "%d bytes transferred (expected %d)\n",
  224. err, numregs);
  225. err = -EIO;
  226. goto get_reg_page_out_unlock;
  227. }
  228. /* All is well */
  229. err = 0;
  230. get_reg_page_out_unlock:
  231. mutex_unlock(&ab3100->access_mutex);
  232. return err;
  233. }
  234. static int get_register_page_interruptible(struct device *dev, u8 bank,
  235. u8 first_reg, u8 *regvals, u8 numregs)
  236. {
  237. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  238. return ab3100_get_register_page_interruptible(ab3100,
  239. first_reg, regvals, numregs);
  240. }
  241. static int ab3100_mask_and_set_register_interruptible(struct ab3100 *ab3100,
  242. u8 reg, u8 andmask, u8 ormask)
  243. {
  244. u8 regandval[2] = {reg, 0};
  245. int err;
  246. err = mutex_lock_interruptible(&ab3100->access_mutex);
  247. if (err)
  248. return err;
  249. /* First read out the target register */
  250. err = i2c_master_send(ab3100->i2c_client, &reg, 1);
  251. if (err < 0) {
  252. dev_err(ab3100->dev,
  253. "write error (maskset send address): %d\n",
  254. err);
  255. goto get_maskset_unlock;
  256. } else if (err != 1) {
  257. dev_err(ab3100->dev,
  258. "write error (maskset send address) "
  259. "%d bytes transferred (expected 1)\n",
  260. err);
  261. err = -EIO;
  262. goto get_maskset_unlock;
  263. }
  264. err = i2c_master_recv(ab3100->i2c_client, &regandval[1], 1);
  265. if (err < 0) {
  266. dev_err(ab3100->dev,
  267. "write error (maskset read register): %d\n",
  268. err);
  269. goto get_maskset_unlock;
  270. } else if (err != 1) {
  271. dev_err(ab3100->dev,
  272. "write error (maskset read register) "
  273. "%d bytes transferred (expected 1)\n",
  274. err);
  275. err = -EIO;
  276. goto get_maskset_unlock;
  277. }
  278. /* Modify the register */
  279. regandval[1] &= andmask;
  280. regandval[1] |= ormask;
  281. /* Write the register */
  282. err = i2c_master_send(ab3100->i2c_client, regandval, 2);
  283. if (err < 0) {
  284. dev_err(ab3100->dev,
  285. "write error (write register): %d\n",
  286. err);
  287. goto get_maskset_unlock;
  288. } else if (err != 2) {
  289. dev_err(ab3100->dev,
  290. "write error (write register) "
  291. "%d bytes transferred (expected 2)\n",
  292. err);
  293. err = -EIO;
  294. goto get_maskset_unlock;
  295. }
  296. /* All is well */
  297. err = 0;
  298. get_maskset_unlock:
  299. mutex_unlock(&ab3100->access_mutex);
  300. return err;
  301. }
  302. static int mask_and_set_register_interruptible(struct device *dev, u8 bank,
  303. u8 reg, u8 bitmask, u8 bitvalues)
  304. {
  305. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  306. return ab3100_mask_and_set_register_interruptible(ab3100,
  307. reg, bitmask, (bitmask & bitvalues));
  308. }
  309. /*
  310. * Register a simple callback for handling any AB3100 events.
  311. */
  312. int ab3100_event_register(struct ab3100 *ab3100,
  313. struct notifier_block *nb)
  314. {
  315. return blocking_notifier_chain_register(&ab3100->event_subscribers,
  316. nb);
  317. }
  318. EXPORT_SYMBOL(ab3100_event_register);
  319. /*
  320. * Remove a previously registered callback.
  321. */
  322. int ab3100_event_unregister(struct ab3100 *ab3100,
  323. struct notifier_block *nb)
  324. {
  325. return blocking_notifier_chain_unregister(&ab3100->event_subscribers,
  326. nb);
  327. }
  328. EXPORT_SYMBOL(ab3100_event_unregister);
  329. static int ab3100_event_registers_startup_state_get(struct device *dev,
  330. u8 *event)
  331. {
  332. struct ab3100 *ab3100 = dev_get_drvdata(dev->parent);
  333. if (!ab3100->startup_events_read)
  334. return -EAGAIN; /* Try again later */
  335. memcpy(event, ab3100->startup_events, 3);
  336. return 0;
  337. }
  338. static struct abx500_ops ab3100_ops = {
  339. .get_chip_id = ab3100_get_chip_id,
  340. .set_register = set_register_interruptible,
  341. .get_register = get_register_interruptible,
  342. .get_register_page = get_register_page_interruptible,
  343. .set_register_page = NULL,
  344. .mask_and_set_register = mask_and_set_register_interruptible,
  345. .event_registers_startup_state_get =
  346. ab3100_event_registers_startup_state_get,
  347. .startup_irq_enabled = NULL,
  348. };
  349. /*
  350. * This is a threaded interrupt handler so we can make some
  351. * I2C calls etc.
  352. */
  353. static irqreturn_t ab3100_irq_handler(int irq, void *data)
  354. {
  355. struct ab3100 *ab3100 = data;
  356. u8 event_regs[3];
  357. u32 fatevent;
  358. int err;
  359. add_interrupt_randomness(irq);
  360. err = ab3100_get_register_page_interruptible(ab3100, AB3100_EVENTA1,
  361. event_regs, 3);
  362. if (err)
  363. goto err_event;
  364. fatevent = (event_regs[0] << 16) |
  365. (event_regs[1] << 8) |
  366. event_regs[2];
  367. if (!ab3100->startup_events_read) {
  368. ab3100->startup_events[0] = event_regs[0];
  369. ab3100->startup_events[1] = event_regs[1];
  370. ab3100->startup_events[2] = event_regs[2];
  371. ab3100->startup_events_read = true;
  372. }
  373. /*
  374. * The notified parties will have to mask out the events
  375. * they're interested in and react to them. They will be
  376. * notified on all events, then they use the fatevent value
  377. * to determine if they're interested.
  378. */
  379. blocking_notifier_call_chain(&ab3100->event_subscribers,
  380. fatevent, NULL);
  381. dev_dbg(ab3100->dev,
  382. "IRQ Event: 0x%08x\n", fatevent);
  383. return IRQ_HANDLED;
  384. err_event:
  385. dev_dbg(ab3100->dev,
  386. "error reading event status\n");
  387. return IRQ_HANDLED;
  388. }
  389. #ifdef CONFIG_DEBUG_FS
  390. /*
  391. * Some debugfs entries only exposed if we're using debug
  392. */
  393. static int ab3100_registers_print(struct seq_file *s, void *p)
  394. {
  395. struct ab3100 *ab3100 = s->private;
  396. u8 value;
  397. u8 reg;
  398. seq_printf(s, "AB3100 registers:\n");
  399. for (reg = 0; reg < 0xff; reg++) {
  400. ab3100_get_register_interruptible(ab3100, reg, &value);
  401. seq_printf(s, "[0x%x]: 0x%x\n", reg, value);
  402. }
  403. return 0;
  404. }
  405. static int ab3100_registers_open(struct inode *inode, struct file *file)
  406. {
  407. return single_open(file, ab3100_registers_print, inode->i_private);
  408. }
  409. static const struct file_operations ab3100_registers_fops = {
  410. .open = ab3100_registers_open,
  411. .read = seq_read,
  412. .llseek = seq_lseek,
  413. .release = single_release,
  414. .owner = THIS_MODULE,
  415. };
  416. struct ab3100_get_set_reg_priv {
  417. struct ab3100 *ab3100;
  418. bool mode;
  419. };
  420. static int ab3100_get_set_reg_open_file(struct inode *inode, struct file *file)
  421. {
  422. file->private_data = inode->i_private;
  423. return 0;
  424. }
  425. static ssize_t ab3100_get_set_reg(struct file *file,
  426. const char __user *user_buf,
  427. size_t count, loff_t *ppos)
  428. {
  429. struct ab3100_get_set_reg_priv *priv = file->private_data;
  430. struct ab3100 *ab3100 = priv->ab3100;
  431. char buf[32];
  432. ssize_t buf_size;
  433. int regp;
  434. unsigned long user_reg;
  435. int err;
  436. int i = 0;
  437. /* Get userspace string and assure termination */
  438. buf_size = min(count, (sizeof(buf)-1));
  439. if (copy_from_user(buf, user_buf, buf_size))
  440. return -EFAULT;
  441. buf[buf_size] = 0;
  442. /*
  443. * The idea is here to parse a string which is either
  444. * "0xnn" for reading a register, or "0xaa 0xbb" for
  445. * writing 0xbb to the register 0xaa. First move past
  446. * whitespace and then begin to parse the register.
  447. */
  448. while ((i < buf_size) && (buf[i] == ' '))
  449. i++;
  450. regp = i;
  451. /*
  452. * Advance pointer to end of string then terminate
  453. * the register string. This is needed to satisfy
  454. * the strict_strtoul() function.
  455. */
  456. while ((i < buf_size) && (buf[i] != ' '))
  457. i++;
  458. buf[i] = '\0';
  459. err = strict_strtoul(&buf[regp], 16, &user_reg);
  460. if (err)
  461. return err;
  462. if (user_reg > 0xff)
  463. return -EINVAL;
  464. /* Either we read or we write a register here */
  465. if (!priv->mode) {
  466. /* Reading */
  467. u8 reg = (u8) user_reg;
  468. u8 regvalue;
  469. ab3100_get_register_interruptible(ab3100, reg, &regvalue);
  470. dev_info(ab3100->dev,
  471. "debug read AB3100 reg[0x%02x]: 0x%02x\n",
  472. reg, regvalue);
  473. } else {
  474. int valp;
  475. unsigned long user_value;
  476. u8 reg = (u8) user_reg;
  477. u8 value;
  478. u8 regvalue;
  479. /*
  480. * Writing, we need some value to write to
  481. * the register so keep parsing the string
  482. * from userspace.
  483. */
  484. i++;
  485. while ((i < buf_size) && (buf[i] == ' '))
  486. i++;
  487. valp = i;
  488. while ((i < buf_size) && (buf[i] != ' '))
  489. i++;
  490. buf[i] = '\0';
  491. err = strict_strtoul(&buf[valp], 16, &user_value);
  492. if (err)
  493. return err;
  494. if (user_reg > 0xff)
  495. return -EINVAL;
  496. value = (u8) user_value;
  497. ab3100_set_register_interruptible(ab3100, reg, value);
  498. ab3100_get_register_interruptible(ab3100, reg, &regvalue);
  499. dev_info(ab3100->dev,
  500. "debug write reg[0x%02x] with 0x%02x, "
  501. "after readback: 0x%02x\n",
  502. reg, value, regvalue);
  503. }
  504. return buf_size;
  505. }
  506. static const struct file_operations ab3100_get_set_reg_fops = {
  507. .open = ab3100_get_set_reg_open_file,
  508. .write = ab3100_get_set_reg,
  509. .llseek = noop_llseek,
  510. };
  511. static struct dentry *ab3100_dir;
  512. static struct dentry *ab3100_reg_file;
  513. static struct ab3100_get_set_reg_priv ab3100_get_priv;
  514. static struct dentry *ab3100_get_reg_file;
  515. static struct ab3100_get_set_reg_priv ab3100_set_priv;
  516. static struct dentry *ab3100_set_reg_file;
  517. static void ab3100_setup_debugfs(struct ab3100 *ab3100)
  518. {
  519. int err;
  520. ab3100_dir = debugfs_create_dir("ab3100", NULL);
  521. if (!ab3100_dir)
  522. goto exit_no_debugfs;
  523. ab3100_reg_file = debugfs_create_file("registers",
  524. S_IRUGO, ab3100_dir, ab3100,
  525. &ab3100_registers_fops);
  526. if (!ab3100_reg_file) {
  527. err = -ENOMEM;
  528. goto exit_destroy_dir;
  529. }
  530. ab3100_get_priv.ab3100 = ab3100;
  531. ab3100_get_priv.mode = false;
  532. ab3100_get_reg_file = debugfs_create_file("get_reg",
  533. S_IWUSR, ab3100_dir, &ab3100_get_priv,
  534. &ab3100_get_set_reg_fops);
  535. if (!ab3100_get_reg_file) {
  536. err = -ENOMEM;
  537. goto exit_destroy_reg;
  538. }
  539. ab3100_set_priv.ab3100 = ab3100;
  540. ab3100_set_priv.mode = true;
  541. ab3100_set_reg_file = debugfs_create_file("set_reg",
  542. S_IWUSR, ab3100_dir, &ab3100_set_priv,
  543. &ab3100_get_set_reg_fops);
  544. if (!ab3100_set_reg_file) {
  545. err = -ENOMEM;
  546. goto exit_destroy_get_reg;
  547. }
  548. return;
  549. exit_destroy_get_reg:
  550. debugfs_remove(ab3100_get_reg_file);
  551. exit_destroy_reg:
  552. debugfs_remove(ab3100_reg_file);
  553. exit_destroy_dir:
  554. debugfs_remove(ab3100_dir);
  555. exit_no_debugfs:
  556. return;
  557. }
  558. static inline void ab3100_remove_debugfs(void)
  559. {
  560. debugfs_remove(ab3100_set_reg_file);
  561. debugfs_remove(ab3100_get_reg_file);
  562. debugfs_remove(ab3100_reg_file);
  563. debugfs_remove(ab3100_dir);
  564. }
  565. #else
  566. static inline void ab3100_setup_debugfs(struct ab3100 *ab3100)
  567. {
  568. }
  569. static inline void ab3100_remove_debugfs(void)
  570. {
  571. }
  572. #endif
  573. /*
  574. * Basic set-up, datastructure creation/destruction and I2C interface.
  575. * This sets up a default config in the AB3100 chip so that it
  576. * will work as expected.
  577. */
  578. struct ab3100_init_setting {
  579. u8 abreg;
  580. u8 setting;
  581. };
  582. static const struct ab3100_init_setting __devinitconst
  583. ab3100_init_settings[] = {
  584. {
  585. .abreg = AB3100_MCA,
  586. .setting = 0x01
  587. }, {
  588. .abreg = AB3100_MCB,
  589. .setting = 0x30
  590. }, {
  591. .abreg = AB3100_IMRA1,
  592. .setting = 0x00
  593. }, {
  594. .abreg = AB3100_IMRA2,
  595. .setting = 0xFF
  596. }, {
  597. .abreg = AB3100_IMRA3,
  598. .setting = 0x01
  599. }, {
  600. .abreg = AB3100_IMRB1,
  601. .setting = 0xBF
  602. }, {
  603. .abreg = AB3100_IMRB2,
  604. .setting = 0xFF
  605. }, {
  606. .abreg = AB3100_IMRB3,
  607. .setting = 0xFF
  608. }, {
  609. .abreg = AB3100_SUP,
  610. .setting = 0x00
  611. }, {
  612. .abreg = AB3100_DIS,
  613. .setting = 0xF0
  614. }, {
  615. .abreg = AB3100_D0C,
  616. .setting = 0x00
  617. }, {
  618. .abreg = AB3100_D1C,
  619. .setting = 0x00
  620. }, {
  621. .abreg = AB3100_D2C,
  622. .setting = 0x00
  623. }, {
  624. .abreg = AB3100_D3C,
  625. .setting = 0x00
  626. },
  627. };
  628. static int __devinit ab3100_setup(struct ab3100 *ab3100)
  629. {
  630. int err = 0;
  631. int i;
  632. for (i = 0; i < ARRAY_SIZE(ab3100_init_settings); i++) {
  633. err = ab3100_set_register_interruptible(ab3100,
  634. ab3100_init_settings[i].abreg,
  635. ab3100_init_settings[i].setting);
  636. if (err)
  637. goto exit_no_setup;
  638. }
  639. /*
  640. * Special trick to make the AB3100 use the 32kHz clock (RTC)
  641. * bit 3 in test register 0x02 is a special, undocumented test
  642. * register bit that only exist in AB3100 P1E
  643. */
  644. if (ab3100->chip_id == 0xc4) {
  645. dev_warn(ab3100->dev,
  646. "AB3100 P1E variant detected, "
  647. "forcing chip to 32KHz\n");
  648. err = ab3100_set_test_register_interruptible(ab3100,
  649. 0x02, 0x08);
  650. }
  651. exit_no_setup:
  652. return err;
  653. }
  654. /* The subdevices of the AB3100 */
  655. static struct mfd_cell ab3100_devs[] = {
  656. {
  657. .name = "ab3100-dac",
  658. .id = -1,
  659. },
  660. {
  661. .name = "ab3100-leds",
  662. .id = -1,
  663. },
  664. {
  665. .name = "ab3100-power",
  666. .id = -1,
  667. },
  668. {
  669. .name = "ab3100-regulators",
  670. .id = -1,
  671. },
  672. {
  673. .name = "ab3100-sim",
  674. .id = -1,
  675. },
  676. {
  677. .name = "ab3100-uart",
  678. .id = -1,
  679. },
  680. {
  681. .name = "ab3100-rtc",
  682. .id = -1,
  683. },
  684. {
  685. .name = "ab3100-charger",
  686. .id = -1,
  687. },
  688. {
  689. .name = "ab3100-boost",
  690. .id = -1,
  691. },
  692. {
  693. .name = "ab3100-adc",
  694. .id = -1,
  695. },
  696. {
  697. .name = "ab3100-fuelgauge",
  698. .id = -1,
  699. },
  700. {
  701. .name = "ab3100-vibrator",
  702. .id = -1,
  703. },
  704. {
  705. .name = "ab3100-otp",
  706. .id = -1,
  707. },
  708. {
  709. .name = "ab3100-codec",
  710. .id = -1,
  711. },
  712. };
  713. struct ab_family_id {
  714. u8 id;
  715. char *name;
  716. };
  717. static const struct ab_family_id ids[] __devinitdata = {
  718. /* AB3100 */
  719. {
  720. .id = 0xc0,
  721. .name = "P1A"
  722. }, {
  723. .id = 0xc1,
  724. .name = "P1B"
  725. }, {
  726. .id = 0xc2,
  727. .name = "P1C"
  728. }, {
  729. .id = 0xc3,
  730. .name = "P1D"
  731. }, {
  732. .id = 0xc4,
  733. .name = "P1E"
  734. }, {
  735. .id = 0xc5,
  736. .name = "P1F/R1A"
  737. }, {
  738. .id = 0xc6,
  739. .name = "P1G/R1A"
  740. }, {
  741. .id = 0xc7,
  742. .name = "P2A/R2A"
  743. }, {
  744. .id = 0xc8,
  745. .name = "P2B/R2B"
  746. },
  747. /* AB3000 variants, not supported */
  748. {
  749. .id = 0xa0
  750. }, {
  751. .id = 0xa1
  752. }, {
  753. .id = 0xa2
  754. }, {
  755. .id = 0xa3
  756. }, {
  757. .id = 0xa4
  758. }, {
  759. .id = 0xa5
  760. }, {
  761. .id = 0xa6
  762. }, {
  763. .id = 0xa7
  764. },
  765. /* Terminator */
  766. {
  767. .id = 0x00,
  768. },
  769. };
  770. static int __devinit ab3100_probe(struct i2c_client *client,
  771. const struct i2c_device_id *id)
  772. {
  773. struct ab3100 *ab3100;
  774. struct ab3100_platform_data *ab3100_plf_data =
  775. client->dev.platform_data;
  776. int err;
  777. int i;
  778. ab3100 = kzalloc(sizeof(struct ab3100), GFP_KERNEL);
  779. if (!ab3100) {
  780. dev_err(&client->dev, "could not allocate AB3100 device\n");
  781. return -ENOMEM;
  782. }
  783. /* Initialize data structure */
  784. mutex_init(&ab3100->access_mutex);
  785. BLOCKING_INIT_NOTIFIER_HEAD(&ab3100->event_subscribers);
  786. ab3100->i2c_client = client;
  787. ab3100->dev = &ab3100->i2c_client->dev;
  788. i2c_set_clientdata(client, ab3100);
  789. /* Read chip ID register */
  790. err = ab3100_get_register_interruptible(ab3100, AB3100_CID,
  791. &ab3100->chip_id);
  792. if (err) {
  793. dev_err(&client->dev,
  794. "could not communicate with the AB3100 analog "
  795. "baseband chip\n");
  796. goto exit_no_detect;
  797. }
  798. for (i = 0; ids[i].id != 0x0; i++) {
  799. if (ids[i].id == ab3100->chip_id) {
  800. if (ids[i].name != NULL) {
  801. snprintf(&ab3100->chip_name[0],
  802. sizeof(ab3100->chip_name) - 1,
  803. "AB3100 %s",
  804. ids[i].name);
  805. break;
  806. } else {
  807. dev_err(&client->dev,
  808. "AB3000 is not supported\n");
  809. goto exit_no_detect;
  810. }
  811. }
  812. }
  813. if (ids[i].id == 0x0) {
  814. dev_err(&client->dev, "unknown analog baseband chip id: 0x%x\n",
  815. ab3100->chip_id);
  816. dev_err(&client->dev, "accepting it anyway. Please update "
  817. "the driver.\n");
  818. goto exit_no_detect;
  819. }
  820. dev_info(&client->dev, "Detected chip: %s\n",
  821. &ab3100->chip_name[0]);
  822. /* Attach a second dummy i2c_client to the test register address */
  823. ab3100->testreg_client = i2c_new_dummy(client->adapter,
  824. client->addr + 1);
  825. if (!ab3100->testreg_client) {
  826. err = -ENOMEM;
  827. goto exit_no_testreg_client;
  828. }
  829. err = ab3100_setup(ab3100);
  830. if (err)
  831. goto exit_no_setup;
  832. err = request_threaded_irq(client->irq, NULL, ab3100_irq_handler,
  833. IRQF_ONESHOT, "ab3100-core", ab3100);
  834. /* This real unpredictable IRQ is of course sampled for entropy */
  835. rand_initialize_irq(client->irq);
  836. if (err)
  837. goto exit_no_irq;
  838. err = abx500_register_ops(&client->dev, &ab3100_ops);
  839. if (err)
  840. goto exit_no_ops;
  841. /* Set up and register the platform devices. */
  842. for (i = 0; i < ARRAY_SIZE(ab3100_devs); i++) {
  843. ab3100_devs[i].platform_data = ab3100_plf_data;
  844. ab3100_devs[i].pdata_size = sizeof(struct ab3100_platform_data);
  845. }
  846. err = mfd_add_devices(&client->dev, 0, ab3100_devs,
  847. ARRAY_SIZE(ab3100_devs), NULL, 0);
  848. ab3100_setup_debugfs(ab3100);
  849. return 0;
  850. exit_no_ops:
  851. exit_no_irq:
  852. exit_no_setup:
  853. i2c_unregister_device(ab3100->testreg_client);
  854. exit_no_testreg_client:
  855. exit_no_detect:
  856. kfree(ab3100);
  857. return err;
  858. }
  859. static int __devexit ab3100_remove(struct i2c_client *client)
  860. {
  861. struct ab3100 *ab3100 = i2c_get_clientdata(client);
  862. /* Unregister subdevices */
  863. mfd_remove_devices(&client->dev);
  864. ab3100_remove_debugfs();
  865. i2c_unregister_device(ab3100->testreg_client);
  866. /*
  867. * At this point, all subscribers should have unregistered
  868. * their notifiers so deactivate IRQ
  869. */
  870. free_irq(client->irq, ab3100);
  871. kfree(ab3100);
  872. return 0;
  873. }
  874. static const struct i2c_device_id ab3100_id[] = {
  875. { "ab3100", 0 },
  876. { }
  877. };
  878. MODULE_DEVICE_TABLE(i2c, ab3100_id);
  879. static struct i2c_driver ab3100_driver = {
  880. .driver = {
  881. .name = "ab3100",
  882. .owner = THIS_MODULE,
  883. },
  884. .id_table = ab3100_id,
  885. .probe = ab3100_probe,
  886. .remove = __devexit_p(ab3100_remove),
  887. };
  888. static int __init ab3100_i2c_init(void)
  889. {
  890. return i2c_add_driver(&ab3100_driver);
  891. }
  892. static void __exit ab3100_i2c_exit(void)
  893. {
  894. i2c_del_driver(&ab3100_driver);
  895. }
  896. subsys_initcall(ab3100_i2c_init);
  897. module_exit(ab3100_i2c_exit);
  898. MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
  899. MODULE_DESCRIPTION("AB3100 core driver");
  900. MODULE_LICENSE("GPL");