atbm8830.c 12 KB

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  1. /*
  2. * Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
  3. * ATBM8830, ATBM8831
  4. *
  5. * Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <asm/div64.h>
  22. #include "dvb_frontend.h"
  23. #include "atbm8830.h"
  24. #include "atbm8830_priv.h"
  25. #define dprintk(args...) \
  26. do { \
  27. if (debug) \
  28. printk(KERN_DEBUG "atbm8830: " args); \
  29. } while (0)
  30. static int debug;
  31. module_param(debug, int, 0644);
  32. MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  33. static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data)
  34. {
  35. int ret = 0;
  36. u8 dev_addr;
  37. u8 buf1[] = { reg >> 8, reg & 0xFF };
  38. u8 buf2[] = { data };
  39. struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
  40. struct i2c_msg msg2 = { .flags = 0, .buf = buf2, .len = 1 };
  41. dev_addr = priv->config->demod_address;
  42. msg1.addr = dev_addr;
  43. msg2.addr = dev_addr;
  44. if (debug >= 2)
  45. dprintk("%s: reg=0x%04X, data=0x%02X\n", __func__, reg, data);
  46. ret = i2c_transfer(priv->i2c, &msg1, 1);
  47. if (ret != 1)
  48. return -EIO;
  49. ret = i2c_transfer(priv->i2c, &msg2, 1);
  50. return (ret != 1) ? -EIO : 0;
  51. }
  52. static int atbm8830_read_reg(struct atbm_state *priv, u16 reg, u8 *p_data)
  53. {
  54. int ret;
  55. u8 dev_addr;
  56. u8 buf1[] = { reg >> 8, reg & 0xFF };
  57. u8 buf2[] = { 0 };
  58. struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
  59. struct i2c_msg msg2 = { .flags = I2C_M_RD, .buf = buf2, .len = 1 };
  60. dev_addr = priv->config->demod_address;
  61. msg1.addr = dev_addr;
  62. msg2.addr = dev_addr;
  63. ret = i2c_transfer(priv->i2c, &msg1, 1);
  64. if (ret != 1) {
  65. dprintk("%s: error reg=0x%04x, ret=%i\n", __func__, reg, ret);
  66. return -EIO;
  67. }
  68. ret = i2c_transfer(priv->i2c, &msg2, 1);
  69. if (ret != 1)
  70. return -EIO;
  71. *p_data = buf2[0];
  72. if (debug >= 2)
  73. dprintk("%s: reg=0x%04X, data=0x%02X\n",
  74. __func__, reg, buf2[0]);
  75. return 0;
  76. }
  77. /* Lock register latch so that multi-register read is atomic */
  78. static inline int atbm8830_reglatch_lock(struct atbm_state *priv, int lock)
  79. {
  80. return atbm8830_write_reg(priv, REG_READ_LATCH, lock ? 1 : 0);
  81. }
  82. static int set_osc_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
  83. {
  84. u32 val;
  85. u64 t;
  86. /* 0x100000 * freq / 30.4MHz */
  87. t = (u64)0x100000 * freq;
  88. do_div(t, 30400);
  89. val = t;
  90. atbm8830_write_reg(priv, REG_OSC_CLK, val);
  91. atbm8830_write_reg(priv, REG_OSC_CLK + 1, val >> 8);
  92. atbm8830_write_reg(priv, REG_OSC_CLK + 2, val >> 16);
  93. return 0;
  94. }
  95. static int set_if_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
  96. {
  97. u32 fs = priv->config->osc_clk_freq;
  98. u64 t;
  99. u32 val;
  100. u8 dat;
  101. if (freq != 0) {
  102. /* 2 * PI * (freq - fs) / fs * (2 ^ 22) */
  103. t = (u64) 2 * 31416 * (freq - fs);
  104. t <<= 22;
  105. do_div(t, fs);
  106. do_div(t, 1000);
  107. val = t;
  108. atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 1);
  109. atbm8830_write_reg(priv, REG_IF_FREQ, val);
  110. atbm8830_write_reg(priv, REG_IF_FREQ+1, val >> 8);
  111. atbm8830_write_reg(priv, REG_IF_FREQ+2, val >> 16);
  112. atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
  113. dat &= 0xFC;
  114. atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
  115. } else {
  116. /* Zero IF */
  117. atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 0);
  118. atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
  119. dat &= 0xFC;
  120. dat |= 0x02;
  121. atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
  122. if (priv->config->zif_swap_iq)
  123. atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x03);
  124. else
  125. atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x01);
  126. }
  127. return 0;
  128. }
  129. static int is_locked(struct atbm_state *priv, u8 *locked)
  130. {
  131. u8 status;
  132. atbm8830_read_reg(priv, REG_LOCK_STATUS, &status);
  133. if (locked != NULL)
  134. *locked = (status == 1);
  135. return 0;
  136. }
  137. static int set_agc_config(struct atbm_state *priv,
  138. u8 min, u8 max, u8 hold_loop)
  139. {
  140. /* no effect if both min and max are zero */
  141. if (!min && !max)
  142. return 0;
  143. atbm8830_write_reg(priv, REG_AGC_MIN, min);
  144. atbm8830_write_reg(priv, REG_AGC_MAX, max);
  145. atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop);
  146. return 0;
  147. }
  148. static int set_static_channel_mode(struct atbm_state *priv)
  149. {
  150. int i;
  151. for (i = 0; i < 5; i++)
  152. atbm8830_write_reg(priv, 0x099B + i, 0x08);
  153. atbm8830_write_reg(priv, 0x095B, 0x7F);
  154. atbm8830_write_reg(priv, 0x09CB, 0x01);
  155. atbm8830_write_reg(priv, 0x09CC, 0x7F);
  156. atbm8830_write_reg(priv, 0x09CD, 0x7F);
  157. atbm8830_write_reg(priv, 0x0E01, 0x20);
  158. /* For single carrier */
  159. atbm8830_write_reg(priv, 0x0B03, 0x0A);
  160. atbm8830_write_reg(priv, 0x0935, 0x10);
  161. atbm8830_write_reg(priv, 0x0936, 0x08);
  162. atbm8830_write_reg(priv, 0x093E, 0x08);
  163. atbm8830_write_reg(priv, 0x096E, 0x06);
  164. /* frame_count_max0 */
  165. atbm8830_write_reg(priv, 0x0B09, 0x00);
  166. /* frame_count_max1 */
  167. atbm8830_write_reg(priv, 0x0B0A, 0x08);
  168. return 0;
  169. }
  170. static int set_ts_config(struct atbm_state *priv)
  171. {
  172. const struct atbm8830_config *cfg = priv->config;
  173. /*Set parallel/serial ts mode*/
  174. atbm8830_write_reg(priv, REG_TS_SERIAL, cfg->serial_ts ? 1 : 0);
  175. atbm8830_write_reg(priv, REG_TS_CLK_MODE, cfg->serial_ts ? 1 : 0);
  176. /*Set ts sampling edge*/
  177. atbm8830_write_reg(priv, REG_TS_SAMPLE_EDGE,
  178. cfg->ts_sampling_edge ? 1 : 0);
  179. /*Set ts clock freerun*/
  180. atbm8830_write_reg(priv, REG_TS_CLK_FREERUN,
  181. cfg->ts_clk_gated ? 0 : 1);
  182. return 0;
  183. }
  184. static int atbm8830_init(struct dvb_frontend *fe)
  185. {
  186. struct atbm_state *priv = fe->demodulator_priv;
  187. const struct atbm8830_config *cfg = priv->config;
  188. /*Set oscillator frequency*/
  189. set_osc_freq(priv, cfg->osc_clk_freq);
  190. /*Set IF frequency*/
  191. set_if_freq(priv, cfg->if_freq);
  192. /*Set AGC Config*/
  193. set_agc_config(priv, cfg->agc_min, cfg->agc_max,
  194. cfg->agc_hold_loop);
  195. /*Set static channel mode*/
  196. set_static_channel_mode(priv);
  197. set_ts_config(priv);
  198. /*Turn off DSP reset*/
  199. atbm8830_write_reg(priv, 0x000A, 0);
  200. /*SW version test*/
  201. atbm8830_write_reg(priv, 0x020C, 11);
  202. /* Run */
  203. atbm8830_write_reg(priv, REG_DEMOD_RUN, 1);
  204. return 0;
  205. }
  206. static void atbm8830_release(struct dvb_frontend *fe)
  207. {
  208. struct atbm_state *state = fe->demodulator_priv;
  209. dprintk("%s\n", __func__);
  210. kfree(state);
  211. }
  212. static int atbm8830_set_fe(struct dvb_frontend *fe,
  213. struct dvb_frontend_parameters *fe_params)
  214. {
  215. struct atbm_state *priv = fe->demodulator_priv;
  216. int i;
  217. u8 locked = 0;
  218. dprintk("%s\n", __func__);
  219. /* set frequency */
  220. if (fe->ops.tuner_ops.set_params) {
  221. if (fe->ops.i2c_gate_ctrl)
  222. fe->ops.i2c_gate_ctrl(fe, 1);
  223. fe->ops.tuner_ops.set_params(fe, fe_params);
  224. if (fe->ops.i2c_gate_ctrl)
  225. fe->ops.i2c_gate_ctrl(fe, 0);
  226. }
  227. /* start auto lock */
  228. for (i = 0; i < 10; i++) {
  229. mdelay(100);
  230. dprintk("Try %d\n", i);
  231. is_locked(priv, &locked);
  232. if (locked != 0) {
  233. dprintk("ATBM8830 locked!\n");
  234. break;
  235. }
  236. }
  237. return 0;
  238. }
  239. static int atbm8830_get_fe(struct dvb_frontend *fe,
  240. struct dvb_frontend_parameters *fe_params)
  241. {
  242. dprintk("%s\n", __func__);
  243. /* TODO: get real readings from device */
  244. /* inversion status */
  245. fe_params->inversion = INVERSION_OFF;
  246. /* bandwidth */
  247. fe_params->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
  248. fe_params->u.ofdm.code_rate_HP = FEC_AUTO;
  249. fe_params->u.ofdm.code_rate_LP = FEC_AUTO;
  250. fe_params->u.ofdm.constellation = QAM_AUTO;
  251. /* transmission mode */
  252. fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_AUTO;
  253. /* guard interval */
  254. fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_AUTO;
  255. /* hierarchy */
  256. fe_params->u.ofdm.hierarchy_information = HIERARCHY_NONE;
  257. return 0;
  258. }
  259. static int atbm8830_get_tune_settings(struct dvb_frontend *fe,
  260. struct dvb_frontend_tune_settings *fesettings)
  261. {
  262. fesettings->min_delay_ms = 0;
  263. fesettings->step_size = 0;
  264. fesettings->max_drift = 0;
  265. return 0;
  266. }
  267. static int atbm8830_read_status(struct dvb_frontend *fe, fe_status_t *fe_status)
  268. {
  269. struct atbm_state *priv = fe->demodulator_priv;
  270. u8 locked = 0;
  271. u8 agc_locked = 0;
  272. dprintk("%s\n", __func__);
  273. *fe_status = 0;
  274. is_locked(priv, &locked);
  275. if (locked) {
  276. *fe_status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
  277. FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
  278. }
  279. dprintk("%s: fe_status=0x%x\n", __func__, *fe_status);
  280. atbm8830_read_reg(priv, REG_AGC_LOCK, &agc_locked);
  281. dprintk("AGC Lock: %d\n", agc_locked);
  282. return 0;
  283. }
  284. static int atbm8830_read_ber(struct dvb_frontend *fe, u32 *ber)
  285. {
  286. struct atbm_state *priv = fe->demodulator_priv;
  287. u32 frame_err;
  288. u8 t;
  289. dprintk("%s\n", __func__);
  290. atbm8830_reglatch_lock(priv, 1);
  291. atbm8830_read_reg(priv, REG_FRAME_ERR_CNT + 1, &t);
  292. frame_err = t & 0x7F;
  293. frame_err <<= 8;
  294. atbm8830_read_reg(priv, REG_FRAME_ERR_CNT, &t);
  295. frame_err |= t;
  296. atbm8830_reglatch_lock(priv, 0);
  297. *ber = frame_err * 100 / 32767;
  298. dprintk("%s: ber=0x%x\n", __func__, *ber);
  299. return 0;
  300. }
  301. static int atbm8830_read_signal_strength(struct dvb_frontend *fe, u16 *signal)
  302. {
  303. struct atbm_state *priv = fe->demodulator_priv;
  304. u32 pwm;
  305. u8 t;
  306. dprintk("%s\n", __func__);
  307. atbm8830_reglatch_lock(priv, 1);
  308. atbm8830_read_reg(priv, REG_AGC_PWM_VAL + 1, &t);
  309. pwm = t & 0x03;
  310. pwm <<= 8;
  311. atbm8830_read_reg(priv, REG_AGC_PWM_VAL, &t);
  312. pwm |= t;
  313. atbm8830_reglatch_lock(priv, 0);
  314. dprintk("AGC PWM = 0x%02X\n", pwm);
  315. pwm = 0x400 - pwm;
  316. *signal = pwm * 0x10000 / 0x400;
  317. return 0;
  318. }
  319. static int atbm8830_read_snr(struct dvb_frontend *fe, u16 *snr)
  320. {
  321. dprintk("%s\n", __func__);
  322. *snr = 0;
  323. return 0;
  324. }
  325. static int atbm8830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  326. {
  327. dprintk("%s\n", __func__);
  328. *ucblocks = 0;
  329. return 0;
  330. }
  331. static int atbm8830_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
  332. {
  333. struct atbm_state *priv = fe->demodulator_priv;
  334. return atbm8830_write_reg(priv, REG_I2C_GATE, enable ? 1 : 0);
  335. }
  336. static struct dvb_frontend_ops atbm8830_ops = {
  337. .info = {
  338. .name = "AltoBeam ATBM8830/8831 DMB-TH",
  339. .type = FE_OFDM,
  340. .frequency_min = 474000000,
  341. .frequency_max = 858000000,
  342. .frequency_stepsize = 10000,
  343. .caps =
  344. FE_CAN_FEC_AUTO |
  345. FE_CAN_QAM_AUTO |
  346. FE_CAN_TRANSMISSION_MODE_AUTO |
  347. FE_CAN_GUARD_INTERVAL_AUTO
  348. },
  349. .release = atbm8830_release,
  350. .init = atbm8830_init,
  351. .sleep = NULL,
  352. .write = NULL,
  353. .i2c_gate_ctrl = atbm8830_i2c_gate_ctrl,
  354. .set_frontend = atbm8830_set_fe,
  355. .get_frontend = atbm8830_get_fe,
  356. .get_tune_settings = atbm8830_get_tune_settings,
  357. .read_status = atbm8830_read_status,
  358. .read_ber = atbm8830_read_ber,
  359. .read_signal_strength = atbm8830_read_signal_strength,
  360. .read_snr = atbm8830_read_snr,
  361. .read_ucblocks = atbm8830_read_ucblocks,
  362. };
  363. struct dvb_frontend *atbm8830_attach(const struct atbm8830_config *config,
  364. struct i2c_adapter *i2c)
  365. {
  366. struct atbm_state *priv = NULL;
  367. u8 data = 0;
  368. dprintk("%s()\n", __func__);
  369. if (config == NULL || i2c == NULL)
  370. return NULL;
  371. priv = kzalloc(sizeof(struct atbm_state), GFP_KERNEL);
  372. if (priv == NULL)
  373. goto error_out;
  374. priv->config = config;
  375. priv->i2c = i2c;
  376. /* check if the demod is there */
  377. if (atbm8830_read_reg(priv, REG_CHIP_ID, &data) != 0) {
  378. dprintk("%s atbm8830/8831 not found at i2c addr 0x%02X\n",
  379. __func__, priv->config->demod_address);
  380. goto error_out;
  381. }
  382. dprintk("atbm8830 chip id: 0x%02X\n", data);
  383. memcpy(&priv->frontend.ops, &atbm8830_ops,
  384. sizeof(struct dvb_frontend_ops));
  385. priv->frontend.demodulator_priv = priv;
  386. atbm8830_init(&priv->frontend);
  387. atbm8830_i2c_gate_ctrl(&priv->frontend, 1);
  388. return &priv->frontend;
  389. error_out:
  390. dprintk("%s() error_out\n", __func__);
  391. kfree(priv);
  392. return NULL;
  393. }
  394. EXPORT_SYMBOL(atbm8830_attach);
  395. MODULE_DESCRIPTION("AltoBeam ATBM8830/8831 GB20600 demodulator driver");
  396. MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
  397. MODULE_LICENSE("GPL");