dm1105.c 29 KB

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  1. /*
  2. * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
  3. *
  4. * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. */
  21. #include <linux/i2c.h>
  22. #include <linux/i2c-algo-bit.h>
  23. #include <linux/init.h>
  24. #include <linux/kernel.h>
  25. #include <linux/module.h>
  26. #include <linux/proc_fs.h>
  27. #include <linux/pci.h>
  28. #include <linux/dma-mapping.h>
  29. #include <linux/slab.h>
  30. #include <media/rc-core.h>
  31. #include "demux.h"
  32. #include "dmxdev.h"
  33. #include "dvb_demux.h"
  34. #include "dvb_frontend.h"
  35. #include "dvb_net.h"
  36. #include "dvbdev.h"
  37. #include "dvb-pll.h"
  38. #include "stv0299.h"
  39. #include "stv0288.h"
  40. #include "stb6000.h"
  41. #include "si21xx.h"
  42. #include "cx24116.h"
  43. #include "z0194a.h"
  44. #include "ds3000.h"
  45. #define MODULE_NAME "dm1105"
  46. #define UNSET (-1U)
  47. #define DM1105_BOARD_NOAUTO UNSET
  48. #define DM1105_BOARD_UNKNOWN 0
  49. #define DM1105_BOARD_DVBWORLD_2002 1
  50. #define DM1105_BOARD_DVBWORLD_2004 2
  51. #define DM1105_BOARD_AXESS_DM05 3
  52. #define DM1105_BOARD_UNBRANDED_I2C_ON_GPIO 4
  53. /* ----------------------------------------------- */
  54. /*
  55. * PCI ID's
  56. */
  57. #ifndef PCI_VENDOR_ID_TRIGEM
  58. #define PCI_VENDOR_ID_TRIGEM 0x109f
  59. #endif
  60. #ifndef PCI_VENDOR_ID_AXESS
  61. #define PCI_VENDOR_ID_AXESS 0x195d
  62. #endif
  63. #ifndef PCI_DEVICE_ID_DM1105
  64. #define PCI_DEVICE_ID_DM1105 0x036f
  65. #endif
  66. #ifndef PCI_DEVICE_ID_DW2002
  67. #define PCI_DEVICE_ID_DW2002 0x2002
  68. #endif
  69. #ifndef PCI_DEVICE_ID_DW2004
  70. #define PCI_DEVICE_ID_DW2004 0x2004
  71. #endif
  72. #ifndef PCI_DEVICE_ID_DM05
  73. #define PCI_DEVICE_ID_DM05 0x1105
  74. #endif
  75. /* ----------------------------------------------- */
  76. /* sdmc dm1105 registers */
  77. /* TS Control */
  78. #define DM1105_TSCTR 0x00
  79. #define DM1105_DTALENTH 0x04
  80. /* GPIO Interface */
  81. #define DM1105_GPIOVAL 0x08
  82. #define DM1105_GPIOCTR 0x0c
  83. /* PID serial number */
  84. #define DM1105_PIDN 0x10
  85. /* Odd-even secret key select */
  86. #define DM1105_CWSEL 0x14
  87. /* Host Command Interface */
  88. #define DM1105_HOST_CTR 0x18
  89. #define DM1105_HOST_AD 0x1c
  90. /* PCI Interface */
  91. #define DM1105_CR 0x30
  92. #define DM1105_RST 0x34
  93. #define DM1105_STADR 0x38
  94. #define DM1105_RLEN 0x3c
  95. #define DM1105_WRP 0x40
  96. #define DM1105_INTCNT 0x44
  97. #define DM1105_INTMAK 0x48
  98. #define DM1105_INTSTS 0x4c
  99. /* CW Value */
  100. #define DM1105_ODD 0x50
  101. #define DM1105_EVEN 0x58
  102. /* PID Value */
  103. #define DM1105_PID 0x60
  104. /* IR Control */
  105. #define DM1105_IRCTR 0x64
  106. #define DM1105_IRMODE 0x68
  107. #define DM1105_SYSTEMCODE 0x6c
  108. #define DM1105_IRCODE 0x70
  109. /* Unknown Values */
  110. #define DM1105_ENCRYPT 0x74
  111. #define DM1105_VER 0x7c
  112. /* I2C Interface */
  113. #define DM1105_I2CCTR 0x80
  114. #define DM1105_I2CSTS 0x81
  115. #define DM1105_I2CDAT 0x82
  116. #define DM1105_I2C_RA 0x83
  117. /* ----------------------------------------------- */
  118. /* Interrupt Mask Bits */
  119. #define INTMAK_TSIRQM 0x01
  120. #define INTMAK_HIRQM 0x04
  121. #define INTMAK_IRM 0x08
  122. #define INTMAK_ALLMASK (INTMAK_TSIRQM | \
  123. INTMAK_HIRQM | \
  124. INTMAK_IRM)
  125. #define INTMAK_NONEMASK 0x00
  126. /* Interrupt Status Bits */
  127. #define INTSTS_TSIRQ 0x01
  128. #define INTSTS_HIRQ 0x04
  129. #define INTSTS_IR 0x08
  130. /* IR Control Bits */
  131. #define DM1105_IR_EN 0x01
  132. #define DM1105_SYS_CHK 0x02
  133. #define DM1105_REP_FLG 0x08
  134. /* EEPROM addr */
  135. #define IIC_24C01_addr 0xa0
  136. /* Max board count */
  137. #define DM1105_MAX 0x04
  138. #define DRIVER_NAME "dm1105"
  139. #define DM1105_I2C_GPIO_NAME "dm1105-gpio"
  140. #define DM1105_DMA_PACKETS 47
  141. #define DM1105_DMA_PACKET_LENGTH (128*4)
  142. #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
  143. /* */
  144. #define GPIO08 (1 << 8)
  145. #define GPIO13 (1 << 13)
  146. #define GPIO14 (1 << 14)
  147. #define GPIO15 (1 << 15)
  148. #define GPIO16 (1 << 16)
  149. #define GPIO17 (1 << 17)
  150. #define GPIO_ALL 0x03ffff
  151. /* GPIO's for LNB power control */
  152. #define DM1105_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13))
  153. #define DM1105_LNB_OFF GPIO17
  154. #define DM1105_LNB_13V (GPIO16 | GPIO08)
  155. #define DM1105_LNB_18V GPIO08
  156. /* GPIO's for LNB power control for Axess DM05 */
  157. #define DM05_LNB_MASK (GPIO_ALL & ~(GPIO14 | GPIO13))
  158. #define DM05_LNB_OFF GPIO17/* actually 13v */
  159. #define DM05_LNB_13V GPIO17
  160. #define DM05_LNB_18V (GPIO17 | GPIO16)
  161. /* GPIO's for LNB power control for unbranded with I2C on GPIO */
  162. #define UNBR_LNB_MASK (GPIO17 | GPIO16)
  163. #define UNBR_LNB_OFF 0
  164. #define UNBR_LNB_13V GPIO17
  165. #define UNBR_LNB_18V (GPIO17 | GPIO16)
  166. static unsigned int card[] = {[0 ... 3] = UNSET };
  167. module_param_array(card, int, NULL, 0444);
  168. MODULE_PARM_DESC(card, "card type");
  169. static int ir_debug;
  170. module_param(ir_debug, int, 0644);
  171. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  172. static unsigned int dm1105_devcount;
  173. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  174. struct dm1105_board {
  175. char *name;
  176. struct {
  177. u32 mask, off, v13, v18;
  178. } lnb;
  179. u32 gpio_scl, gpio_sda;
  180. };
  181. struct dm1105_subid {
  182. u16 subvendor;
  183. u16 subdevice;
  184. u32 card;
  185. };
  186. static const struct dm1105_board dm1105_boards[] = {
  187. [DM1105_BOARD_UNKNOWN] = {
  188. .name = "UNKNOWN/GENERIC",
  189. .lnb = {
  190. .mask = DM1105_LNB_MASK,
  191. .off = DM1105_LNB_OFF,
  192. .v13 = DM1105_LNB_13V,
  193. .v18 = DM1105_LNB_18V,
  194. },
  195. },
  196. [DM1105_BOARD_DVBWORLD_2002] = {
  197. .name = "DVBWorld PCI 2002",
  198. .lnb = {
  199. .mask = DM1105_LNB_MASK,
  200. .off = DM1105_LNB_OFF,
  201. .v13 = DM1105_LNB_13V,
  202. .v18 = DM1105_LNB_18V,
  203. },
  204. },
  205. [DM1105_BOARD_DVBWORLD_2004] = {
  206. .name = "DVBWorld PCI 2004",
  207. .lnb = {
  208. .mask = DM1105_LNB_MASK,
  209. .off = DM1105_LNB_OFF,
  210. .v13 = DM1105_LNB_13V,
  211. .v18 = DM1105_LNB_18V,
  212. },
  213. },
  214. [DM1105_BOARD_AXESS_DM05] = {
  215. .name = "Axess/EasyTv DM05",
  216. .lnb = {
  217. .mask = DM05_LNB_MASK,
  218. .off = DM05_LNB_OFF,
  219. .v13 = DM05_LNB_13V,
  220. .v18 = DM05_LNB_18V,
  221. },
  222. },
  223. [DM1105_BOARD_UNBRANDED_I2C_ON_GPIO] = {
  224. .name = "Unbranded DM1105 with i2c on GPIOs",
  225. .lnb = {
  226. .mask = UNBR_LNB_MASK,
  227. .off = UNBR_LNB_OFF,
  228. .v13 = UNBR_LNB_13V,
  229. .v18 = UNBR_LNB_18V,
  230. },
  231. .gpio_scl = GPIO14,
  232. .gpio_sda = GPIO13,
  233. },
  234. };
  235. static const struct dm1105_subid dm1105_subids[] = {
  236. {
  237. .subvendor = 0x0000,
  238. .subdevice = 0x2002,
  239. .card = DM1105_BOARD_DVBWORLD_2002,
  240. }, {
  241. .subvendor = 0x0001,
  242. .subdevice = 0x2002,
  243. .card = DM1105_BOARD_DVBWORLD_2002,
  244. }, {
  245. .subvendor = 0x0000,
  246. .subdevice = 0x2004,
  247. .card = DM1105_BOARD_DVBWORLD_2004,
  248. }, {
  249. .subvendor = 0x0001,
  250. .subdevice = 0x2004,
  251. .card = DM1105_BOARD_DVBWORLD_2004,
  252. }, {
  253. .subvendor = 0x195d,
  254. .subdevice = 0x1105,
  255. .card = DM1105_BOARD_AXESS_DM05,
  256. },
  257. };
  258. static void dm1105_card_list(struct pci_dev *pci)
  259. {
  260. int i;
  261. if (0 == pci->subsystem_vendor &&
  262. 0 == pci->subsystem_device) {
  263. printk(KERN_ERR
  264. "dm1105: Your board has no valid PCI Subsystem ID\n"
  265. "dm1105: and thus can't be autodetected\n"
  266. "dm1105: Please pass card=<n> insmod option to\n"
  267. "dm1105: workaround that. Redirect complaints to\n"
  268. "dm1105: the vendor of the TV card. Best regards,\n"
  269. "dm1105: -- tux\n");
  270. } else {
  271. printk(KERN_ERR
  272. "dm1105: Your board isn't known (yet) to the driver.\n"
  273. "dm1105: You can try to pick one of the existing\n"
  274. "dm1105: card configs via card=<n> insmod option.\n"
  275. "dm1105: Updating to the latest version might help\n"
  276. "dm1105: as well.\n");
  277. }
  278. printk(KERN_ERR "Here is a list of valid choices for the card=<n> "
  279. "insmod option:\n");
  280. for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
  281. printk(KERN_ERR "dm1105: card=%d -> %s\n",
  282. i, dm1105_boards[i].name);
  283. }
  284. /* infrared remote control */
  285. struct infrared {
  286. struct rc_dev *dev;
  287. char input_phys[32];
  288. struct work_struct work;
  289. u32 ir_command;
  290. };
  291. struct dm1105_dev {
  292. /* pci */
  293. struct pci_dev *pdev;
  294. u8 __iomem *io_mem;
  295. /* ir */
  296. struct infrared ir;
  297. /* dvb */
  298. struct dmx_frontend hw_frontend;
  299. struct dmx_frontend mem_frontend;
  300. struct dmxdev dmxdev;
  301. struct dvb_adapter dvb_adapter;
  302. struct dvb_demux demux;
  303. struct dvb_frontend *fe;
  304. struct dvb_net dvbnet;
  305. unsigned int full_ts_users;
  306. unsigned int boardnr;
  307. int nr;
  308. /* i2c */
  309. struct i2c_adapter i2c_adap;
  310. struct i2c_adapter i2c_bb_adap;
  311. struct i2c_algo_bit_data i2c_bit;
  312. /* irq */
  313. struct work_struct work;
  314. struct workqueue_struct *wq;
  315. char wqn[16];
  316. /* dma */
  317. dma_addr_t dma_addr;
  318. unsigned char *ts_buf;
  319. u32 wrp;
  320. u32 nextwrp;
  321. u32 buffer_size;
  322. unsigned int PacketErrorCount;
  323. unsigned int dmarst;
  324. spinlock_t lock;
  325. };
  326. #define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
  327. #define dm_readb(reg) inb(dm_io_mem(reg))
  328. #define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
  329. #define dm_readw(reg) inw(dm_io_mem(reg))
  330. #define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
  331. #define dm_readl(reg) inl(dm_io_mem(reg))
  332. #define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
  333. #define dm_andorl(reg, mask, value) \
  334. outl((inl(dm_io_mem(reg)) & ~(mask)) |\
  335. ((value) & (mask)), (dm_io_mem(reg)))
  336. #define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
  337. #define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
  338. /* The chip has 18 GPIOs. In HOST mode GPIO's used as 15 bit address lines,
  339. so we can use only 3 GPIO's from GPIO15 to GPIO17.
  340. Here I don't check whether HOST is enebled as it is not implemented yet.
  341. */
  342. static void dm1105_gpio_set(struct dm1105_dev *dev, u32 mask)
  343. {
  344. if (mask & 0xfffc0000)
  345. printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
  346. if (mask & 0x0003ffff)
  347. dm_setl(DM1105_GPIOVAL, mask & 0x0003ffff);
  348. }
  349. static void dm1105_gpio_clear(struct dm1105_dev *dev, u32 mask)
  350. {
  351. if (mask & 0xfffc0000)
  352. printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
  353. if (mask & 0x0003ffff)
  354. dm_clearl(DM1105_GPIOVAL, mask & 0x0003ffff);
  355. }
  356. static void dm1105_gpio_andor(struct dm1105_dev *dev, u32 mask, u32 val)
  357. {
  358. if (mask & 0xfffc0000)
  359. printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
  360. if (mask & 0x0003ffff)
  361. dm_andorl(DM1105_GPIOVAL, mask & 0x0003ffff, val);
  362. }
  363. static u32 dm1105_gpio_get(struct dm1105_dev *dev, u32 mask)
  364. {
  365. if (mask & 0xfffc0000)
  366. printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
  367. if (mask & 0x0003ffff)
  368. return dm_readl(DM1105_GPIOVAL) & mask & 0x0003ffff;
  369. return 0;
  370. }
  371. static void dm1105_gpio_enable(struct dm1105_dev *dev, u32 mask, int asoutput)
  372. {
  373. if (mask & 0xfffc0000)
  374. printk(KERN_ERR "%s: Only 18 GPIO's are allowed\n", __func__);
  375. if ((mask & 0x0003ffff) && asoutput)
  376. dm_clearl(DM1105_GPIOCTR, mask & 0x0003ffff);
  377. else if ((mask & 0x0003ffff) && !asoutput)
  378. dm_setl(DM1105_GPIOCTR, mask & 0x0003ffff);
  379. }
  380. static void dm1105_setline(struct dm1105_dev *dev, u32 line, int state)
  381. {
  382. if (state)
  383. dm1105_gpio_enable(dev, line, 0);
  384. else {
  385. dm1105_gpio_enable(dev, line, 1);
  386. dm1105_gpio_clear(dev, line);
  387. }
  388. }
  389. static void dm1105_setsda(void *data, int state)
  390. {
  391. struct dm1105_dev *dev = data;
  392. dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_sda, state);
  393. }
  394. static void dm1105_setscl(void *data, int state)
  395. {
  396. struct dm1105_dev *dev = data;
  397. dm1105_setline(dev, dm1105_boards[dev->boardnr].gpio_scl, state);
  398. }
  399. static int dm1105_getsda(void *data)
  400. {
  401. struct dm1105_dev *dev = data;
  402. return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_sda)
  403. ? 1 : 0;
  404. }
  405. static int dm1105_getscl(void *data)
  406. {
  407. struct dm1105_dev *dev = data;
  408. return dm1105_gpio_get(dev, dm1105_boards[dev->boardnr].gpio_scl)
  409. ? 1 : 0;
  410. }
  411. static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
  412. struct i2c_msg *msgs, int num)
  413. {
  414. struct dm1105_dev *dev ;
  415. int addr, rc, i, j, k, len, byte, data;
  416. u8 status;
  417. dev = i2c_adap->algo_data;
  418. for (i = 0; i < num; i++) {
  419. dm_writeb(DM1105_I2CCTR, 0x00);
  420. if (msgs[i].flags & I2C_M_RD) {
  421. /* read bytes */
  422. addr = msgs[i].addr << 1;
  423. addr |= 1;
  424. dm_writeb(DM1105_I2CDAT, addr);
  425. for (byte = 0; byte < msgs[i].len; byte++)
  426. dm_writeb(DM1105_I2CDAT + byte + 1, 0);
  427. dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
  428. for (j = 0; j < 55; j++) {
  429. mdelay(10);
  430. status = dm_readb(DM1105_I2CSTS);
  431. if ((status & 0xc0) == 0x40)
  432. break;
  433. }
  434. if (j >= 55)
  435. return -1;
  436. for (byte = 0; byte < msgs[i].len; byte++) {
  437. rc = dm_readb(DM1105_I2CDAT + byte + 1);
  438. if (rc < 0)
  439. goto err;
  440. msgs[i].buf[byte] = rc;
  441. }
  442. } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
  443. /* prepaired for cx24116 firmware */
  444. /* Write in small blocks */
  445. len = msgs[i].len - 1;
  446. k = 1;
  447. do {
  448. dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
  449. dm_writeb(DM1105_I2CDAT + 1, 0xf7);
  450. for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
  451. data = msgs[i].buf[k + byte];
  452. dm_writeb(DM1105_I2CDAT + byte + 2, data);
  453. }
  454. dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
  455. for (j = 0; j < 25; j++) {
  456. mdelay(10);
  457. status = dm_readb(DM1105_I2CSTS);
  458. if ((status & 0xc0) == 0x40)
  459. break;
  460. }
  461. if (j >= 25)
  462. return -1;
  463. k += 48;
  464. len -= 48;
  465. } while (len > 0);
  466. } else {
  467. /* write bytes */
  468. dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
  469. for (byte = 0; byte < msgs[i].len; byte++) {
  470. data = msgs[i].buf[byte];
  471. dm_writeb(DM1105_I2CDAT + byte + 1, data);
  472. }
  473. dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
  474. for (j = 0; j < 25; j++) {
  475. mdelay(10);
  476. status = dm_readb(DM1105_I2CSTS);
  477. if ((status & 0xc0) == 0x40)
  478. break;
  479. }
  480. if (j >= 25)
  481. return -1;
  482. }
  483. }
  484. return num;
  485. err:
  486. return rc;
  487. }
  488. static u32 functionality(struct i2c_adapter *adap)
  489. {
  490. return I2C_FUNC_I2C;
  491. }
  492. static struct i2c_algorithm dm1105_algo = {
  493. .master_xfer = dm1105_i2c_xfer,
  494. .functionality = functionality,
  495. };
  496. static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
  497. {
  498. return container_of(feed->demux, struct dm1105_dev, demux);
  499. }
  500. static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
  501. {
  502. return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
  503. }
  504. static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  505. {
  506. struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
  507. dm1105_gpio_enable(dev, dm1105_boards[dev->boardnr].lnb.mask, 1);
  508. if (voltage == SEC_VOLTAGE_18)
  509. dm1105_gpio_andor(dev,
  510. dm1105_boards[dev->boardnr].lnb.mask,
  511. dm1105_boards[dev->boardnr].lnb.v18);
  512. else if (voltage == SEC_VOLTAGE_13)
  513. dm1105_gpio_andor(dev,
  514. dm1105_boards[dev->boardnr].lnb.mask,
  515. dm1105_boards[dev->boardnr].lnb.v13);
  516. else
  517. dm1105_gpio_andor(dev,
  518. dm1105_boards[dev->boardnr].lnb.mask,
  519. dm1105_boards[dev->boardnr].lnb.off);
  520. return 0;
  521. }
  522. static void dm1105_set_dma_addr(struct dm1105_dev *dev)
  523. {
  524. dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr));
  525. }
  526. static int __devinit dm1105_dma_map(struct dm1105_dev *dev)
  527. {
  528. dev->ts_buf = pci_alloc_consistent(dev->pdev,
  529. 6 * DM1105_DMA_BYTES,
  530. &dev->dma_addr);
  531. return !dev->ts_buf;
  532. }
  533. static void dm1105_dma_unmap(struct dm1105_dev *dev)
  534. {
  535. pci_free_consistent(dev->pdev,
  536. 6 * DM1105_DMA_BYTES,
  537. dev->ts_buf,
  538. dev->dma_addr);
  539. }
  540. static void dm1105_enable_irqs(struct dm1105_dev *dev)
  541. {
  542. dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
  543. dm_writeb(DM1105_CR, 1);
  544. }
  545. static void dm1105_disable_irqs(struct dm1105_dev *dev)
  546. {
  547. dm_writeb(DM1105_INTMAK, INTMAK_IRM);
  548. dm_writeb(DM1105_CR, 0);
  549. }
  550. static int dm1105_start_feed(struct dvb_demux_feed *f)
  551. {
  552. struct dm1105_dev *dev = feed_to_dm1105_dev(f);
  553. if (dev->full_ts_users++ == 0)
  554. dm1105_enable_irqs(dev);
  555. return 0;
  556. }
  557. static int dm1105_stop_feed(struct dvb_demux_feed *f)
  558. {
  559. struct dm1105_dev *dev = feed_to_dm1105_dev(f);
  560. if (--dev->full_ts_users == 0)
  561. dm1105_disable_irqs(dev);
  562. return 0;
  563. }
  564. /* ir work handler */
  565. static void dm1105_emit_key(struct work_struct *work)
  566. {
  567. struct infrared *ir = container_of(work, struct infrared, work);
  568. u32 ircom = ir->ir_command;
  569. u8 data;
  570. if (ir_debug)
  571. printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
  572. data = (ircom >> 8) & 0x7f;
  573. rc_keydown(ir->dev, data, 0);
  574. }
  575. /* work handler */
  576. static void dm1105_dmx_buffer(struct work_struct *work)
  577. {
  578. struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
  579. unsigned int nbpackets;
  580. u32 oldwrp = dev->wrp;
  581. u32 nextwrp = dev->nextwrp;
  582. if (!((dev->ts_buf[oldwrp] == 0x47) &&
  583. (dev->ts_buf[oldwrp + 188] == 0x47) &&
  584. (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
  585. dev->PacketErrorCount++;
  586. /* bad packet found */
  587. if ((dev->PacketErrorCount >= 2) &&
  588. (dev->dmarst == 0)) {
  589. dm_writeb(DM1105_RST, 1);
  590. dev->wrp = 0;
  591. dev->PacketErrorCount = 0;
  592. dev->dmarst = 0;
  593. return;
  594. }
  595. }
  596. if (nextwrp < oldwrp) {
  597. memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
  598. nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
  599. } else
  600. nbpackets = (nextwrp - oldwrp) / 188;
  601. dev->wrp = nextwrp;
  602. dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
  603. }
  604. static irqreturn_t dm1105_irq(int irq, void *dev_id)
  605. {
  606. struct dm1105_dev *dev = dev_id;
  607. /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
  608. unsigned int intsts = dm_readb(DM1105_INTSTS);
  609. dm_writeb(DM1105_INTSTS, intsts);
  610. switch (intsts) {
  611. case INTSTS_TSIRQ:
  612. case (INTSTS_TSIRQ | INTSTS_IR):
  613. dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
  614. queue_work(dev->wq, &dev->work);
  615. break;
  616. case INTSTS_IR:
  617. dev->ir.ir_command = dm_readl(DM1105_IRCODE);
  618. schedule_work(&dev->ir.work);
  619. break;
  620. }
  621. return IRQ_HANDLED;
  622. }
  623. int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
  624. {
  625. struct rc_dev *dev;
  626. int err = -ENOMEM;
  627. dev = rc_allocate_device();
  628. if (!dev)
  629. return -ENOMEM;
  630. snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
  631. "pci-%s/ir0", pci_name(dm1105->pdev));
  632. dev->driver_name = MODULE_NAME;
  633. dev->map_name = RC_MAP_DM1105_NEC;
  634. dev->driver_type = RC_DRIVER_SCANCODE;
  635. dev->input_name = "DVB on-card IR receiver";
  636. dev->input_phys = dm1105->ir.input_phys;
  637. dev->input_id.bustype = BUS_PCI;
  638. dev->input_id.version = 1;
  639. if (dm1105->pdev->subsystem_vendor) {
  640. dev->input_id.vendor = dm1105->pdev->subsystem_vendor;
  641. dev->input_id.product = dm1105->pdev->subsystem_device;
  642. } else {
  643. dev->input_id.vendor = dm1105->pdev->vendor;
  644. dev->input_id.product = dm1105->pdev->device;
  645. }
  646. dev->dev.parent = &dm1105->pdev->dev;
  647. INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
  648. err = rc_register_device(dev);
  649. if (err < 0) {
  650. rc_free_device(dev);
  651. return err;
  652. }
  653. dm1105->ir.dev = dev;
  654. return 0;
  655. }
  656. void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105)
  657. {
  658. rc_unregister_device(dm1105->ir.dev);
  659. }
  660. static int __devinit dm1105_hw_init(struct dm1105_dev *dev)
  661. {
  662. dm1105_disable_irqs(dev);
  663. dm_writeb(DM1105_HOST_CTR, 0);
  664. /*DATALEN 188,*/
  665. dm_writeb(DM1105_DTALENTH, 188);
  666. /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
  667. dm_writew(DM1105_TSCTR, 0xc10a);
  668. /* map DMA and set address */
  669. dm1105_dma_map(dev);
  670. dm1105_set_dma_addr(dev);
  671. /* big buffer */
  672. dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
  673. dm_writeb(DM1105_INTCNT, 47);
  674. /* IR NEC mode enable */
  675. dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
  676. dm_writeb(DM1105_IRMODE, 0);
  677. dm_writew(DM1105_SYSTEMCODE, 0);
  678. return 0;
  679. }
  680. static void dm1105_hw_exit(struct dm1105_dev *dev)
  681. {
  682. dm1105_disable_irqs(dev);
  683. /* IR disable */
  684. dm_writeb(DM1105_IRCTR, 0);
  685. dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
  686. dm1105_dma_unmap(dev);
  687. }
  688. static struct stv0299_config sharp_z0194a_config = {
  689. .demod_address = 0x68,
  690. .inittab = sharp_z0194a_inittab,
  691. .mclk = 88000000UL,
  692. .invert = 1,
  693. .skip_reinit = 0,
  694. .lock_output = STV0299_LOCKOUTPUT_1,
  695. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  696. .min_delay_ms = 100,
  697. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  698. };
  699. static struct stv0288_config earda_config = {
  700. .demod_address = 0x68,
  701. .min_delay_ms = 100,
  702. };
  703. static struct si21xx_config serit_config = {
  704. .demod_address = 0x68,
  705. .min_delay_ms = 100,
  706. };
  707. static struct cx24116_config serit_sp2633_config = {
  708. .demod_address = 0x55,
  709. };
  710. static struct ds3000_config dvbworld_ds3000_config = {
  711. .demod_address = 0x68,
  712. };
  713. static int __devinit frontend_init(struct dm1105_dev *dev)
  714. {
  715. int ret;
  716. switch (dev->boardnr) {
  717. case DM1105_BOARD_UNBRANDED_I2C_ON_GPIO:
  718. dm1105_gpio_enable(dev, GPIO15, 1);
  719. dm1105_gpio_clear(dev, GPIO15);
  720. msleep(100);
  721. dm1105_gpio_set(dev, GPIO15);
  722. msleep(200);
  723. dev->fe = dvb_attach(
  724. stv0299_attach, &sharp_z0194a_config,
  725. &dev->i2c_bb_adap);
  726. if (dev->fe) {
  727. dev->fe->ops.set_voltage = dm1105_set_voltage;
  728. dvb_attach(dvb_pll_attach, dev->fe, 0x60,
  729. &dev->i2c_bb_adap, DVB_PLL_OPERA1);
  730. break;
  731. }
  732. dev->fe = dvb_attach(
  733. stv0288_attach, &earda_config,
  734. &dev->i2c_bb_adap);
  735. if (dev->fe) {
  736. dev->fe->ops.set_voltage = dm1105_set_voltage;
  737. dvb_attach(stb6000_attach, dev->fe, 0x61,
  738. &dev->i2c_bb_adap);
  739. break;
  740. }
  741. dev->fe = dvb_attach(
  742. si21xx_attach, &serit_config,
  743. &dev->i2c_bb_adap);
  744. if (dev->fe)
  745. dev->fe->ops.set_voltage = dm1105_set_voltage;
  746. break;
  747. case DM1105_BOARD_DVBWORLD_2004:
  748. dev->fe = dvb_attach(
  749. cx24116_attach, &serit_sp2633_config,
  750. &dev->i2c_adap);
  751. if (dev->fe) {
  752. dev->fe->ops.set_voltage = dm1105_set_voltage;
  753. break;
  754. }
  755. dev->fe = dvb_attach(
  756. ds3000_attach, &dvbworld_ds3000_config,
  757. &dev->i2c_adap);
  758. if (dev->fe)
  759. dev->fe->ops.set_voltage = dm1105_set_voltage;
  760. break;
  761. case DM1105_BOARD_DVBWORLD_2002:
  762. case DM1105_BOARD_AXESS_DM05:
  763. default:
  764. dev->fe = dvb_attach(
  765. stv0299_attach, &sharp_z0194a_config,
  766. &dev->i2c_adap);
  767. if (dev->fe) {
  768. dev->fe->ops.set_voltage = dm1105_set_voltage;
  769. dvb_attach(dvb_pll_attach, dev->fe, 0x60,
  770. &dev->i2c_adap, DVB_PLL_OPERA1);
  771. break;
  772. }
  773. dev->fe = dvb_attach(
  774. stv0288_attach, &earda_config,
  775. &dev->i2c_adap);
  776. if (dev->fe) {
  777. dev->fe->ops.set_voltage = dm1105_set_voltage;
  778. dvb_attach(stb6000_attach, dev->fe, 0x61,
  779. &dev->i2c_adap);
  780. break;
  781. }
  782. dev->fe = dvb_attach(
  783. si21xx_attach, &serit_config,
  784. &dev->i2c_adap);
  785. if (dev->fe)
  786. dev->fe->ops.set_voltage = dm1105_set_voltage;
  787. }
  788. if (!dev->fe) {
  789. dev_err(&dev->pdev->dev, "could not attach frontend\n");
  790. return -ENODEV;
  791. }
  792. ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
  793. if (ret < 0) {
  794. if (dev->fe->ops.release)
  795. dev->fe->ops.release(dev->fe);
  796. dev->fe = NULL;
  797. return ret;
  798. }
  799. return 0;
  800. }
  801. static void __devinit dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
  802. {
  803. static u8 command[1] = { 0x28 };
  804. struct i2c_msg msg[] = {
  805. {
  806. .addr = IIC_24C01_addr >> 1,
  807. .flags = 0,
  808. .buf = command,
  809. .len = 1
  810. }, {
  811. .addr = IIC_24C01_addr >> 1,
  812. .flags = I2C_M_RD,
  813. .buf = mac,
  814. .len = 6
  815. },
  816. };
  817. dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
  818. dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
  819. }
  820. static int __devinit dm1105_probe(struct pci_dev *pdev,
  821. const struct pci_device_id *ent)
  822. {
  823. struct dm1105_dev *dev;
  824. struct dvb_adapter *dvb_adapter;
  825. struct dvb_demux *dvbdemux;
  826. struct dmx_demux *dmx;
  827. int ret = -ENOMEM;
  828. int i;
  829. dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
  830. if (!dev)
  831. return -ENOMEM;
  832. /* board config */
  833. dev->nr = dm1105_devcount;
  834. dev->boardnr = UNSET;
  835. if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
  836. dev->boardnr = card[dev->nr];
  837. for (i = 0; UNSET == dev->boardnr &&
  838. i < ARRAY_SIZE(dm1105_subids); i++)
  839. if (pdev->subsystem_vendor ==
  840. dm1105_subids[i].subvendor &&
  841. pdev->subsystem_device ==
  842. dm1105_subids[i].subdevice)
  843. dev->boardnr = dm1105_subids[i].card;
  844. if (UNSET == dev->boardnr) {
  845. dev->boardnr = DM1105_BOARD_UNKNOWN;
  846. dm1105_card_list(pdev);
  847. }
  848. dm1105_devcount++;
  849. dev->pdev = pdev;
  850. dev->buffer_size = 5 * DM1105_DMA_BYTES;
  851. dev->PacketErrorCount = 0;
  852. dev->dmarst = 0;
  853. ret = pci_enable_device(pdev);
  854. if (ret < 0)
  855. goto err_kfree;
  856. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  857. if (ret < 0)
  858. goto err_pci_disable_device;
  859. pci_set_master(pdev);
  860. ret = pci_request_regions(pdev, DRIVER_NAME);
  861. if (ret < 0)
  862. goto err_pci_disable_device;
  863. dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
  864. if (!dev->io_mem) {
  865. ret = -EIO;
  866. goto err_pci_release_regions;
  867. }
  868. spin_lock_init(&dev->lock);
  869. pci_set_drvdata(pdev, dev);
  870. ret = dm1105_hw_init(dev);
  871. if (ret < 0)
  872. goto err_pci_iounmap;
  873. /* i2c */
  874. i2c_set_adapdata(&dev->i2c_adap, dev);
  875. strcpy(dev->i2c_adap.name, DRIVER_NAME);
  876. dev->i2c_adap.owner = THIS_MODULE;
  877. dev->i2c_adap.dev.parent = &pdev->dev;
  878. dev->i2c_adap.algo = &dm1105_algo;
  879. dev->i2c_adap.algo_data = dev;
  880. ret = i2c_add_adapter(&dev->i2c_adap);
  881. if (ret < 0)
  882. goto err_dm1105_hw_exit;
  883. i2c_set_adapdata(&dev->i2c_bb_adap, dev);
  884. strcpy(dev->i2c_bb_adap.name, DM1105_I2C_GPIO_NAME);
  885. dev->i2c_bb_adap.owner = THIS_MODULE;
  886. dev->i2c_bb_adap.dev.parent = &pdev->dev;
  887. dev->i2c_bb_adap.algo_data = &dev->i2c_bit;
  888. dev->i2c_bit.data = dev;
  889. dev->i2c_bit.setsda = dm1105_setsda;
  890. dev->i2c_bit.setscl = dm1105_setscl;
  891. dev->i2c_bit.getsda = dm1105_getsda;
  892. dev->i2c_bit.getscl = dm1105_getscl;
  893. dev->i2c_bit.udelay = 10;
  894. dev->i2c_bit.timeout = 10;
  895. /* Raise SCL and SDA */
  896. dm1105_setsda(dev, 1);
  897. dm1105_setscl(dev, 1);
  898. ret = i2c_bit_add_bus(&dev->i2c_bb_adap);
  899. if (ret < 0)
  900. goto err_i2c_del_adapter;
  901. /* dvb */
  902. ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
  903. THIS_MODULE, &pdev->dev, adapter_nr);
  904. if (ret < 0)
  905. goto err_i2c_del_adapters;
  906. dvb_adapter = &dev->dvb_adapter;
  907. dm1105_read_mac(dev, dvb_adapter->proposed_mac);
  908. dvbdemux = &dev->demux;
  909. dvbdemux->filternum = 256;
  910. dvbdemux->feednum = 256;
  911. dvbdemux->start_feed = dm1105_start_feed;
  912. dvbdemux->stop_feed = dm1105_stop_feed;
  913. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
  914. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
  915. ret = dvb_dmx_init(dvbdemux);
  916. if (ret < 0)
  917. goto err_dvb_unregister_adapter;
  918. dmx = &dvbdemux->dmx;
  919. dev->dmxdev.filternum = 256;
  920. dev->dmxdev.demux = dmx;
  921. dev->dmxdev.capabilities = 0;
  922. ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
  923. if (ret < 0)
  924. goto err_dvb_dmx_release;
  925. dev->hw_frontend.source = DMX_FRONTEND_0;
  926. ret = dmx->add_frontend(dmx, &dev->hw_frontend);
  927. if (ret < 0)
  928. goto err_dvb_dmxdev_release;
  929. dev->mem_frontend.source = DMX_MEMORY_FE;
  930. ret = dmx->add_frontend(dmx, &dev->mem_frontend);
  931. if (ret < 0)
  932. goto err_remove_hw_frontend;
  933. ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
  934. if (ret < 0)
  935. goto err_remove_mem_frontend;
  936. ret = frontend_init(dev);
  937. if (ret < 0)
  938. goto err_disconnect_frontend;
  939. dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
  940. dm1105_ir_init(dev);
  941. INIT_WORK(&dev->work, dm1105_dmx_buffer);
  942. sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
  943. dev->wq = create_singlethread_workqueue(dev->wqn);
  944. if (!dev->wq)
  945. goto err_dvb_net;
  946. ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
  947. DRIVER_NAME, dev);
  948. if (ret < 0)
  949. goto err_workqueue;
  950. return 0;
  951. err_workqueue:
  952. destroy_workqueue(dev->wq);
  953. err_dvb_net:
  954. dvb_net_release(&dev->dvbnet);
  955. err_disconnect_frontend:
  956. dmx->disconnect_frontend(dmx);
  957. err_remove_mem_frontend:
  958. dmx->remove_frontend(dmx, &dev->mem_frontend);
  959. err_remove_hw_frontend:
  960. dmx->remove_frontend(dmx, &dev->hw_frontend);
  961. err_dvb_dmxdev_release:
  962. dvb_dmxdev_release(&dev->dmxdev);
  963. err_dvb_dmx_release:
  964. dvb_dmx_release(dvbdemux);
  965. err_dvb_unregister_adapter:
  966. dvb_unregister_adapter(dvb_adapter);
  967. err_i2c_del_adapters:
  968. i2c_del_adapter(&dev->i2c_bb_adap);
  969. err_i2c_del_adapter:
  970. i2c_del_adapter(&dev->i2c_adap);
  971. err_dm1105_hw_exit:
  972. dm1105_hw_exit(dev);
  973. err_pci_iounmap:
  974. pci_iounmap(pdev, dev->io_mem);
  975. err_pci_release_regions:
  976. pci_release_regions(pdev);
  977. err_pci_disable_device:
  978. pci_disable_device(pdev);
  979. err_kfree:
  980. pci_set_drvdata(pdev, NULL);
  981. kfree(dev);
  982. return ret;
  983. }
  984. static void __devexit dm1105_remove(struct pci_dev *pdev)
  985. {
  986. struct dm1105_dev *dev = pci_get_drvdata(pdev);
  987. struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
  988. struct dvb_demux *dvbdemux = &dev->demux;
  989. struct dmx_demux *dmx = &dvbdemux->dmx;
  990. dm1105_ir_exit(dev);
  991. dmx->close(dmx);
  992. dvb_net_release(&dev->dvbnet);
  993. if (dev->fe)
  994. dvb_unregister_frontend(dev->fe);
  995. dmx->disconnect_frontend(dmx);
  996. dmx->remove_frontend(dmx, &dev->mem_frontend);
  997. dmx->remove_frontend(dmx, &dev->hw_frontend);
  998. dvb_dmxdev_release(&dev->dmxdev);
  999. dvb_dmx_release(dvbdemux);
  1000. dvb_unregister_adapter(dvb_adapter);
  1001. if (&dev->i2c_adap)
  1002. i2c_del_adapter(&dev->i2c_adap);
  1003. dm1105_hw_exit(dev);
  1004. synchronize_irq(pdev->irq);
  1005. free_irq(pdev->irq, dev);
  1006. pci_iounmap(pdev, dev->io_mem);
  1007. pci_release_regions(pdev);
  1008. pci_disable_device(pdev);
  1009. pci_set_drvdata(pdev, NULL);
  1010. dm1105_devcount--;
  1011. kfree(dev);
  1012. }
  1013. static struct pci_device_id dm1105_id_table[] __devinitdata = {
  1014. {
  1015. .vendor = PCI_VENDOR_ID_TRIGEM,
  1016. .device = PCI_DEVICE_ID_DM1105,
  1017. .subvendor = PCI_ANY_ID,
  1018. .subdevice = PCI_ANY_ID,
  1019. }, {
  1020. .vendor = PCI_VENDOR_ID_AXESS,
  1021. .device = PCI_DEVICE_ID_DM05,
  1022. .subvendor = PCI_ANY_ID,
  1023. .subdevice = PCI_ANY_ID,
  1024. }, {
  1025. /* empty */
  1026. },
  1027. };
  1028. MODULE_DEVICE_TABLE(pci, dm1105_id_table);
  1029. static struct pci_driver dm1105_driver = {
  1030. .name = DRIVER_NAME,
  1031. .id_table = dm1105_id_table,
  1032. .probe = dm1105_probe,
  1033. .remove = __devexit_p(dm1105_remove),
  1034. };
  1035. static int __init dm1105_init(void)
  1036. {
  1037. return pci_register_driver(&dm1105_driver);
  1038. }
  1039. static void __exit dm1105_exit(void)
  1040. {
  1041. pci_unregister_driver(&dm1105_driver);
  1042. }
  1043. module_init(dm1105_init);
  1044. module_exit(dm1105_exit);
  1045. MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
  1046. MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
  1047. MODULE_LICENSE("GPL");