avm_a1p.c 7.0 KB

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  1. /* $Id: avm_a1p.c,v 2.9.2.5 2004/01/24 20:47:19 keil Exp $
  2. *
  3. * low level stuff for the following AVM cards:
  4. * A1 PCMCIA
  5. * FRITZ!Card PCMCIA
  6. * FRITZ!Card PCMCIA 2.0
  7. *
  8. * Author Carsten Paeth
  9. * Copyright by Carsten Paeth <calle@calle.de>
  10. *
  11. * This software may be used and distributed according to the terms
  12. * of the GNU General Public License, incorporated herein by reference.
  13. *
  14. */
  15. #include <linux/init.h>
  16. #include "hisax.h"
  17. #include "isac.h"
  18. #include "hscx.h"
  19. #include "isdnl1.h"
  20. /* register offsets */
  21. #define ADDRREG_OFFSET 0x02
  22. #define DATAREG_OFFSET 0x03
  23. #define ASL0_OFFSET 0x04
  24. #define ASL1_OFFSET 0x05
  25. #define MODREG_OFFSET 0x06
  26. #define VERREG_OFFSET 0x07
  27. /* address offsets */
  28. #define ISAC_FIFO_OFFSET 0x00
  29. #define ISAC_REG_OFFSET 0x20
  30. #define HSCX_CH_DIFF 0x40
  31. #define HSCX_FIFO_OFFSET 0x80
  32. #define HSCX_REG_OFFSET 0xa0
  33. /* read bits ASL0 */
  34. #define ASL0_R_TIMER 0x10 /* active low */
  35. #define ASL0_R_ISAC 0x20 /* active low */
  36. #define ASL0_R_HSCX 0x40 /* active low */
  37. #define ASL0_R_TESTBIT 0x80
  38. #define ASL0_R_IRQPENDING (ASL0_R_ISAC|ASL0_R_HSCX|ASL0_R_TIMER)
  39. /* write bits ASL0 */
  40. #define ASL0_W_RESET 0x01
  41. #define ASL0_W_TDISABLE 0x02
  42. #define ASL0_W_TRESET 0x04
  43. #define ASL0_W_IRQENABLE 0x08
  44. #define ASL0_W_TESTBIT 0x80
  45. /* write bits ASL1 */
  46. #define ASL1_W_LED0 0x10
  47. #define ASL1_W_LED1 0x20
  48. #define ASL1_W_ENABLE_S0 0xC0
  49. #define byteout(addr,val) outb(val,addr)
  50. #define bytein(addr) inb(addr)
  51. static const char *avm_revision = "$Revision: 2.9.2.5 $";
  52. static inline u_char
  53. ReadISAC(struct IsdnCardState *cs, u_char offset)
  54. {
  55. u_char ret;
  56. offset -= 0x20;
  57. byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset);
  58. ret = bytein(cs->hw.avm.cfg_reg+DATAREG_OFFSET);
  59. return ret;
  60. }
  61. static inline void
  62. WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
  63. {
  64. offset -= 0x20;
  65. byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset);
  66. byteout(cs->hw.avm.cfg_reg+DATAREG_OFFSET, value);
  67. }
  68. static inline void
  69. ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
  70. {
  71. byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET);
  72. insb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
  73. }
  74. static inline void
  75. WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
  76. {
  77. byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET);
  78. outsb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
  79. }
  80. static inline u_char
  81. ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
  82. {
  83. u_char ret;
  84. offset -= 0x20;
  85. byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
  86. HSCX_REG_OFFSET+hscx*HSCX_CH_DIFF+offset);
  87. ret = bytein(cs->hw.avm.cfg_reg+DATAREG_OFFSET);
  88. return ret;
  89. }
  90. static inline void
  91. WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
  92. {
  93. offset -= 0x20;
  94. byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
  95. HSCX_REG_OFFSET+hscx*HSCX_CH_DIFF+offset);
  96. byteout(cs->hw.avm.cfg_reg+DATAREG_OFFSET, value);
  97. }
  98. static inline void
  99. ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
  100. {
  101. byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
  102. HSCX_FIFO_OFFSET+hscx*HSCX_CH_DIFF);
  103. insb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
  104. }
  105. static inline void
  106. WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
  107. {
  108. byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,
  109. HSCX_FIFO_OFFSET+hscx*HSCX_CH_DIFF);
  110. outsb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size);
  111. }
  112. /*
  113. * fast interrupt HSCX stuff goes here
  114. */
  115. #define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg)
  116. #define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data)
  117. #define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt)
  118. #define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt)
  119. #include "hscx_irq.c"
  120. static irqreturn_t
  121. avm_a1p_interrupt(int intno, void *dev_id)
  122. {
  123. struct IsdnCardState *cs = dev_id;
  124. u_char val, sval;
  125. u_long flags;
  126. spin_lock_irqsave(&cs->lock, flags);
  127. while ((sval = (~bytein(cs->hw.avm.cfg_reg+ASL0_OFFSET) & ASL0_R_IRQPENDING))) {
  128. if (cs->debug & L1_DEB_INTSTAT)
  129. debugl1(cs, "avm IntStatus %x", sval);
  130. if (sval & ASL0_R_HSCX) {
  131. val = ReadHSCX(cs, 1, HSCX_ISTA);
  132. if (val)
  133. hscx_int_main(cs, val);
  134. }
  135. if (sval & ASL0_R_ISAC) {
  136. val = ReadISAC(cs, ISAC_ISTA);
  137. if (val)
  138. isac_interrupt(cs, val);
  139. }
  140. }
  141. WriteHSCX(cs, 0, HSCX_MASK, 0xff);
  142. WriteHSCX(cs, 1, HSCX_MASK, 0xff);
  143. WriteISAC(cs, ISAC_MASK, 0xff);
  144. WriteISAC(cs, ISAC_MASK, 0x00);
  145. WriteHSCX(cs, 0, HSCX_MASK, 0x00);
  146. WriteHSCX(cs, 1, HSCX_MASK, 0x00);
  147. spin_unlock_irqrestore(&cs->lock, flags);
  148. return IRQ_HANDLED;
  149. }
  150. static int
  151. AVM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
  152. {
  153. u_long flags;
  154. switch (mt) {
  155. case CARD_RESET:
  156. spin_lock_irqsave(&cs->lock, flags);
  157. byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00);
  158. HZDELAY(HZ / 5 + 1);
  159. byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,ASL0_W_RESET);
  160. HZDELAY(HZ / 5 + 1);
  161. byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00);
  162. spin_unlock_irqrestore(&cs->lock, flags);
  163. return 0;
  164. case CARD_RELEASE:
  165. /* free_irq is done in HiSax_closecard(). */
  166. /* free_irq(cs->irq, cs); */
  167. return 0;
  168. case CARD_INIT:
  169. spin_lock_irqsave(&cs->lock, flags);
  170. byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,ASL0_W_TDISABLE|ASL0_W_TRESET|ASL0_W_IRQENABLE);
  171. clear_pending_isac_ints(cs);
  172. clear_pending_hscx_ints(cs);
  173. inithscxisac(cs, 1);
  174. inithscxisac(cs, 2);
  175. spin_unlock_irqrestore(&cs->lock, flags);
  176. return 0;
  177. case CARD_TEST:
  178. /* we really don't need it for the PCMCIA Version */
  179. return 0;
  180. default:
  181. /* all card drivers ignore others, so we do the same */
  182. return 0;
  183. }
  184. return 0;
  185. }
  186. int __devinit setup_avm_a1_pcmcia(struct IsdnCard *card)
  187. {
  188. u_char model, vers;
  189. struct IsdnCardState *cs = card->cs;
  190. char tmp[64];
  191. strcpy(tmp, avm_revision);
  192. printk(KERN_INFO "HiSax: AVM A1 PCMCIA driver Rev. %s\n",
  193. HiSax_getrev(tmp));
  194. if (cs->typ != ISDN_CTYPE_A1_PCMCIA)
  195. return (0);
  196. cs->hw.avm.cfg_reg = card->para[1];
  197. cs->irq = card->para[0];
  198. byteout(cs->hw.avm.cfg_reg+ASL1_OFFSET, ASL1_W_ENABLE_S0);
  199. byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00);
  200. HZDELAY(HZ / 5 + 1);
  201. byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,ASL0_W_RESET);
  202. HZDELAY(HZ / 5 + 1);
  203. byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00);
  204. byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET, ASL0_W_TDISABLE|ASL0_W_TRESET);
  205. model = bytein(cs->hw.avm.cfg_reg+MODREG_OFFSET);
  206. vers = bytein(cs->hw.avm.cfg_reg+VERREG_OFFSET);
  207. printk(KERN_INFO "AVM A1 PCMCIA: io 0x%x irq %d model %d version %d\n",
  208. cs->hw.avm.cfg_reg, cs->irq, model, vers);
  209. setup_isac(cs);
  210. cs->readisac = &ReadISAC;
  211. cs->writeisac = &WriteISAC;
  212. cs->readisacfifo = &ReadISACfifo;
  213. cs->writeisacfifo = &WriteISACfifo;
  214. cs->BC_Read_Reg = &ReadHSCX;
  215. cs->BC_Write_Reg = &WriteHSCX;
  216. cs->BC_Send_Data = &hscx_fill_fifo;
  217. cs->cardmsg = &AVM_card_msg;
  218. cs->irq_flags = IRQF_SHARED;
  219. cs->irq_func = &avm_a1p_interrupt;
  220. ISACVersion(cs, "AVM A1 PCMCIA:");
  221. if (HscxVersion(cs, "AVM A1 PCMCIA:")) {
  222. printk(KERN_WARNING
  223. "AVM A1 PCMCIA: wrong HSCX versions check IO address\n");
  224. return (0);
  225. }
  226. return (1);
  227. }