w6692.c 36 KB

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  1. /*
  2. * w6692.c mISDN driver for Winbond w6692 based cards
  3. *
  4. * Author Karsten Keil <kkeil@suse.de>
  5. * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz>
  6. *
  7. * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. */
  23. #include <linux/module.h>
  24. #include <linux/pci.h>
  25. #include <linux/delay.h>
  26. #include <linux/mISDNhw.h>
  27. #include <linux/slab.h>
  28. #include "w6692.h"
  29. #define W6692_REV "2.0"
  30. #define DBUSY_TIMER_VALUE 80
  31. enum {
  32. W6692_ASUS,
  33. W6692_WINBOND,
  34. W6692_USR
  35. };
  36. /* private data in the PCI devices list */
  37. struct w6692map {
  38. u_int subtype;
  39. char *name;
  40. };
  41. static const struct w6692map w6692_map[] =
  42. {
  43. {W6692_ASUS, "Dynalink/AsusCom IS64PH"},
  44. {W6692_WINBOND, "Winbond W6692"},
  45. {W6692_USR, "USR W6692"}
  46. };
  47. #ifndef PCI_VENDOR_ID_USR
  48. #define PCI_VENDOR_ID_USR 0x16ec
  49. #define PCI_DEVICE_ID_USR_6692 0x3409
  50. #endif
  51. struct w6692_ch {
  52. struct bchannel bch;
  53. u32 addr;
  54. struct timer_list timer;
  55. u8 b_mode;
  56. };
  57. struct w6692_hw {
  58. struct list_head list;
  59. struct pci_dev *pdev;
  60. char name[MISDN_MAX_IDLEN];
  61. u32 irq;
  62. u32 irqcnt;
  63. u32 addr;
  64. u32 fmask; /* feature mask - bit set per card nr */
  65. int subtype;
  66. spinlock_t lock; /* hw lock */
  67. u8 imask;
  68. u8 pctl;
  69. u8 xaddr;
  70. u8 xdata;
  71. u8 state;
  72. struct w6692_ch bc[2];
  73. struct dchannel dch;
  74. char log[64];
  75. };
  76. static LIST_HEAD(Cards);
  77. static DEFINE_RWLOCK(card_lock); /* protect Cards */
  78. static int w6692_cnt;
  79. static int debug;
  80. static u32 led;
  81. static u32 pots;
  82. static void
  83. _set_debug(struct w6692_hw *card)
  84. {
  85. card->dch.debug = debug;
  86. card->bc[0].bch.debug = debug;
  87. card->bc[1].bch.debug = debug;
  88. }
  89. static int
  90. set_debug(const char *val, struct kernel_param *kp)
  91. {
  92. int ret;
  93. struct w6692_hw *card;
  94. ret = param_set_uint(val, kp);
  95. if (!ret) {
  96. read_lock(&card_lock);
  97. list_for_each_entry(card, &Cards, list)
  98. _set_debug(card);
  99. read_unlock(&card_lock);
  100. }
  101. return ret;
  102. }
  103. MODULE_AUTHOR("Karsten Keil");
  104. MODULE_LICENSE("GPL v2");
  105. MODULE_VERSION(W6692_REV);
  106. module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
  107. MODULE_PARM_DESC(debug, "W6692 debug mask");
  108. module_param(led, uint, S_IRUGO | S_IWUSR);
  109. MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)");
  110. module_param(pots, uint, S_IRUGO | S_IWUSR);
  111. MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)");
  112. static inline u8
  113. ReadW6692(struct w6692_hw *card, u8 offset)
  114. {
  115. return inb(card->addr + offset);
  116. }
  117. static inline void
  118. WriteW6692(struct w6692_hw *card, u8 offset, u8 value)
  119. {
  120. outb(value, card->addr + offset);
  121. }
  122. static inline u8
  123. ReadW6692B(struct w6692_ch *bc, u8 offset)
  124. {
  125. return inb(bc->addr + offset);
  126. }
  127. static inline void
  128. WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value)
  129. {
  130. outb(value, bc->addr + offset);
  131. }
  132. static void
  133. enable_hwirq(struct w6692_hw *card)
  134. {
  135. WriteW6692(card, W_IMASK, card->imask);
  136. }
  137. static void
  138. disable_hwirq(struct w6692_hw *card)
  139. {
  140. WriteW6692(card, W_IMASK, 0xff);
  141. }
  142. static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"};
  143. static void
  144. W6692Version(struct w6692_hw *card)
  145. {
  146. int val;
  147. val = ReadW6692(card, W_D_RBCH);
  148. pr_notice("%s: Winbond W6692 version: %s\n", card->name,
  149. W6692Ver[(val >> 6) & 3]);
  150. }
  151. static void
  152. w6692_led_handler(struct w6692_hw *card, int on)
  153. {
  154. if ((!(card->fmask & led)) || card->subtype == W6692_USR)
  155. return;
  156. if (on) {
  157. card->xdata &= 0xfb; /* LED ON */
  158. WriteW6692(card, W_XDATA, card->xdata);
  159. } else {
  160. card->xdata |= 0x04; /* LED OFF */
  161. WriteW6692(card, W_XDATA, card->xdata);
  162. }
  163. }
  164. static void
  165. ph_command(struct w6692_hw *card, u8 cmd)
  166. {
  167. pr_debug("%s: ph_command %x\n", card->name, cmd);
  168. WriteW6692(card, W_CIX, cmd);
  169. }
  170. static void
  171. W6692_new_ph(struct w6692_hw *card)
  172. {
  173. if (card->state == W_L1CMD_RST)
  174. ph_command(card, W_L1CMD_DRC);
  175. schedule_event(&card->dch, FLG_PHCHANGE);
  176. }
  177. static void
  178. W6692_ph_bh(struct dchannel *dch)
  179. {
  180. struct w6692_hw *card = dch->hw;
  181. switch (card->state) {
  182. case W_L1CMD_RST:
  183. dch->state = 0;
  184. l1_event(dch->l1, HW_RESET_IND);
  185. break;
  186. case W_L1IND_CD:
  187. dch->state = 3;
  188. l1_event(dch->l1, HW_DEACT_CNF);
  189. break;
  190. case W_L1IND_DRD:
  191. dch->state = 3;
  192. l1_event(dch->l1, HW_DEACT_IND);
  193. break;
  194. case W_L1IND_CE:
  195. dch->state = 4;
  196. l1_event(dch->l1, HW_POWERUP_IND);
  197. break;
  198. case W_L1IND_LD:
  199. if (dch->state <= 5) {
  200. dch->state = 5;
  201. l1_event(dch->l1, ANYSIGNAL);
  202. } else {
  203. dch->state = 8;
  204. l1_event(dch->l1, LOSTFRAMING);
  205. }
  206. break;
  207. case W_L1IND_ARD:
  208. dch->state = 6;
  209. l1_event(dch->l1, INFO2);
  210. break;
  211. case W_L1IND_AI8:
  212. dch->state = 7;
  213. l1_event(dch->l1, INFO4_P8);
  214. break;
  215. case W_L1IND_AI10:
  216. dch->state = 7;
  217. l1_event(dch->l1, INFO4_P10);
  218. break;
  219. default:
  220. pr_debug("%s: TE unknown state %02x dch state %02x\n",
  221. card->name, card->state, dch->state);
  222. break;
  223. }
  224. pr_debug("%s: TE newstate %02x\n", card->name, dch->state);
  225. }
  226. static void
  227. W6692_empty_Dfifo(struct w6692_hw *card, int count)
  228. {
  229. struct dchannel *dch = &card->dch;
  230. u8 *ptr;
  231. pr_debug("%s: empty_Dfifo %d\n", card->name, count);
  232. if (!dch->rx_skb) {
  233. dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC);
  234. if (!dch->rx_skb) {
  235. pr_info("%s: D receive out of memory\n", card->name);
  236. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  237. return;
  238. }
  239. }
  240. if ((dch->rx_skb->len + count) >= dch->maxlen) {
  241. pr_debug("%s: empty_Dfifo overrun %d\n", card->name,
  242. dch->rx_skb->len + count);
  243. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  244. return;
  245. }
  246. ptr = skb_put(dch->rx_skb, count);
  247. insb(card->addr + W_D_RFIFO, ptr, count);
  248. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  249. if (debug & DEBUG_HW_DFIFO) {
  250. snprintf(card->log, 63, "D-recv %s %d ",
  251. card->name, count);
  252. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  253. }
  254. }
  255. static void
  256. W6692_fill_Dfifo(struct w6692_hw *card)
  257. {
  258. struct dchannel *dch = &card->dch;
  259. int count;
  260. u8 *ptr;
  261. u8 cmd = W_D_CMDR_XMS;
  262. pr_debug("%s: fill_Dfifo\n", card->name);
  263. if (!dch->tx_skb)
  264. return;
  265. count = dch->tx_skb->len - dch->tx_idx;
  266. if (count <= 0)
  267. return;
  268. if (count > W_D_FIFO_THRESH)
  269. count = W_D_FIFO_THRESH;
  270. else
  271. cmd |= W_D_CMDR_XME;
  272. ptr = dch->tx_skb->data + dch->tx_idx;
  273. dch->tx_idx += count;
  274. outsb(card->addr + W_D_XFIFO, ptr, count);
  275. WriteW6692(card, W_D_CMDR, cmd);
  276. if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  277. pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name);
  278. del_timer(&dch->timer);
  279. }
  280. init_timer(&dch->timer);
  281. dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ)/1000);
  282. add_timer(&dch->timer);
  283. if (debug & DEBUG_HW_DFIFO) {
  284. snprintf(card->log, 63, "D-send %s %d ",
  285. card->name, count);
  286. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  287. }
  288. }
  289. static void
  290. d_retransmit(struct w6692_hw *card)
  291. {
  292. struct dchannel *dch = &card->dch;
  293. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  294. del_timer(&dch->timer);
  295. #ifdef FIXME
  296. if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags))
  297. dchannel_sched_event(dch, D_CLEARBUSY);
  298. #endif
  299. if (test_bit(FLG_TX_BUSY, &dch->Flags)) {
  300. /* Restart frame */
  301. dch->tx_idx = 0;
  302. W6692_fill_Dfifo(card);
  303. } else if (dch->tx_skb) { /* should not happen */
  304. pr_info("%s: %s without TX_BUSY\n", card->name, __func__);
  305. test_and_set_bit(FLG_TX_BUSY, &dch->Flags);
  306. dch->tx_idx = 0;
  307. W6692_fill_Dfifo(card);
  308. } else {
  309. pr_info("%s: XDU no TX_BUSY\n", card->name);
  310. if (get_next_dframe(dch))
  311. W6692_fill_Dfifo(card);
  312. }
  313. }
  314. static void
  315. handle_rxD(struct w6692_hw *card) {
  316. u8 stat;
  317. int count;
  318. stat = ReadW6692(card, W_D_RSTA);
  319. if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
  320. if (stat & W_D_RSTA_RDOV) {
  321. pr_debug("%s: D-channel RDOV\n", card->name);
  322. #ifdef ERROR_STATISTIC
  323. card->dch.err_rx++;
  324. #endif
  325. }
  326. if (stat & W_D_RSTA_CRCE) {
  327. pr_debug("%s: D-channel CRC error\n", card->name);
  328. #ifdef ERROR_STATISTIC
  329. card->dch.err_crc++;
  330. #endif
  331. }
  332. if (stat & W_D_RSTA_RMB) {
  333. pr_debug("%s: D-channel ABORT\n", card->name);
  334. #ifdef ERROR_STATISTIC
  335. card->dch.err_rx++;
  336. #endif
  337. }
  338. if (card->dch.rx_skb)
  339. dev_kfree_skb(card->dch.rx_skb);
  340. card->dch.rx_skb = NULL;
  341. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
  342. } else {
  343. count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
  344. if (count == 0)
  345. count = W_D_FIFO_THRESH;
  346. W6692_empty_Dfifo(card, count);
  347. recv_Dchannel(&card->dch);
  348. }
  349. }
  350. static void
  351. handle_txD(struct w6692_hw *card) {
  352. if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags))
  353. del_timer(&card->dch.timer);
  354. if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) {
  355. W6692_fill_Dfifo(card);
  356. } else {
  357. if (card->dch.tx_skb)
  358. dev_kfree_skb(card->dch.tx_skb);
  359. if (get_next_dframe(&card->dch))
  360. W6692_fill_Dfifo(card);
  361. }
  362. }
  363. static void
  364. handle_statusD(struct w6692_hw *card)
  365. {
  366. struct dchannel *dch = &card->dch;
  367. u8 exval, v1, cir;
  368. exval = ReadW6692(card, W_D_EXIR);
  369. pr_debug("%s: D_EXIR %02x\n", card->name, exval);
  370. if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {
  371. /* Transmit underrun/collision */
  372. pr_debug("%s: D-channel underrun/collision\n", card->name);
  373. #ifdef ERROR_STATISTIC
  374. dch->err_tx++;
  375. #endif
  376. d_retransmit(card);
  377. }
  378. if (exval & W_D_EXI_RDOV) { /* RDOV */
  379. pr_debug("%s: D-channel RDOV\n", card->name);
  380. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST);
  381. }
  382. if (exval & W_D_EXI_TIN2) /* TIN2 - never */
  383. pr_debug("%s: spurious TIN2 interrupt\n", card->name);
  384. if (exval & W_D_EXI_MOC) { /* MOC - not supported */
  385. v1 = ReadW6692(card, W_MOSR);
  386. pr_debug("%s: spurious MOC interrupt MOSR %02x\n",
  387. card->name, v1);
  388. }
  389. if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */
  390. cir = ReadW6692(card, W_CIR);
  391. pr_debug("%s: ISC CIR %02X\n", card->name, cir);
  392. if (cir & W_CIR_ICC) {
  393. v1 = cir & W_CIR_COD_MASK;
  394. pr_debug("%s: ph_state_change %x -> %x\n", card->name,
  395. dch->state, v1);
  396. card->state = v1;
  397. if (card->fmask & led) {
  398. switch (v1) {
  399. case W_L1IND_AI8:
  400. case W_L1IND_AI10:
  401. w6692_led_handler(card, 1);
  402. break;
  403. default:
  404. w6692_led_handler(card, 0);
  405. break;
  406. }
  407. }
  408. W6692_new_ph(card);
  409. }
  410. if (cir & W_CIR_SCC) {
  411. v1 = ReadW6692(card, W_SQR);
  412. pr_debug("%s: SCC SQR %02X\n", card->name, v1);
  413. }
  414. }
  415. if (exval & W_D_EXI_WEXP)
  416. pr_debug("%s: spurious WEXP interrupt!\n", card->name);
  417. if (exval & W_D_EXI_TEXP)
  418. pr_debug("%s: spurious TEXP interrupt!\n", card->name);
  419. }
  420. static void
  421. W6692_empty_Bfifo(struct w6692_ch *wch, int count)
  422. {
  423. struct w6692_hw *card = wch->bch.hw;
  424. u8 *ptr;
  425. pr_debug("%s: empty_Bfifo %d\n", card->name, count);
  426. if (unlikely(wch->bch.state == ISDN_P_NONE)) {
  427. pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name);
  428. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  429. if (wch->bch.rx_skb)
  430. skb_trim(wch->bch.rx_skb, 0);
  431. return;
  432. }
  433. if (!wch->bch.rx_skb) {
  434. wch->bch.rx_skb = mI_alloc_skb(wch->bch.maxlen, GFP_ATOMIC);
  435. if (unlikely(!wch->bch.rx_skb)) {
  436. pr_info("%s: B receive out of memory\n", card->name);
  437. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  438. W_B_CMDR_RACT);
  439. return;
  440. }
  441. }
  442. if (wch->bch.rx_skb->len + count > wch->bch.maxlen) {
  443. pr_debug("%s: empty_Bfifo incoming packet too large\n",
  444. card->name);
  445. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  446. skb_trim(wch->bch.rx_skb, 0);
  447. return;
  448. }
  449. ptr = skb_put(wch->bch.rx_skb, count);
  450. insb(wch->addr + W_B_RFIFO, ptr, count);
  451. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  452. if (debug & DEBUG_HW_DFIFO) {
  453. snprintf(card->log, 63, "B%1d-recv %s %d ",
  454. wch->bch.nr, card->name, count);
  455. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  456. }
  457. }
  458. static void
  459. W6692_fill_Bfifo(struct w6692_ch *wch)
  460. {
  461. struct w6692_hw *card = wch->bch.hw;
  462. int count;
  463. u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;
  464. pr_debug("%s: fill Bfifo\n", card->name);
  465. if (!wch->bch.tx_skb)
  466. return;
  467. count = wch->bch.tx_skb->len - wch->bch.tx_idx;
  468. if (count <= 0)
  469. return;
  470. ptr = wch->bch.tx_skb->data + wch->bch.tx_idx;
  471. if (count > W_B_FIFO_THRESH)
  472. count = W_B_FIFO_THRESH;
  473. else if (test_bit(FLG_HDLC, &wch->bch.Flags))
  474. cmd |= W_B_CMDR_XME;
  475. pr_debug("%s: fill Bfifo%d/%d\n", card->name,
  476. count, wch->bch.tx_idx);
  477. wch->bch.tx_idx += count;
  478. outsb(wch->addr + W_B_XFIFO, ptr, count);
  479. WriteW6692B(wch, W_B_CMDR, cmd);
  480. if (debug & DEBUG_HW_DFIFO) {
  481. snprintf(card->log, 63, "B%1d-send %s %d ",
  482. wch->bch.nr, card->name, count);
  483. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  484. }
  485. }
  486. #if 0
  487. static int
  488. setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb)
  489. {
  490. struct w6692_hw *card = wch->bch.hw;
  491. u16 *vol = (u16 *)skb->data;
  492. u8 val;
  493. if ((!(card->fmask & pots)) ||
  494. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  495. return -ENODEV;
  496. if (skb->len < 2)
  497. return -EINVAL;
  498. if (*vol > 7)
  499. return -EINVAL;
  500. val = *vol & 7;
  501. val = 7 - val;
  502. if (mic) {
  503. val <<= 3;
  504. card->xaddr &= 0xc7;
  505. } else {
  506. card->xaddr &= 0xf8;
  507. }
  508. card->xaddr |= val;
  509. WriteW6692(card, W_XADDR, card->xaddr);
  510. return 0;
  511. }
  512. static int
  513. enable_pots(struct w6692_ch *wch)
  514. {
  515. struct w6692_hw *card = wch->bch.hw;
  516. if ((!(card->fmask & pots)) ||
  517. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  518. return -ENODEV;
  519. wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0;
  520. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  521. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  522. card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0);
  523. WriteW6692(card, W_PCTL, card->pctl);
  524. return 0;
  525. }
  526. #endif
  527. static int
  528. disable_pots(struct w6692_ch *wch)
  529. {
  530. struct w6692_hw *card = wch->bch.hw;
  531. if (!(card->fmask & pots))
  532. return -ENODEV;
  533. wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0);
  534. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  535. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  536. W_B_CMDR_XRST);
  537. return 0;
  538. }
  539. static int
  540. w6692_mode(struct w6692_ch *wch, u32 pr)
  541. {
  542. struct w6692_hw *card;
  543. card = wch->bch.hw;
  544. pr_debug("%s: B%d protocol %x-->%x\n", card->name,
  545. wch->bch.nr, wch->bch.state, pr);
  546. switch (pr) {
  547. case ISDN_P_NONE:
  548. if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM))
  549. disable_pots(wch);
  550. wch->b_mode = 0;
  551. mISDN_clear_bchannel(&wch->bch);
  552. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  553. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  554. test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
  555. test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  556. break;
  557. case ISDN_P_B_RAW:
  558. wch->b_mode = W_B_MODE_MMS;
  559. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  560. WriteW6692B(wch, W_B_EXIM, 0);
  561. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  562. W_B_CMDR_XRST);
  563. test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  564. break;
  565. case ISDN_P_B_HDLC:
  566. wch->b_mode = W_B_MODE_ITF;
  567. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  568. WriteW6692B(wch, W_B_ADM1, 0xff);
  569. WriteW6692B(wch, W_B_ADM2, 0xff);
  570. WriteW6692B(wch, W_B_EXIM, 0);
  571. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  572. W_B_CMDR_XRST);
  573. test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
  574. break;
  575. default:
  576. pr_info("%s: protocol %x not known\n", card->name, pr);
  577. return -ENOPROTOOPT;
  578. }
  579. wch->bch.state = pr;
  580. return 0;
  581. }
  582. static void
  583. send_next(struct w6692_ch *wch)
  584. {
  585. if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len)
  586. W6692_fill_Bfifo(wch);
  587. else {
  588. if (wch->bch.tx_skb) {
  589. /* send confirm, on trans, free on hdlc. */
  590. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  591. confirm_Bsend(&wch->bch);
  592. dev_kfree_skb(wch->bch.tx_skb);
  593. }
  594. if (get_next_bframe(&wch->bch))
  595. W6692_fill_Bfifo(wch);
  596. }
  597. }
  598. static void
  599. W6692B_interrupt(struct w6692_hw *card, int ch)
  600. {
  601. struct w6692_ch *wch = &card->bc[ch];
  602. int count;
  603. u8 stat, star = 0;
  604. stat = ReadW6692B(wch, W_B_EXIR);
  605. pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat);
  606. if (stat & W_B_EXI_RME) {
  607. star = ReadW6692B(wch, W_B_STAR);
  608. if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
  609. if ((star & W_B_STAR_RDOV) &&
  610. test_bit(FLG_ACTIVE, &wch->bch.Flags)) {
  611. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  612. wch->bch.nr, wch->bch.state);
  613. #ifdef ERROR_STATISTIC
  614. wch->bch.err_rdo++;
  615. #endif
  616. }
  617. if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
  618. if (star & W_B_STAR_CRCE) {
  619. pr_debug("%s: B%d CRC error\n",
  620. card->name, wch->bch.nr);
  621. #ifdef ERROR_STATISTIC
  622. wch->bch.err_crc++;
  623. #endif
  624. }
  625. if (star & W_B_STAR_RMB) {
  626. pr_debug("%s: B%d message abort\n",
  627. card->name, wch->bch.nr);
  628. #ifdef ERROR_STATISTIC
  629. wch->bch.err_inv++;
  630. #endif
  631. }
  632. }
  633. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  634. W_B_CMDR_RRST | W_B_CMDR_RACT);
  635. if (wch->bch.rx_skb)
  636. skb_trim(wch->bch.rx_skb, 0);
  637. } else {
  638. count = ReadW6692B(wch, W_B_RBCL) &
  639. (W_B_FIFO_THRESH - 1);
  640. if (count == 0)
  641. count = W_B_FIFO_THRESH;
  642. W6692_empty_Bfifo(wch, count);
  643. recv_Bchannel(&wch->bch, 0);
  644. }
  645. }
  646. if (stat & W_B_EXI_RMR) {
  647. if (!(stat & W_B_EXI_RME))
  648. star = ReadW6692B(wch, W_B_STAR);
  649. if (star & W_B_STAR_RDOV) {
  650. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  651. wch->bch.nr, wch->bch.state);
  652. #ifdef ERROR_STATISTIC
  653. wch->bch.err_rdo++;
  654. #endif
  655. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  656. W_B_CMDR_RRST | W_B_CMDR_RACT);
  657. } else {
  658. W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);
  659. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags) &&
  660. wch->bch.rx_skb && (wch->bch.rx_skb->len > 0))
  661. recv_Bchannel(&wch->bch, 0);
  662. }
  663. }
  664. if (stat & W_B_EXI_RDOV) {
  665. /* only if it is not handled yet */
  666. if (!(star & W_B_STAR_RDOV)) {
  667. pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name,
  668. wch->bch.nr, wch->bch.state);
  669. #ifdef ERROR_STATISTIC
  670. wch->bch.err_rdo++;
  671. #endif
  672. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  673. W_B_CMDR_RRST | W_B_CMDR_RACT);
  674. }
  675. }
  676. if (stat & W_B_EXI_XFR) {
  677. if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) {
  678. star = ReadW6692B(wch, W_B_STAR);
  679. pr_debug("%s: B%d star %02x\n", card->name,
  680. wch->bch.nr, star);
  681. }
  682. if (star & W_B_STAR_XDOW) {
  683. pr_debug("%s: B%d XDOW proto=%x\n", card->name,
  684. wch->bch.nr, wch->bch.state);
  685. #ifdef ERROR_STATISTIC
  686. wch->bch.err_xdu++;
  687. #endif
  688. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST |
  689. W_B_CMDR_RACT);
  690. /* resend */
  691. if (wch->bch.tx_skb) {
  692. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  693. wch->bch.tx_idx = 0;
  694. }
  695. }
  696. send_next(wch);
  697. if (stat & W_B_EXI_XDUN)
  698. return; /* handle XDOW only once */
  699. }
  700. if (stat & W_B_EXI_XDUN) {
  701. pr_debug("%s: B%d XDUN proto=%x\n", card->name,
  702. wch->bch.nr, wch->bch.state);
  703. #ifdef ERROR_STATISTIC
  704. wch->bch.err_xdu++;
  705. #endif
  706. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
  707. /* resend */
  708. if (wch->bch.tx_skb) {
  709. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  710. wch->bch.tx_idx = 0;
  711. }
  712. send_next(wch);
  713. }
  714. }
  715. static irqreturn_t
  716. w6692_irq(int intno, void *dev_id)
  717. {
  718. struct w6692_hw *card = dev_id;
  719. u8 ista;
  720. spin_lock(&card->lock);
  721. ista = ReadW6692(card, W_ISTA);
  722. if ((ista | card->imask) == card->imask) {
  723. /* possible a shared IRQ reqest */
  724. spin_unlock(&card->lock);
  725. return IRQ_NONE;
  726. }
  727. card->irqcnt++;
  728. pr_debug("%s: ista %02x\n", card->name, ista);
  729. ista &= ~card->imask;
  730. if (ista & W_INT_B1_EXI)
  731. W6692B_interrupt(card, 0);
  732. if (ista & W_INT_B2_EXI)
  733. W6692B_interrupt(card, 1);
  734. if (ista & W_INT_D_RME)
  735. handle_rxD(card);
  736. if (ista & W_INT_D_RMR)
  737. W6692_empty_Dfifo(card, W_D_FIFO_THRESH);
  738. if (ista & W_INT_D_XFR)
  739. handle_txD(card);
  740. if (ista & W_INT_D_EXI)
  741. handle_statusD(card);
  742. if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */
  743. pr_debug("%s: W6692 spurious XINT!\n", card->name);
  744. /* End IRQ Handler */
  745. spin_unlock(&card->lock);
  746. return IRQ_HANDLED;
  747. }
  748. static void
  749. dbusy_timer_handler(struct dchannel *dch)
  750. {
  751. struct w6692_hw *card = dch->hw;
  752. int rbch, star;
  753. u_long flags;
  754. if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  755. spin_lock_irqsave(&card->lock, flags);
  756. rbch = ReadW6692(card, W_D_RBCH);
  757. star = ReadW6692(card, W_D_STAR);
  758. pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
  759. card->name, rbch, star);
  760. if (star & W_D_STAR_XBZ) /* D-Channel Busy */
  761. test_and_set_bit(FLG_L1_BUSY, &dch->Flags);
  762. else {
  763. /* discard frame; reset transceiver */
  764. test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags);
  765. if (dch->tx_idx)
  766. dch->tx_idx = 0;
  767. else
  768. pr_info("%s: W6692 D-Channel Busy no tx_idx\n",
  769. card->name);
  770. /* Transmitter reset */
  771. WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST);
  772. }
  773. spin_unlock_irqrestore(&card->lock, flags);
  774. }
  775. }
  776. void initW6692(struct w6692_hw *card)
  777. {
  778. u8 val;
  779. card->dch.timer.function = (void *)dbusy_timer_handler;
  780. card->dch.timer.data = (u_long)&card->dch;
  781. init_timer(&card->dch.timer);
  782. w6692_mode(&card->bc[0], ISDN_P_NONE);
  783. w6692_mode(&card->bc[1], ISDN_P_NONE);
  784. WriteW6692(card, W_D_CTL, 0x00);
  785. disable_hwirq(card);
  786. WriteW6692(card, W_D_SAM, 0xff);
  787. WriteW6692(card, W_D_TAM, 0xff);
  788. WriteW6692(card, W_D_MODE, W_D_MODE_RACT);
  789. card->state = W_L1CMD_RST;
  790. ph_command(card, W_L1CMD_RST);
  791. ph_command(card, W_L1CMD_ECK);
  792. /* enable all IRQ but extern */
  793. card->imask = 0x18;
  794. WriteW6692(card, W_D_EXIM, 0x00);
  795. WriteW6692B(&card->bc[0], W_B_EXIM, 0);
  796. WriteW6692B(&card->bc[1], W_B_EXIM, 0);
  797. /* Reset D-chan receiver and transmitter */
  798. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
  799. /* Reset B-chan receiver and transmitter */
  800. WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  801. WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  802. /* enable peripheral */
  803. if (card->subtype == W6692_USR) {
  804. /* seems that USR implemented some power control features
  805. * Pin 79 is connected to the oscilator circuit so we
  806. * have to handle it here
  807. */
  808. card->pctl = 0x80;
  809. card->xdata = 0;
  810. WriteW6692(card, W_PCTL, card->pctl);
  811. WriteW6692(card, W_XDATA, card->xdata);
  812. } else {
  813. card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 |
  814. W_PCTL_OE1 | W_PCTL_OE0;
  815. card->xaddr = 0x00;/* all sw off */
  816. if (card->fmask & pots)
  817. card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */
  818. if (card->fmask & led)
  819. card->xdata |= 0x04; /* LED OFF */
  820. if ((card->fmask & pots) || (card->fmask & led)) {
  821. WriteW6692(card, W_PCTL, card->pctl);
  822. WriteW6692(card, W_XADDR, card->xaddr);
  823. WriteW6692(card, W_XDATA, card->xdata);
  824. val = ReadW6692(card, W_XADDR);
  825. if (debug & DEBUG_HW)
  826. pr_notice("%s: W_XADDR=%02x\n",
  827. card->name, val);
  828. }
  829. }
  830. }
  831. static void
  832. reset_w6692(struct w6692_hw *card)
  833. {
  834. WriteW6692(card, W_D_CTL, W_D_CTL_SRST);
  835. mdelay(10);
  836. WriteW6692(card, W_D_CTL, 0);
  837. }
  838. static int
  839. init_card(struct w6692_hw *card)
  840. {
  841. int cnt = 3;
  842. u_long flags;
  843. spin_lock_irqsave(&card->lock, flags);
  844. disable_hwirq(card);
  845. spin_unlock_irqrestore(&card->lock, flags);
  846. if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) {
  847. pr_info("%s: couldn't get interrupt %d\n", card->name,
  848. card->irq);
  849. return -EIO;
  850. }
  851. while (cnt--) {
  852. spin_lock_irqsave(&card->lock, flags);
  853. initW6692(card);
  854. enable_hwirq(card);
  855. spin_unlock_irqrestore(&card->lock, flags);
  856. /* Timeout 10ms */
  857. msleep_interruptible(10);
  858. if (debug & DEBUG_HW)
  859. pr_notice("%s: IRQ %d count %d\n", card->name,
  860. card->irq, card->irqcnt);
  861. if (!card->irqcnt) {
  862. pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
  863. card->name, card->irq, 3 - cnt);
  864. reset_w6692(card);
  865. } else
  866. return 0;
  867. }
  868. free_irq(card->irq, card);
  869. return -EIO;
  870. }
  871. static int
  872. w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
  873. {
  874. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  875. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  876. struct w6692_hw *card = bch->hw;
  877. int ret = -EINVAL;
  878. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  879. u32 id;
  880. u_long flags;
  881. switch (hh->prim) {
  882. case PH_DATA_REQ:
  883. spin_lock_irqsave(&card->lock, flags);
  884. ret = bchannel_senddata(bch, skb);
  885. if (ret > 0) { /* direct TX */
  886. id = hh->id; /* skb can be freed */
  887. ret = 0;
  888. W6692_fill_Bfifo(bc);
  889. spin_unlock_irqrestore(&card->lock, flags);
  890. if (!test_bit(FLG_TRANSPARENT, &bch->Flags))
  891. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  892. } else
  893. spin_unlock_irqrestore(&card->lock, flags);
  894. return ret;
  895. case PH_ACTIVATE_REQ:
  896. spin_lock_irqsave(&card->lock, flags);
  897. if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
  898. ret = w6692_mode(bc, ch->protocol);
  899. else
  900. ret = 0;
  901. spin_unlock_irqrestore(&card->lock, flags);
  902. if (!ret)
  903. _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
  904. NULL, GFP_KERNEL);
  905. break;
  906. case PH_DEACTIVATE_REQ:
  907. spin_lock_irqsave(&card->lock, flags);
  908. mISDN_clear_bchannel(bch);
  909. w6692_mode(bc, ISDN_P_NONE);
  910. spin_unlock_irqrestore(&card->lock, flags);
  911. _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
  912. NULL, GFP_KERNEL);
  913. ret = 0;
  914. break;
  915. default:
  916. pr_info("%s: %s unknown prim(%x,%x)\n",
  917. card->name, __func__, hh->prim, hh->id);
  918. ret = -EINVAL;
  919. }
  920. if (!ret)
  921. dev_kfree_skb(skb);
  922. return ret;
  923. }
  924. static int
  925. channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
  926. {
  927. int ret = 0;
  928. switch (cq->op) {
  929. case MISDN_CTRL_GETOP:
  930. cq->op = 0;
  931. break;
  932. /* Nothing implemented yet */
  933. case MISDN_CTRL_FILL_EMPTY:
  934. default:
  935. pr_info("%s: unknown Op %x\n", __func__, cq->op);
  936. ret = -EINVAL;
  937. break;
  938. }
  939. return ret;
  940. }
  941. static int
  942. open_bchannel(struct w6692_hw *card, struct channel_req *rq)
  943. {
  944. struct bchannel *bch;
  945. if (rq->adr.channel > 2)
  946. return -EINVAL;
  947. if (rq->protocol == ISDN_P_NONE)
  948. return -EINVAL;
  949. bch = &card->bc[rq->adr.channel - 1].bch;
  950. if (test_and_set_bit(FLG_OPEN, &bch->Flags))
  951. return -EBUSY; /* b-channel can be only open once */
  952. test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags);
  953. bch->ch.protocol = rq->protocol;
  954. rq->ch = &bch->ch;
  955. return 0;
  956. }
  957. static int
  958. channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
  959. {
  960. int ret = 0;
  961. switch (cq->op) {
  962. case MISDN_CTRL_GETOP:
  963. cq->op = 0;
  964. break;
  965. default:
  966. pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
  967. ret = -EINVAL;
  968. break;
  969. }
  970. return ret;
  971. }
  972. static int
  973. w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  974. {
  975. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  976. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  977. struct w6692_hw *card = bch->hw;
  978. int ret = -EINVAL;
  979. u_long flags;
  980. pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg);
  981. switch (cmd) {
  982. case CLOSE_CHANNEL:
  983. test_and_clear_bit(FLG_OPEN, &bch->Flags);
  984. if (test_bit(FLG_ACTIVE, &bch->Flags)) {
  985. spin_lock_irqsave(&card->lock, flags);
  986. mISDN_freebchannel(bch);
  987. w6692_mode(bc, ISDN_P_NONE);
  988. spin_unlock_irqrestore(&card->lock, flags);
  989. } else {
  990. skb_queue_purge(&bch->rqueue);
  991. bch->rcount = 0;
  992. }
  993. ch->protocol = ISDN_P_NONE;
  994. ch->peer = NULL;
  995. module_put(THIS_MODULE);
  996. ret = 0;
  997. break;
  998. case CONTROL_CHANNEL:
  999. ret = channel_bctrl(bch, arg);
  1000. break;
  1001. default:
  1002. pr_info("%s: %s unknown prim(%x)\n",
  1003. card->name, __func__, cmd);
  1004. }
  1005. return ret;
  1006. }
  1007. static int
  1008. w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb)
  1009. {
  1010. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1011. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1012. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1013. int ret = -EINVAL;
  1014. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  1015. u32 id;
  1016. u_long flags;
  1017. switch (hh->prim) {
  1018. case PH_DATA_REQ:
  1019. spin_lock_irqsave(&card->lock, flags);
  1020. ret = dchannel_senddata(dch, skb);
  1021. if (ret > 0) { /* direct TX */
  1022. id = hh->id; /* skb can be freed */
  1023. W6692_fill_Dfifo(card);
  1024. ret = 0;
  1025. spin_unlock_irqrestore(&card->lock, flags);
  1026. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  1027. } else
  1028. spin_unlock_irqrestore(&card->lock, flags);
  1029. return ret;
  1030. case PH_ACTIVATE_REQ:
  1031. ret = l1_event(dch->l1, hh->prim);
  1032. break;
  1033. case PH_DEACTIVATE_REQ:
  1034. test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
  1035. ret = l1_event(dch->l1, hh->prim);
  1036. break;
  1037. }
  1038. if (!ret)
  1039. dev_kfree_skb(skb);
  1040. return ret;
  1041. }
  1042. static int
  1043. w6692_l1callback(struct dchannel *dch, u32 cmd)
  1044. {
  1045. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1046. u_long flags;
  1047. pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state);
  1048. switch (cmd) {
  1049. case INFO3_P8:
  1050. spin_lock_irqsave(&card->lock, flags);
  1051. ph_command(card, W_L1CMD_AR8);
  1052. spin_unlock_irqrestore(&card->lock, flags);
  1053. break;
  1054. case INFO3_P10:
  1055. spin_lock_irqsave(&card->lock, flags);
  1056. ph_command(card, W_L1CMD_AR10);
  1057. spin_unlock_irqrestore(&card->lock, flags);
  1058. break;
  1059. case HW_RESET_REQ:
  1060. spin_lock_irqsave(&card->lock, flags);
  1061. if (card->state != W_L1IND_DRD)
  1062. ph_command(card, W_L1CMD_RST);
  1063. ph_command(card, W_L1CMD_ECK);
  1064. spin_unlock_irqrestore(&card->lock, flags);
  1065. break;
  1066. case HW_DEACT_REQ:
  1067. skb_queue_purge(&dch->squeue);
  1068. if (dch->tx_skb) {
  1069. dev_kfree_skb(dch->tx_skb);
  1070. dch->tx_skb = NULL;
  1071. }
  1072. dch->tx_idx = 0;
  1073. if (dch->rx_skb) {
  1074. dev_kfree_skb(dch->rx_skb);
  1075. dch->rx_skb = NULL;
  1076. }
  1077. test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
  1078. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  1079. del_timer(&dch->timer);
  1080. break;
  1081. case HW_POWERUP_REQ:
  1082. spin_lock_irqsave(&card->lock, flags);
  1083. ph_command(card, W_L1CMD_ECK);
  1084. spin_unlock_irqrestore(&card->lock, flags);
  1085. break;
  1086. case PH_ACTIVATE_IND:
  1087. test_and_set_bit(FLG_ACTIVE, &dch->Flags);
  1088. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1089. GFP_ATOMIC);
  1090. break;
  1091. case PH_DEACTIVATE_IND:
  1092. test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
  1093. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1094. GFP_ATOMIC);
  1095. break;
  1096. default:
  1097. pr_debug("%s: %s unknown command %x\n", card->name,
  1098. __func__, cmd);
  1099. return -1;
  1100. }
  1101. return 0;
  1102. }
  1103. static int
  1104. open_dchannel(struct w6692_hw *card, struct channel_req *rq)
  1105. {
  1106. pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__,
  1107. card->dch.dev.id, __builtin_return_address(1));
  1108. if (rq->protocol != ISDN_P_TE_S0)
  1109. return -EINVAL;
  1110. if (rq->adr.channel == 1)
  1111. /* E-Channel not supported */
  1112. return -EINVAL;
  1113. rq->ch = &card->dch.dev.D;
  1114. rq->ch->protocol = rq->protocol;
  1115. if (card->dch.state == 7)
  1116. _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
  1117. 0, NULL, GFP_KERNEL);
  1118. return 0;
  1119. }
  1120. static int
  1121. w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  1122. {
  1123. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1124. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1125. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1126. struct channel_req *rq;
  1127. int err = 0;
  1128. pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg);
  1129. switch (cmd) {
  1130. case OPEN_CHANNEL:
  1131. rq = arg;
  1132. if (rq->protocol == ISDN_P_TE_S0)
  1133. err = open_dchannel(card, rq);
  1134. else
  1135. err = open_bchannel(card, rq);
  1136. if (err)
  1137. break;
  1138. if (!try_module_get(THIS_MODULE))
  1139. pr_info("%s: cannot get module\n", card->name);
  1140. break;
  1141. case CLOSE_CHANNEL:
  1142. pr_debug("%s: dev(%d) close from %p\n", card->name,
  1143. dch->dev.id, __builtin_return_address(0));
  1144. module_put(THIS_MODULE);
  1145. break;
  1146. case CONTROL_CHANNEL:
  1147. err = channel_ctrl(card, arg);
  1148. break;
  1149. default:
  1150. pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd);
  1151. return -EINVAL;
  1152. }
  1153. return err;
  1154. }
  1155. static int
  1156. setup_w6692(struct w6692_hw *card)
  1157. {
  1158. u32 val;
  1159. if (!request_region(card->addr, 256, card->name)) {
  1160. pr_info("%s: config port %x-%x already in use\n", card->name,
  1161. card->addr, card->addr + 255);
  1162. return -EIO;
  1163. }
  1164. W6692Version(card);
  1165. card->bc[0].addr = card->addr;
  1166. card->bc[1].addr = card->addr + 0x40;
  1167. val = ReadW6692(card, W_ISTA);
  1168. if (debug & DEBUG_HW)
  1169. pr_notice("%s ISTA=%02x\n", card->name, val);
  1170. val = ReadW6692(card, W_IMASK);
  1171. if (debug & DEBUG_HW)
  1172. pr_notice("%s IMASK=%02x\n", card->name, val);
  1173. val = ReadW6692(card, W_D_EXIR);
  1174. if (debug & DEBUG_HW)
  1175. pr_notice("%s D_EXIR=%02x\n", card->name, val);
  1176. val = ReadW6692(card, W_D_EXIM);
  1177. if (debug & DEBUG_HW)
  1178. pr_notice("%s D_EXIM=%02x\n", card->name, val);
  1179. val = ReadW6692(card, W_D_RSTA);
  1180. if (debug & DEBUG_HW)
  1181. pr_notice("%s D_RSTA=%02x\n", card->name, val);
  1182. return 0;
  1183. }
  1184. static void
  1185. release_card(struct w6692_hw *card)
  1186. {
  1187. u_long flags;
  1188. spin_lock_irqsave(&card->lock, flags);
  1189. disable_hwirq(card);
  1190. w6692_mode(&card->bc[0], ISDN_P_NONE);
  1191. w6692_mode(&card->bc[1], ISDN_P_NONE);
  1192. if ((card->fmask & led) || card->subtype == W6692_USR) {
  1193. card->xdata |= 0x04; /* LED OFF */
  1194. WriteW6692(card, W_XDATA, card->xdata);
  1195. }
  1196. spin_unlock_irqrestore(&card->lock, flags);
  1197. free_irq(card->irq, card);
  1198. l1_event(card->dch.l1, CLOSE_CHANNEL);
  1199. mISDN_unregister_device(&card->dch.dev);
  1200. release_region(card->addr, 256);
  1201. mISDN_freebchannel(&card->bc[1].bch);
  1202. mISDN_freebchannel(&card->bc[0].bch);
  1203. mISDN_freedchannel(&card->dch);
  1204. write_lock_irqsave(&card_lock, flags);
  1205. list_del(&card->list);
  1206. write_unlock_irqrestore(&card_lock, flags);
  1207. pci_disable_device(card->pdev);
  1208. pci_set_drvdata(card->pdev, NULL);
  1209. kfree(card);
  1210. }
  1211. static int
  1212. setup_instance(struct w6692_hw *card)
  1213. {
  1214. int i, err;
  1215. u_long flags;
  1216. snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1);
  1217. write_lock_irqsave(&card_lock, flags);
  1218. list_add_tail(&card->list, &Cards);
  1219. write_unlock_irqrestore(&card_lock, flags);
  1220. card->fmask = (1 << w6692_cnt);
  1221. _set_debug(card);
  1222. spin_lock_init(&card->lock);
  1223. mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh);
  1224. card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
  1225. card->dch.dev.D.send = w6692_l2l1D;
  1226. card->dch.dev.D.ctrl = w6692_dctrl;
  1227. card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
  1228. (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
  1229. card->dch.hw = card;
  1230. card->dch.dev.nrbchan = 2;
  1231. for (i = 0; i < 2; i++) {
  1232. mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM);
  1233. card->bc[i].bch.hw = card;
  1234. card->bc[i].bch.nr = i + 1;
  1235. card->bc[i].bch.ch.nr = i + 1;
  1236. card->bc[i].bch.ch.send = w6692_l2l1B;
  1237. card->bc[i].bch.ch.ctrl = w6692_bctrl;
  1238. set_channelmap(i + 1, card->dch.dev.channelmap);
  1239. list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels);
  1240. }
  1241. err = setup_w6692(card);
  1242. if (err)
  1243. goto error_setup;
  1244. err = mISDN_register_device(&card->dch.dev, &card->pdev->dev,
  1245. card->name);
  1246. if (err)
  1247. goto error_reg;
  1248. err = init_card(card);
  1249. if (err)
  1250. goto error_init;
  1251. err = create_l1(&card->dch, w6692_l1callback);
  1252. if (!err) {
  1253. w6692_cnt++;
  1254. pr_notice("W6692 %d cards installed\n", w6692_cnt);
  1255. return 0;
  1256. }
  1257. free_irq(card->irq, card);
  1258. error_init:
  1259. mISDN_unregister_device(&card->dch.dev);
  1260. error_reg:
  1261. release_region(card->addr, 256);
  1262. error_setup:
  1263. mISDN_freebchannel(&card->bc[1].bch);
  1264. mISDN_freebchannel(&card->bc[0].bch);
  1265. mISDN_freedchannel(&card->dch);
  1266. write_lock_irqsave(&card_lock, flags);
  1267. list_del(&card->list);
  1268. write_unlock_irqrestore(&card_lock, flags);
  1269. kfree(card);
  1270. return err;
  1271. }
  1272. static int __devinit
  1273. w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1274. {
  1275. int err = -ENOMEM;
  1276. struct w6692_hw *card;
  1277. struct w6692map *m = (struct w6692map *)ent->driver_data;
  1278. card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL);
  1279. if (!card) {
  1280. pr_info("No kmem for w6692 card\n");
  1281. return err;
  1282. }
  1283. card->pdev = pdev;
  1284. card->subtype = m->subtype;
  1285. err = pci_enable_device(pdev);
  1286. if (err) {
  1287. kfree(card);
  1288. return err;
  1289. }
  1290. printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n",
  1291. m->name, pci_name(pdev));
  1292. card->addr = pci_resource_start(pdev, 1);
  1293. card->irq = pdev->irq;
  1294. pci_set_drvdata(pdev, card);
  1295. err = setup_instance(card);
  1296. if (err)
  1297. pci_set_drvdata(pdev, NULL);
  1298. return err;
  1299. }
  1300. static void __devexit
  1301. w6692_remove_pci(struct pci_dev *pdev)
  1302. {
  1303. struct w6692_hw *card = pci_get_drvdata(pdev);
  1304. if (card)
  1305. release_card(card);
  1306. else
  1307. if (debug)
  1308. pr_notice("%s: drvdata already removed\n", __func__);
  1309. }
  1310. static struct pci_device_id w6692_ids[] = {
  1311. { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH,
  1312. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]},
  1313. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1314. PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0,
  1315. (ulong)&w6692_map[2]},
  1316. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1317. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]},
  1318. { }
  1319. };
  1320. MODULE_DEVICE_TABLE(pci, w6692_ids);
  1321. static struct pci_driver w6692_driver = {
  1322. .name = "w6692",
  1323. .probe = w6692_probe,
  1324. .remove = __devexit_p(w6692_remove_pci),
  1325. .id_table = w6692_ids,
  1326. };
  1327. static int __init w6692_init(void)
  1328. {
  1329. int err;
  1330. pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV);
  1331. err = pci_register_driver(&w6692_driver);
  1332. return err;
  1333. }
  1334. static void __exit w6692_cleanup(void)
  1335. {
  1336. pci_unregister_driver(&w6692_driver);
  1337. }
  1338. module_init(w6692_init);
  1339. module_exit(w6692_cleanup);