w83781d.c 57 KB

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  1. /*
  2. w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
  3. monitoring
  4. Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
  5. Philip Edelbrock <phil@netroedge.com>,
  6. and Mark Studebaker <mdsxyz123@yahoo.com>
  7. Copyright (c) 2007 - 2008 Jean Delvare <khali@linux-fr.org>
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software
  18. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. /*
  21. Supports following chips:
  22. Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  23. as99127f 7 3 0 3 0x31 0x12c3 yes no
  24. as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
  25. w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
  26. w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
  27. w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
  28. */
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/slab.h>
  33. #include <linux/jiffies.h>
  34. #include <linux/i2c.h>
  35. #include <linux/hwmon.h>
  36. #include <linux/hwmon-vid.h>
  37. #include <linux/hwmon-sysfs.h>
  38. #include <linux/sysfs.h>
  39. #include <linux/err.h>
  40. #include <linux/mutex.h>
  41. #ifdef CONFIG_ISA
  42. #include <linux/platform_device.h>
  43. #include <linux/ioport.h>
  44. #include <linux/io.h>
  45. #endif
  46. #include "lm75.h"
  47. /* Addresses to scan */
  48. static const unsigned short normal_i2c[] = { 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d,
  49. 0x2e, 0x2f, I2C_CLIENT_END };
  50. enum chips { w83781d, w83782d, w83783s, as99127f };
  51. /* Insmod parameters */
  52. static unsigned short force_subclients[4];
  53. module_param_array(force_subclients, short, NULL, 0);
  54. MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
  55. "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  56. static int reset;
  57. module_param(reset, bool, 0);
  58. MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
  59. static int init = 1;
  60. module_param(init, bool, 0);
  61. MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  62. /* Constants specified below */
  63. /* Length of ISA address segment */
  64. #define W83781D_EXTENT 8
  65. /* Where are the ISA address/data registers relative to the base address */
  66. #define W83781D_ADDR_REG_OFFSET 5
  67. #define W83781D_DATA_REG_OFFSET 6
  68. /* The device registers */
  69. /* in nr from 0 to 8 */
  70. #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
  71. (0x554 + (((nr) - 7) * 2)))
  72. #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
  73. (0x555 + (((nr) - 7) * 2)))
  74. #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
  75. (0x550 + (nr) - 7))
  76. /* fan nr from 0 to 2 */
  77. #define W83781D_REG_FAN_MIN(nr) (0x3b + (nr))
  78. #define W83781D_REG_FAN(nr) (0x28 + (nr))
  79. #define W83781D_REG_BANK 0x4E
  80. #define W83781D_REG_TEMP2_CONFIG 0x152
  81. #define W83781D_REG_TEMP3_CONFIG 0x252
  82. /* temp nr from 1 to 3 */
  83. #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
  84. ((nr == 2) ? (0x0150) : \
  85. (0x27)))
  86. #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
  87. ((nr == 2) ? (0x153) : \
  88. (0x3A)))
  89. #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
  90. ((nr == 2) ? (0x155) : \
  91. (0x39)))
  92. #define W83781D_REG_CONFIG 0x40
  93. /* Interrupt status (W83781D, AS99127F) */
  94. #define W83781D_REG_ALARM1 0x41
  95. #define W83781D_REG_ALARM2 0x42
  96. /* Real-time status (W83782D, W83783S) */
  97. #define W83782D_REG_ALARM1 0x459
  98. #define W83782D_REG_ALARM2 0x45A
  99. #define W83782D_REG_ALARM3 0x45B
  100. #define W83781D_REG_BEEP_CONFIG 0x4D
  101. #define W83781D_REG_BEEP_INTS1 0x56
  102. #define W83781D_REG_BEEP_INTS2 0x57
  103. #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
  104. #define W83781D_REG_VID_FANDIV 0x47
  105. #define W83781D_REG_CHIPID 0x49
  106. #define W83781D_REG_WCHIPID 0x58
  107. #define W83781D_REG_CHIPMAN 0x4F
  108. #define W83781D_REG_PIN 0x4B
  109. /* 782D/783S only */
  110. #define W83781D_REG_VBAT 0x5D
  111. /* PWM 782D (1-4) and 783S (1-2) only */
  112. static const u8 W83781D_REG_PWM[] = { 0x5B, 0x5A, 0x5E, 0x5F };
  113. #define W83781D_REG_PWMCLK12 0x5C
  114. #define W83781D_REG_PWMCLK34 0x45C
  115. #define W83781D_REG_I2C_ADDR 0x48
  116. #define W83781D_REG_I2C_SUBADDR 0x4A
  117. /* The following are undocumented in the data sheets however we
  118. received the information in an email from Winbond tech support */
  119. /* Sensor selection - not on 781d */
  120. #define W83781D_REG_SCFG1 0x5D
  121. static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
  122. #define W83781D_REG_SCFG2 0x59
  123. static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
  124. #define W83781D_DEFAULT_BETA 3435
  125. /* Conversions */
  126. #define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
  127. #define IN_FROM_REG(val) ((val) * 16)
  128. static inline u8
  129. FAN_TO_REG(long rpm, int div)
  130. {
  131. if (rpm == 0)
  132. return 255;
  133. rpm = SENSORS_LIMIT(rpm, 1, 1000000);
  134. return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
  135. }
  136. static inline long
  137. FAN_FROM_REG(u8 val, int div)
  138. {
  139. if (val == 0)
  140. return -1;
  141. if (val == 255)
  142. return 0;
  143. return 1350000 / (val * div);
  144. }
  145. #define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
  146. #define TEMP_FROM_REG(val) ((val) * 1000)
  147. #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
  148. (~(val)) & 0x7fff : (val) & 0xff7fff)
  149. #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
  150. (~(val)) & 0x7fff : (val) & 0xff7fff)
  151. #define DIV_FROM_REG(val) (1 << (val))
  152. static inline u8
  153. DIV_TO_REG(long val, enum chips type)
  154. {
  155. int i;
  156. val = SENSORS_LIMIT(val, 1,
  157. ((type == w83781d
  158. || type == as99127f) ? 8 : 128)) >> 1;
  159. for (i = 0; i < 7; i++) {
  160. if (val == 0)
  161. break;
  162. val >>= 1;
  163. }
  164. return i;
  165. }
  166. struct w83781d_data {
  167. struct i2c_client *client;
  168. struct device *hwmon_dev;
  169. struct mutex lock;
  170. enum chips type;
  171. /* For ISA device only */
  172. const char *name;
  173. int isa_addr;
  174. struct mutex update_lock;
  175. char valid; /* !=0 if following fields are valid */
  176. unsigned long last_updated; /* In jiffies */
  177. struct i2c_client *lm75[2]; /* for secondary I2C addresses */
  178. /* array of 2 pointers to subclients */
  179. u8 in[9]; /* Register value - 8 & 9 for 782D only */
  180. u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
  181. u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
  182. u8 fan[3]; /* Register value */
  183. u8 fan_min[3]; /* Register value */
  184. s8 temp; /* Register value */
  185. s8 temp_max; /* Register value */
  186. s8 temp_max_hyst; /* Register value */
  187. u16 temp_add[2]; /* Register value */
  188. u16 temp_max_add[2]; /* Register value */
  189. u16 temp_max_hyst_add[2]; /* Register value */
  190. u8 fan_div[3]; /* Register encoding, shifted right */
  191. u8 vid; /* Register encoding, combined */
  192. u32 alarms; /* Register encoding, combined */
  193. u32 beep_mask; /* Register encoding, combined */
  194. u8 pwm[4]; /* Register value */
  195. u8 pwm2_enable; /* Boolean */
  196. u16 sens[3]; /* 782D/783S only.
  197. 1 = pentium diode; 2 = 3904 diode;
  198. 4 = thermistor */
  199. u8 vrm;
  200. };
  201. static struct w83781d_data *w83781d_data_if_isa(void);
  202. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid);
  203. static int w83781d_read_value(struct w83781d_data *data, u16 reg);
  204. static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
  205. static struct w83781d_data *w83781d_update_device(struct device *dev);
  206. static void w83781d_init_device(struct device *dev);
  207. /* following are the sysfs callback functions */
  208. #define show_in_reg(reg) \
  209. static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
  210. char *buf) \
  211. { \
  212. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  213. struct w83781d_data *data = w83781d_update_device(dev); \
  214. return sprintf(buf, "%ld\n", \
  215. (long)IN_FROM_REG(data->reg[attr->index])); \
  216. }
  217. show_in_reg(in);
  218. show_in_reg(in_min);
  219. show_in_reg(in_max);
  220. #define store_in_reg(REG, reg) \
  221. static ssize_t store_in_##reg (struct device *dev, struct device_attribute \
  222. *da, const char *buf, size_t count) \
  223. { \
  224. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  225. struct w83781d_data *data = dev_get_drvdata(dev); \
  226. int nr = attr->index; \
  227. u32 val; \
  228. \
  229. val = simple_strtoul(buf, NULL, 10); \
  230. \
  231. mutex_lock(&data->update_lock); \
  232. data->in_##reg[nr] = IN_TO_REG(val); \
  233. w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
  234. \
  235. mutex_unlock(&data->update_lock); \
  236. return count; \
  237. }
  238. store_in_reg(MIN, min);
  239. store_in_reg(MAX, max);
  240. #define sysfs_in_offsets(offset) \
  241. static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
  242. show_in, NULL, offset); \
  243. static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
  244. show_in_min, store_in_min, offset); \
  245. static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
  246. show_in_max, store_in_max, offset)
  247. sysfs_in_offsets(0);
  248. sysfs_in_offsets(1);
  249. sysfs_in_offsets(2);
  250. sysfs_in_offsets(3);
  251. sysfs_in_offsets(4);
  252. sysfs_in_offsets(5);
  253. sysfs_in_offsets(6);
  254. sysfs_in_offsets(7);
  255. sysfs_in_offsets(8);
  256. #define show_fan_reg(reg) \
  257. static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
  258. char *buf) \
  259. { \
  260. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  261. struct w83781d_data *data = w83781d_update_device(dev); \
  262. return sprintf(buf,"%ld\n", \
  263. FAN_FROM_REG(data->reg[attr->index], \
  264. DIV_FROM_REG(data->fan_div[attr->index]))); \
  265. }
  266. show_fan_reg(fan);
  267. show_fan_reg(fan_min);
  268. static ssize_t
  269. store_fan_min(struct device *dev, struct device_attribute *da,
  270. const char *buf, size_t count)
  271. {
  272. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  273. struct w83781d_data *data = dev_get_drvdata(dev);
  274. int nr = attr->index;
  275. u32 val;
  276. val = simple_strtoul(buf, NULL, 10);
  277. mutex_lock(&data->update_lock);
  278. data->fan_min[nr] =
  279. FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
  280. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
  281. data->fan_min[nr]);
  282. mutex_unlock(&data->update_lock);
  283. return count;
  284. }
  285. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
  286. static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
  287. show_fan_min, store_fan_min, 0);
  288. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
  289. static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
  290. show_fan_min, store_fan_min, 1);
  291. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
  292. static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
  293. show_fan_min, store_fan_min, 2);
  294. #define show_temp_reg(reg) \
  295. static ssize_t show_##reg (struct device *dev, struct device_attribute *da, \
  296. char *buf) \
  297. { \
  298. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  299. struct w83781d_data *data = w83781d_update_device(dev); \
  300. int nr = attr->index; \
  301. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  302. return sprintf(buf,"%d\n", \
  303. LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
  304. } else { /* TEMP1 */ \
  305. return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
  306. } \
  307. }
  308. show_temp_reg(temp);
  309. show_temp_reg(temp_max);
  310. show_temp_reg(temp_max_hyst);
  311. #define store_temp_reg(REG, reg) \
  312. static ssize_t store_temp_##reg (struct device *dev, \
  313. struct device_attribute *da, const char *buf, size_t count) \
  314. { \
  315. struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
  316. struct w83781d_data *data = dev_get_drvdata(dev); \
  317. int nr = attr->index; \
  318. long val; \
  319. \
  320. val = simple_strtol(buf, NULL, 10); \
  321. \
  322. mutex_lock(&data->update_lock); \
  323. \
  324. if (nr >= 2) { /* TEMP2 and TEMP3 */ \
  325. data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
  326. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  327. data->temp_##reg##_add[nr-2]); \
  328. } else { /* TEMP1 */ \
  329. data->temp_##reg = TEMP_TO_REG(val); \
  330. w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
  331. data->temp_##reg); \
  332. } \
  333. \
  334. mutex_unlock(&data->update_lock); \
  335. return count; \
  336. }
  337. store_temp_reg(OVER, max);
  338. store_temp_reg(HYST, max_hyst);
  339. #define sysfs_temp_offsets(offset) \
  340. static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
  341. show_temp, NULL, offset); \
  342. static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
  343. show_temp_max, store_temp_max, offset); \
  344. static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
  345. show_temp_max_hyst, store_temp_max_hyst, offset);
  346. sysfs_temp_offsets(1);
  347. sysfs_temp_offsets(2);
  348. sysfs_temp_offsets(3);
  349. static ssize_t
  350. show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
  351. {
  352. struct w83781d_data *data = w83781d_update_device(dev);
  353. return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
  354. }
  355. static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
  356. static ssize_t
  357. show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
  358. {
  359. struct w83781d_data *data = dev_get_drvdata(dev);
  360. return sprintf(buf, "%ld\n", (long) data->vrm);
  361. }
  362. static ssize_t
  363. store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
  364. {
  365. struct w83781d_data *data = dev_get_drvdata(dev);
  366. u32 val;
  367. val = simple_strtoul(buf, NULL, 10);
  368. data->vrm = val;
  369. return count;
  370. }
  371. static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
  372. static ssize_t
  373. show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
  374. {
  375. struct w83781d_data *data = w83781d_update_device(dev);
  376. return sprintf(buf, "%u\n", data->alarms);
  377. }
  378. static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
  379. static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
  380. char *buf)
  381. {
  382. struct w83781d_data *data = w83781d_update_device(dev);
  383. int bitnr = to_sensor_dev_attr(attr)->index;
  384. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  385. }
  386. /* The W83781D has a single alarm bit for temp2 and temp3 */
  387. static ssize_t show_temp3_alarm(struct device *dev,
  388. struct device_attribute *attr, char *buf)
  389. {
  390. struct w83781d_data *data = w83781d_update_device(dev);
  391. int bitnr = (data->type == w83781d) ? 5 : 13;
  392. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  393. }
  394. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  395. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  396. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  397. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  398. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
  399. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
  400. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
  401. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
  402. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
  403. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
  404. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
  405. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
  406. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
  407. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
  408. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_temp3_alarm, NULL, 0);
  409. static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
  410. {
  411. struct w83781d_data *data = w83781d_update_device(dev);
  412. return sprintf(buf, "%ld\n",
  413. (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
  414. }
  415. static ssize_t
  416. store_beep_mask(struct device *dev, struct device_attribute *attr,
  417. const char *buf, size_t count)
  418. {
  419. struct w83781d_data *data = dev_get_drvdata(dev);
  420. u32 val;
  421. val = simple_strtoul(buf, NULL, 10);
  422. mutex_lock(&data->update_lock);
  423. data->beep_mask &= 0x8000; /* preserve beep enable */
  424. data->beep_mask |= BEEP_MASK_TO_REG(val, data->type);
  425. w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
  426. data->beep_mask & 0xff);
  427. w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
  428. (data->beep_mask >> 8) & 0xff);
  429. if (data->type != w83781d && data->type != as99127f) {
  430. w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
  431. ((data->beep_mask) >> 16) & 0xff);
  432. }
  433. mutex_unlock(&data->update_lock);
  434. return count;
  435. }
  436. static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
  437. show_beep_mask, store_beep_mask);
  438. static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
  439. char *buf)
  440. {
  441. struct w83781d_data *data = w83781d_update_device(dev);
  442. int bitnr = to_sensor_dev_attr(attr)->index;
  443. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  444. }
  445. static ssize_t
  446. store_beep(struct device *dev, struct device_attribute *attr,
  447. const char *buf, size_t count)
  448. {
  449. struct w83781d_data *data = dev_get_drvdata(dev);
  450. int bitnr = to_sensor_dev_attr(attr)->index;
  451. unsigned long bit;
  452. u8 reg;
  453. bit = simple_strtoul(buf, NULL, 10);
  454. if (bit & ~1)
  455. return -EINVAL;
  456. mutex_lock(&data->update_lock);
  457. if (bit)
  458. data->beep_mask |= (1 << bitnr);
  459. else
  460. data->beep_mask &= ~(1 << bitnr);
  461. if (bitnr < 8) {
  462. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  463. if (bit)
  464. reg |= (1 << bitnr);
  465. else
  466. reg &= ~(1 << bitnr);
  467. w83781d_write_value(data, W83781D_REG_BEEP_INTS1, reg);
  468. } else if (bitnr < 16) {
  469. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  470. if (bit)
  471. reg |= (1 << (bitnr - 8));
  472. else
  473. reg &= ~(1 << (bitnr - 8));
  474. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, reg);
  475. } else {
  476. reg = w83781d_read_value(data, W83781D_REG_BEEP_INTS3);
  477. if (bit)
  478. reg |= (1 << (bitnr - 16));
  479. else
  480. reg &= ~(1 << (bitnr - 16));
  481. w83781d_write_value(data, W83781D_REG_BEEP_INTS3, reg);
  482. }
  483. mutex_unlock(&data->update_lock);
  484. return count;
  485. }
  486. /* The W83781D has a single beep bit for temp2 and temp3 */
  487. static ssize_t show_temp3_beep(struct device *dev,
  488. struct device_attribute *attr, char *buf)
  489. {
  490. struct w83781d_data *data = w83781d_update_device(dev);
  491. int bitnr = (data->type == w83781d) ? 5 : 13;
  492. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  493. }
  494. static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
  495. show_beep, store_beep, 0);
  496. static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
  497. show_beep, store_beep, 1);
  498. static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
  499. show_beep, store_beep, 2);
  500. static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
  501. show_beep, store_beep, 3);
  502. static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
  503. show_beep, store_beep, 8);
  504. static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
  505. show_beep, store_beep, 9);
  506. static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
  507. show_beep, store_beep, 10);
  508. static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
  509. show_beep, store_beep, 16);
  510. static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
  511. show_beep, store_beep, 17);
  512. static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
  513. show_beep, store_beep, 6);
  514. static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
  515. show_beep, store_beep, 7);
  516. static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
  517. show_beep, store_beep, 11);
  518. static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
  519. show_beep, store_beep, 4);
  520. static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
  521. show_beep, store_beep, 5);
  522. static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO,
  523. show_temp3_beep, store_beep, 13);
  524. static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
  525. show_beep, store_beep, 15);
  526. static ssize_t
  527. show_fan_div(struct device *dev, struct device_attribute *da, char *buf)
  528. {
  529. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  530. struct w83781d_data *data = w83781d_update_device(dev);
  531. return sprintf(buf, "%ld\n",
  532. (long) DIV_FROM_REG(data->fan_div[attr->index]));
  533. }
  534. /* Note: we save and restore the fan minimum here, because its value is
  535. determined in part by the fan divisor. This follows the principle of
  536. least surprise; the user doesn't expect the fan minimum to change just
  537. because the divisor changed. */
  538. static ssize_t
  539. store_fan_div(struct device *dev, struct device_attribute *da,
  540. const char *buf, size_t count)
  541. {
  542. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  543. struct w83781d_data *data = dev_get_drvdata(dev);
  544. unsigned long min;
  545. int nr = attr->index;
  546. u8 reg;
  547. unsigned long val = simple_strtoul(buf, NULL, 10);
  548. mutex_lock(&data->update_lock);
  549. /* Save fan_min */
  550. min = FAN_FROM_REG(data->fan_min[nr],
  551. DIV_FROM_REG(data->fan_div[nr]));
  552. data->fan_div[nr] = DIV_TO_REG(val, data->type);
  553. reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
  554. & (nr==0 ? 0xcf : 0x3f))
  555. | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
  556. w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
  557. /* w83781d and as99127f don't have extended divisor bits */
  558. if (data->type != w83781d && data->type != as99127f) {
  559. reg = (w83781d_read_value(data, W83781D_REG_VBAT)
  560. & ~(1 << (5 + nr)))
  561. | ((data->fan_div[nr] & 0x04) << (3 + nr));
  562. w83781d_write_value(data, W83781D_REG_VBAT, reg);
  563. }
  564. /* Restore fan_min */
  565. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  566. w83781d_write_value(data, W83781D_REG_FAN_MIN(nr), data->fan_min[nr]);
  567. mutex_unlock(&data->update_lock);
  568. return count;
  569. }
  570. static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
  571. show_fan_div, store_fan_div, 0);
  572. static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
  573. show_fan_div, store_fan_div, 1);
  574. static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR,
  575. show_fan_div, store_fan_div, 2);
  576. static ssize_t
  577. show_pwm(struct device *dev, struct device_attribute *da, char *buf)
  578. {
  579. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  580. struct w83781d_data *data = w83781d_update_device(dev);
  581. return sprintf(buf, "%d\n", (int)data->pwm[attr->index]);
  582. }
  583. static ssize_t
  584. show_pwm2_enable(struct device *dev, struct device_attribute *da, char *buf)
  585. {
  586. struct w83781d_data *data = w83781d_update_device(dev);
  587. return sprintf(buf, "%d\n", (int)data->pwm2_enable);
  588. }
  589. static ssize_t
  590. store_pwm(struct device *dev, struct device_attribute *da, const char *buf,
  591. size_t count)
  592. {
  593. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  594. struct w83781d_data *data = dev_get_drvdata(dev);
  595. int nr = attr->index;
  596. u32 val;
  597. val = simple_strtoul(buf, NULL, 10);
  598. mutex_lock(&data->update_lock);
  599. data->pwm[nr] = SENSORS_LIMIT(val, 0, 255);
  600. w83781d_write_value(data, W83781D_REG_PWM[nr], data->pwm[nr]);
  601. mutex_unlock(&data->update_lock);
  602. return count;
  603. }
  604. static ssize_t
  605. store_pwm2_enable(struct device *dev, struct device_attribute *da,
  606. const char *buf, size_t count)
  607. {
  608. struct w83781d_data *data = dev_get_drvdata(dev);
  609. u32 val, reg;
  610. val = simple_strtoul(buf, NULL, 10);
  611. mutex_lock(&data->update_lock);
  612. switch (val) {
  613. case 0:
  614. case 1:
  615. reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  616. w83781d_write_value(data, W83781D_REG_PWMCLK12,
  617. (reg & 0xf7) | (val << 3));
  618. reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  619. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
  620. (reg & 0xef) | (!val << 4));
  621. data->pwm2_enable = val;
  622. break;
  623. default:
  624. mutex_unlock(&data->update_lock);
  625. return -EINVAL;
  626. }
  627. mutex_unlock(&data->update_lock);
  628. return count;
  629. }
  630. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 0);
  631. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 1);
  632. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 2);
  633. static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, store_pwm, 3);
  634. /* only PWM2 can be enabled/disabled */
  635. static DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
  636. show_pwm2_enable, store_pwm2_enable);
  637. static ssize_t
  638. show_sensor(struct device *dev, struct device_attribute *da, char *buf)
  639. {
  640. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  641. struct w83781d_data *data = w83781d_update_device(dev);
  642. return sprintf(buf, "%d\n", (int)data->sens[attr->index]);
  643. }
  644. static ssize_t
  645. store_sensor(struct device *dev, struct device_attribute *da,
  646. const char *buf, size_t count)
  647. {
  648. struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
  649. struct w83781d_data *data = dev_get_drvdata(dev);
  650. int nr = attr->index;
  651. u32 val, tmp;
  652. val = simple_strtoul(buf, NULL, 10);
  653. mutex_lock(&data->update_lock);
  654. switch (val) {
  655. case 1: /* PII/Celeron diode */
  656. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  657. w83781d_write_value(data, W83781D_REG_SCFG1,
  658. tmp | BIT_SCFG1[nr]);
  659. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  660. w83781d_write_value(data, W83781D_REG_SCFG2,
  661. tmp | BIT_SCFG2[nr]);
  662. data->sens[nr] = val;
  663. break;
  664. case 2: /* 3904 */
  665. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  666. w83781d_write_value(data, W83781D_REG_SCFG1,
  667. tmp | BIT_SCFG1[nr]);
  668. tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
  669. w83781d_write_value(data, W83781D_REG_SCFG2,
  670. tmp & ~BIT_SCFG2[nr]);
  671. data->sens[nr] = val;
  672. break;
  673. case W83781D_DEFAULT_BETA:
  674. dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
  675. "instead\n", W83781D_DEFAULT_BETA);
  676. /* fall through */
  677. case 4: /* thermistor */
  678. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  679. w83781d_write_value(data, W83781D_REG_SCFG1,
  680. tmp & ~BIT_SCFG1[nr]);
  681. data->sens[nr] = val;
  682. break;
  683. default:
  684. dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or 4\n",
  685. (long) val);
  686. break;
  687. }
  688. mutex_unlock(&data->update_lock);
  689. return count;
  690. }
  691. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR,
  692. show_sensor, store_sensor, 0);
  693. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR,
  694. show_sensor, store_sensor, 1);
  695. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR,
  696. show_sensor, store_sensor, 2);
  697. /* Assumes that adapter is of I2C, not ISA variety.
  698. * OTHERWISE DON'T CALL THIS
  699. */
  700. static int
  701. w83781d_detect_subclients(struct i2c_client *new_client)
  702. {
  703. int i, val1 = 0, id;
  704. int err;
  705. int address = new_client->addr;
  706. unsigned short sc_addr[2];
  707. struct i2c_adapter *adapter = new_client->adapter;
  708. struct w83781d_data *data = i2c_get_clientdata(new_client);
  709. enum chips kind = data->type;
  710. id = i2c_adapter_id(adapter);
  711. if (force_subclients[0] == id && force_subclients[1] == address) {
  712. for (i = 2; i <= 3; i++) {
  713. if (force_subclients[i] < 0x48 ||
  714. force_subclients[i] > 0x4f) {
  715. dev_err(&new_client->dev, "Invalid subclient "
  716. "address %d; must be 0x48-0x4f\n",
  717. force_subclients[i]);
  718. err = -EINVAL;
  719. goto ERROR_SC_1;
  720. }
  721. }
  722. w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
  723. (force_subclients[2] & 0x07) |
  724. ((force_subclients[3] & 0x07) << 4));
  725. sc_addr[0] = force_subclients[2];
  726. } else {
  727. val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
  728. sc_addr[0] = 0x48 + (val1 & 0x07);
  729. }
  730. if (kind != w83783s) {
  731. if (force_subclients[0] == id &&
  732. force_subclients[1] == address) {
  733. sc_addr[1] = force_subclients[3];
  734. } else {
  735. sc_addr[1] = 0x48 + ((val1 >> 4) & 0x07);
  736. }
  737. if (sc_addr[0] == sc_addr[1]) {
  738. dev_err(&new_client->dev,
  739. "Duplicate addresses 0x%x for subclients.\n",
  740. sc_addr[0]);
  741. err = -EBUSY;
  742. goto ERROR_SC_2;
  743. }
  744. }
  745. for (i = 0; i <= 1; i++) {
  746. data->lm75[i] = i2c_new_dummy(adapter, sc_addr[i]);
  747. if (!data->lm75[i]) {
  748. dev_err(&new_client->dev, "Subclient %d "
  749. "registration at address 0x%x "
  750. "failed.\n", i, sc_addr[i]);
  751. err = -ENOMEM;
  752. if (i == 1)
  753. goto ERROR_SC_3;
  754. goto ERROR_SC_2;
  755. }
  756. if (kind == w83783s)
  757. break;
  758. }
  759. return 0;
  760. /* Undo inits in case of errors */
  761. ERROR_SC_3:
  762. i2c_unregister_device(data->lm75[0]);
  763. ERROR_SC_2:
  764. ERROR_SC_1:
  765. return err;
  766. }
  767. #define IN_UNIT_ATTRS(X) \
  768. &sensor_dev_attr_in##X##_input.dev_attr.attr, \
  769. &sensor_dev_attr_in##X##_min.dev_attr.attr, \
  770. &sensor_dev_attr_in##X##_max.dev_attr.attr, \
  771. &sensor_dev_attr_in##X##_alarm.dev_attr.attr, \
  772. &sensor_dev_attr_in##X##_beep.dev_attr.attr
  773. #define FAN_UNIT_ATTRS(X) \
  774. &sensor_dev_attr_fan##X##_input.dev_attr.attr, \
  775. &sensor_dev_attr_fan##X##_min.dev_attr.attr, \
  776. &sensor_dev_attr_fan##X##_div.dev_attr.attr, \
  777. &sensor_dev_attr_fan##X##_alarm.dev_attr.attr, \
  778. &sensor_dev_attr_fan##X##_beep.dev_attr.attr
  779. #define TEMP_UNIT_ATTRS(X) \
  780. &sensor_dev_attr_temp##X##_input.dev_attr.attr, \
  781. &sensor_dev_attr_temp##X##_max.dev_attr.attr, \
  782. &sensor_dev_attr_temp##X##_max_hyst.dev_attr.attr, \
  783. &sensor_dev_attr_temp##X##_alarm.dev_attr.attr, \
  784. &sensor_dev_attr_temp##X##_beep.dev_attr.attr
  785. static struct attribute* w83781d_attributes[] = {
  786. IN_UNIT_ATTRS(0),
  787. IN_UNIT_ATTRS(2),
  788. IN_UNIT_ATTRS(3),
  789. IN_UNIT_ATTRS(4),
  790. IN_UNIT_ATTRS(5),
  791. IN_UNIT_ATTRS(6),
  792. FAN_UNIT_ATTRS(1),
  793. FAN_UNIT_ATTRS(2),
  794. FAN_UNIT_ATTRS(3),
  795. TEMP_UNIT_ATTRS(1),
  796. TEMP_UNIT_ATTRS(2),
  797. &dev_attr_cpu0_vid.attr,
  798. &dev_attr_vrm.attr,
  799. &dev_attr_alarms.attr,
  800. &dev_attr_beep_mask.attr,
  801. &sensor_dev_attr_beep_enable.dev_attr.attr,
  802. NULL
  803. };
  804. static const struct attribute_group w83781d_group = {
  805. .attrs = w83781d_attributes,
  806. };
  807. static struct attribute *w83781d_attributes_opt[] = {
  808. IN_UNIT_ATTRS(1),
  809. IN_UNIT_ATTRS(7),
  810. IN_UNIT_ATTRS(8),
  811. TEMP_UNIT_ATTRS(3),
  812. &sensor_dev_attr_pwm1.dev_attr.attr,
  813. &sensor_dev_attr_pwm2.dev_attr.attr,
  814. &sensor_dev_attr_pwm3.dev_attr.attr,
  815. &sensor_dev_attr_pwm4.dev_attr.attr,
  816. &dev_attr_pwm2_enable.attr,
  817. &sensor_dev_attr_temp1_type.dev_attr.attr,
  818. &sensor_dev_attr_temp2_type.dev_attr.attr,
  819. &sensor_dev_attr_temp3_type.dev_attr.attr,
  820. NULL
  821. };
  822. static const struct attribute_group w83781d_group_opt = {
  823. .attrs = w83781d_attributes_opt,
  824. };
  825. /* No clean up is done on error, it's up to the caller */
  826. static int
  827. w83781d_create_files(struct device *dev, int kind, int is_isa)
  828. {
  829. int err;
  830. if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
  831. return err;
  832. if (kind != w83783s) {
  833. if ((err = device_create_file(dev,
  834. &sensor_dev_attr_in1_input.dev_attr))
  835. || (err = device_create_file(dev,
  836. &sensor_dev_attr_in1_min.dev_attr))
  837. || (err = device_create_file(dev,
  838. &sensor_dev_attr_in1_max.dev_attr))
  839. || (err = device_create_file(dev,
  840. &sensor_dev_attr_in1_alarm.dev_attr))
  841. || (err = device_create_file(dev,
  842. &sensor_dev_attr_in1_beep.dev_attr)))
  843. return err;
  844. }
  845. if (kind != as99127f && kind != w83781d && kind != w83783s) {
  846. if ((err = device_create_file(dev,
  847. &sensor_dev_attr_in7_input.dev_attr))
  848. || (err = device_create_file(dev,
  849. &sensor_dev_attr_in7_min.dev_attr))
  850. || (err = device_create_file(dev,
  851. &sensor_dev_attr_in7_max.dev_attr))
  852. || (err = device_create_file(dev,
  853. &sensor_dev_attr_in7_alarm.dev_attr))
  854. || (err = device_create_file(dev,
  855. &sensor_dev_attr_in7_beep.dev_attr))
  856. || (err = device_create_file(dev,
  857. &sensor_dev_attr_in8_input.dev_attr))
  858. || (err = device_create_file(dev,
  859. &sensor_dev_attr_in8_min.dev_attr))
  860. || (err = device_create_file(dev,
  861. &sensor_dev_attr_in8_max.dev_attr))
  862. || (err = device_create_file(dev,
  863. &sensor_dev_attr_in8_alarm.dev_attr))
  864. || (err = device_create_file(dev,
  865. &sensor_dev_attr_in8_beep.dev_attr)))
  866. return err;
  867. }
  868. if (kind != w83783s) {
  869. if ((err = device_create_file(dev,
  870. &sensor_dev_attr_temp3_input.dev_attr))
  871. || (err = device_create_file(dev,
  872. &sensor_dev_attr_temp3_max.dev_attr))
  873. || (err = device_create_file(dev,
  874. &sensor_dev_attr_temp3_max_hyst.dev_attr))
  875. || (err = device_create_file(dev,
  876. &sensor_dev_attr_temp3_alarm.dev_attr))
  877. || (err = device_create_file(dev,
  878. &sensor_dev_attr_temp3_beep.dev_attr)))
  879. return err;
  880. if (kind != w83781d) {
  881. err = sysfs_chmod_file(&dev->kobj,
  882. &sensor_dev_attr_temp3_alarm.dev_attr.attr,
  883. S_IRUGO | S_IWUSR);
  884. if (err)
  885. return err;
  886. }
  887. }
  888. if (kind != w83781d && kind != as99127f) {
  889. if ((err = device_create_file(dev,
  890. &sensor_dev_attr_pwm1.dev_attr))
  891. || (err = device_create_file(dev,
  892. &sensor_dev_attr_pwm2.dev_attr))
  893. || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
  894. return err;
  895. }
  896. if (kind == w83782d && !is_isa) {
  897. if ((err = device_create_file(dev,
  898. &sensor_dev_attr_pwm3.dev_attr))
  899. || (err = device_create_file(dev,
  900. &sensor_dev_attr_pwm4.dev_attr)))
  901. return err;
  902. }
  903. if (kind != as99127f && kind != w83781d) {
  904. if ((err = device_create_file(dev,
  905. &sensor_dev_attr_temp1_type.dev_attr))
  906. || (err = device_create_file(dev,
  907. &sensor_dev_attr_temp2_type.dev_attr)))
  908. return err;
  909. if (kind != w83783s) {
  910. if ((err = device_create_file(dev,
  911. &sensor_dev_attr_temp3_type.dev_attr)))
  912. return err;
  913. }
  914. }
  915. return 0;
  916. }
  917. /* Return 0 if detection is successful, -ENODEV otherwise */
  918. static int
  919. w83781d_detect(struct i2c_client *client, struct i2c_board_info *info)
  920. {
  921. int val1, val2;
  922. struct w83781d_data *isa = w83781d_data_if_isa();
  923. struct i2c_adapter *adapter = client->adapter;
  924. int address = client->addr;
  925. const char *client_name;
  926. enum vendor { winbond, asus } vendid;
  927. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  928. return -ENODEV;
  929. /* We block updates of the ISA device to minimize the risk of
  930. concurrent access to the same W83781D chip through different
  931. interfaces. */
  932. if (isa)
  933. mutex_lock(&isa->update_lock);
  934. if (i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG) & 0x80) {
  935. dev_dbg(&adapter->dev,
  936. "Detection of w83781d chip failed at step 3\n");
  937. goto err_nodev;
  938. }
  939. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_BANK);
  940. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  941. /* Check for Winbond or Asus ID if in bank 0 */
  942. if (!(val1 & 0x07) &&
  943. ((!(val1 & 0x80) && val2 != 0xa3 && val2 != 0xc3) ||
  944. ( (val1 & 0x80) && val2 != 0x5c && val2 != 0x12))) {
  945. dev_dbg(&adapter->dev,
  946. "Detection of w83781d chip failed at step 4\n");
  947. goto err_nodev;
  948. }
  949. /* If Winbond SMBus, check address at 0x48.
  950. Asus doesn't support, except for as99127f rev.2 */
  951. if ((!(val1 & 0x80) && val2 == 0xa3) ||
  952. ( (val1 & 0x80) && val2 == 0x5c)) {
  953. if (i2c_smbus_read_byte_data(client, W83781D_REG_I2C_ADDR)
  954. != address) {
  955. dev_dbg(&adapter->dev,
  956. "Detection of w83781d chip failed at step 5\n");
  957. goto err_nodev;
  958. }
  959. }
  960. /* Put it now into bank 0 and Vendor ID High Byte */
  961. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  962. (i2c_smbus_read_byte_data(client, W83781D_REG_BANK)
  963. & 0x78) | 0x80);
  964. /* Get the vendor ID */
  965. val2 = i2c_smbus_read_byte_data(client, W83781D_REG_CHIPMAN);
  966. if (val2 == 0x5c)
  967. vendid = winbond;
  968. else if (val2 == 0x12)
  969. vendid = asus;
  970. else {
  971. dev_dbg(&adapter->dev,
  972. "w83781d chip vendor is neither Winbond nor Asus\n");
  973. goto err_nodev;
  974. }
  975. /* Determine the chip type. */
  976. val1 = i2c_smbus_read_byte_data(client, W83781D_REG_WCHIPID);
  977. if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
  978. client_name = "w83781d";
  979. else if (val1 == 0x30 && vendid == winbond)
  980. client_name = "w83782d";
  981. else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
  982. client_name = "w83783s";
  983. else if (val1 == 0x31)
  984. client_name = "as99127f";
  985. else
  986. goto err_nodev;
  987. if (val1 <= 0x30 && w83781d_alias_detect(client, val1)) {
  988. dev_dbg(&adapter->dev, "Device at 0x%02x appears to "
  989. "be the same as ISA device\n", address);
  990. goto err_nodev;
  991. }
  992. if (isa)
  993. mutex_unlock(&isa->update_lock);
  994. strlcpy(info->type, client_name, I2C_NAME_SIZE);
  995. return 0;
  996. err_nodev:
  997. if (isa)
  998. mutex_unlock(&isa->update_lock);
  999. return -ENODEV;
  1000. }
  1001. static int
  1002. w83781d_probe(struct i2c_client *client, const struct i2c_device_id *id)
  1003. {
  1004. struct device *dev = &client->dev;
  1005. struct w83781d_data *data;
  1006. int err;
  1007. data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
  1008. if (!data) {
  1009. err = -ENOMEM;
  1010. goto ERROR1;
  1011. }
  1012. i2c_set_clientdata(client, data);
  1013. mutex_init(&data->lock);
  1014. mutex_init(&data->update_lock);
  1015. data->type = id->driver_data;
  1016. data->client = client;
  1017. /* attach secondary i2c lm75-like clients */
  1018. err = w83781d_detect_subclients(client);
  1019. if (err)
  1020. goto ERROR3;
  1021. /* Initialize the chip */
  1022. w83781d_init_device(dev);
  1023. /* Register sysfs hooks */
  1024. err = w83781d_create_files(dev, data->type, 0);
  1025. if (err)
  1026. goto ERROR4;
  1027. data->hwmon_dev = hwmon_device_register(dev);
  1028. if (IS_ERR(data->hwmon_dev)) {
  1029. err = PTR_ERR(data->hwmon_dev);
  1030. goto ERROR4;
  1031. }
  1032. return 0;
  1033. ERROR4:
  1034. sysfs_remove_group(&dev->kobj, &w83781d_group);
  1035. sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
  1036. if (data->lm75[0])
  1037. i2c_unregister_device(data->lm75[0]);
  1038. if (data->lm75[1])
  1039. i2c_unregister_device(data->lm75[1]);
  1040. ERROR3:
  1041. kfree(data);
  1042. ERROR1:
  1043. return err;
  1044. }
  1045. static int
  1046. w83781d_remove(struct i2c_client *client)
  1047. {
  1048. struct w83781d_data *data = i2c_get_clientdata(client);
  1049. struct device *dev = &client->dev;
  1050. hwmon_device_unregister(data->hwmon_dev);
  1051. sysfs_remove_group(&dev->kobj, &w83781d_group);
  1052. sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
  1053. if (data->lm75[0])
  1054. i2c_unregister_device(data->lm75[0]);
  1055. if (data->lm75[1])
  1056. i2c_unregister_device(data->lm75[1]);
  1057. kfree(data);
  1058. return 0;
  1059. }
  1060. static int
  1061. w83781d_read_value_i2c(struct w83781d_data *data, u16 reg)
  1062. {
  1063. struct i2c_client *client = data->client;
  1064. int res, bank;
  1065. struct i2c_client *cl;
  1066. bank = (reg >> 8) & 0x0f;
  1067. if (bank > 2)
  1068. /* switch banks */
  1069. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1070. bank);
  1071. if (bank == 0 || bank > 2) {
  1072. res = i2c_smbus_read_byte_data(client, reg & 0xff);
  1073. } else {
  1074. /* switch to subclient */
  1075. cl = data->lm75[bank - 1];
  1076. /* convert from ISA to LM75 I2C addresses */
  1077. switch (reg & 0xff) {
  1078. case 0x50: /* TEMP */
  1079. res = swab16(i2c_smbus_read_word_data(cl, 0));
  1080. break;
  1081. case 0x52: /* CONFIG */
  1082. res = i2c_smbus_read_byte_data(cl, 1);
  1083. break;
  1084. case 0x53: /* HYST */
  1085. res = swab16(i2c_smbus_read_word_data(cl, 2));
  1086. break;
  1087. case 0x55: /* OVER */
  1088. default:
  1089. res = swab16(i2c_smbus_read_word_data(cl, 3));
  1090. break;
  1091. }
  1092. }
  1093. if (bank > 2)
  1094. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1095. return res;
  1096. }
  1097. static int
  1098. w83781d_write_value_i2c(struct w83781d_data *data, u16 reg, u16 value)
  1099. {
  1100. struct i2c_client *client = data->client;
  1101. int bank;
  1102. struct i2c_client *cl;
  1103. bank = (reg >> 8) & 0x0f;
  1104. if (bank > 2)
  1105. /* switch banks */
  1106. i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
  1107. bank);
  1108. if (bank == 0 || bank > 2) {
  1109. i2c_smbus_write_byte_data(client, reg & 0xff,
  1110. value & 0xff);
  1111. } else {
  1112. /* switch to subclient */
  1113. cl = data->lm75[bank - 1];
  1114. /* convert from ISA to LM75 I2C addresses */
  1115. switch (reg & 0xff) {
  1116. case 0x52: /* CONFIG */
  1117. i2c_smbus_write_byte_data(cl, 1, value & 0xff);
  1118. break;
  1119. case 0x53: /* HYST */
  1120. i2c_smbus_write_word_data(cl, 2, swab16(value));
  1121. break;
  1122. case 0x55: /* OVER */
  1123. i2c_smbus_write_word_data(cl, 3, swab16(value));
  1124. break;
  1125. }
  1126. }
  1127. if (bank > 2)
  1128. i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
  1129. return 0;
  1130. }
  1131. static void
  1132. w83781d_init_device(struct device *dev)
  1133. {
  1134. struct w83781d_data *data = dev_get_drvdata(dev);
  1135. int i, p;
  1136. int type = data->type;
  1137. u8 tmp;
  1138. if (reset && type != as99127f) { /* this resets registers we don't have
  1139. documentation for on the as99127f */
  1140. /* Resetting the chip has been the default for a long time,
  1141. but it causes the BIOS initializations (fan clock dividers,
  1142. thermal sensor types...) to be lost, so it is now optional.
  1143. It might even go away if nobody reports it as being useful,
  1144. as I see very little reason why this would be needed at
  1145. all. */
  1146. dev_info(dev, "If reset=1 solved a problem you were "
  1147. "having, please report!\n");
  1148. /* save these registers */
  1149. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1150. p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
  1151. /* Reset all except Watchdog values and last conversion values
  1152. This sets fan-divs to 2, among others */
  1153. w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
  1154. /* Restore the registers and disable power-on abnormal beep.
  1155. This saves FAN 1/2/3 input/output values set by BIOS. */
  1156. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1157. w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
  1158. /* Disable master beep-enable (reset turns it on).
  1159. Individual beep_mask should be reset to off but for some reason
  1160. disabling this bit helps some people not get beeped */
  1161. w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
  1162. }
  1163. /* Disable power-on abnormal beep, as advised by the datasheet.
  1164. Already done if reset=1. */
  1165. if (init && !reset && type != as99127f) {
  1166. i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
  1167. w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
  1168. }
  1169. data->vrm = vid_which_vrm();
  1170. if ((type != w83781d) && (type != as99127f)) {
  1171. tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
  1172. for (i = 1; i <= 3; i++) {
  1173. if (!(tmp & BIT_SCFG1[i - 1])) {
  1174. data->sens[i - 1] = 4;
  1175. } else {
  1176. if (w83781d_read_value
  1177. (data,
  1178. W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
  1179. data->sens[i - 1] = 1;
  1180. else
  1181. data->sens[i - 1] = 2;
  1182. }
  1183. if (type == w83783s && i == 2)
  1184. break;
  1185. }
  1186. }
  1187. if (init && type != as99127f) {
  1188. /* Enable temp2 */
  1189. tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
  1190. if (tmp & 0x01) {
  1191. dev_warn(dev, "Enabling temp2, readings "
  1192. "might not make sense\n");
  1193. w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
  1194. tmp & 0xfe);
  1195. }
  1196. /* Enable temp3 */
  1197. if (type != w83783s) {
  1198. tmp = w83781d_read_value(data,
  1199. W83781D_REG_TEMP3_CONFIG);
  1200. if (tmp & 0x01) {
  1201. dev_warn(dev, "Enabling temp3, "
  1202. "readings might not make sense\n");
  1203. w83781d_write_value(data,
  1204. W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
  1205. }
  1206. }
  1207. }
  1208. /* Start monitoring */
  1209. w83781d_write_value(data, W83781D_REG_CONFIG,
  1210. (w83781d_read_value(data,
  1211. W83781D_REG_CONFIG) & 0xf7)
  1212. | 0x01);
  1213. /* A few vars need to be filled upon startup */
  1214. for (i = 0; i < 3; i++) {
  1215. data->fan_min[i] = w83781d_read_value(data,
  1216. W83781D_REG_FAN_MIN(i));
  1217. }
  1218. mutex_init(&data->update_lock);
  1219. }
  1220. static struct w83781d_data *w83781d_update_device(struct device *dev)
  1221. {
  1222. struct w83781d_data *data = dev_get_drvdata(dev);
  1223. struct i2c_client *client = data->client;
  1224. int i;
  1225. mutex_lock(&data->update_lock);
  1226. if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
  1227. || !data->valid) {
  1228. dev_dbg(dev, "Starting device update\n");
  1229. for (i = 0; i <= 8; i++) {
  1230. if (data->type == w83783s && i == 1)
  1231. continue; /* 783S has no in1 */
  1232. data->in[i] =
  1233. w83781d_read_value(data, W83781D_REG_IN(i));
  1234. data->in_min[i] =
  1235. w83781d_read_value(data, W83781D_REG_IN_MIN(i));
  1236. data->in_max[i] =
  1237. w83781d_read_value(data, W83781D_REG_IN_MAX(i));
  1238. if ((data->type != w83782d) && (i == 6))
  1239. break;
  1240. }
  1241. for (i = 0; i < 3; i++) {
  1242. data->fan[i] =
  1243. w83781d_read_value(data, W83781D_REG_FAN(i));
  1244. data->fan_min[i] =
  1245. w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
  1246. }
  1247. if (data->type != w83781d && data->type != as99127f) {
  1248. for (i = 0; i < 4; i++) {
  1249. data->pwm[i] =
  1250. w83781d_read_value(data,
  1251. W83781D_REG_PWM[i]);
  1252. /* Only W83782D on SMBus has PWM3 and PWM4 */
  1253. if ((data->type != w83782d || !client)
  1254. && i == 1)
  1255. break;
  1256. }
  1257. /* Only PWM2 can be disabled */
  1258. data->pwm2_enable = (w83781d_read_value(data,
  1259. W83781D_REG_PWMCLK12) & 0x08) >> 3;
  1260. }
  1261. data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
  1262. data->temp_max =
  1263. w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
  1264. data->temp_max_hyst =
  1265. w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
  1266. data->temp_add[0] =
  1267. w83781d_read_value(data, W83781D_REG_TEMP(2));
  1268. data->temp_max_add[0] =
  1269. w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
  1270. data->temp_max_hyst_add[0] =
  1271. w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
  1272. if (data->type != w83783s) {
  1273. data->temp_add[1] =
  1274. w83781d_read_value(data, W83781D_REG_TEMP(3));
  1275. data->temp_max_add[1] =
  1276. w83781d_read_value(data,
  1277. W83781D_REG_TEMP_OVER(3));
  1278. data->temp_max_hyst_add[1] =
  1279. w83781d_read_value(data,
  1280. W83781D_REG_TEMP_HYST(3));
  1281. }
  1282. i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
  1283. data->vid = i & 0x0f;
  1284. data->vid |= (w83781d_read_value(data,
  1285. W83781D_REG_CHIPID) & 0x01) << 4;
  1286. data->fan_div[0] = (i >> 4) & 0x03;
  1287. data->fan_div[1] = (i >> 6) & 0x03;
  1288. data->fan_div[2] = (w83781d_read_value(data,
  1289. W83781D_REG_PIN) >> 6) & 0x03;
  1290. if ((data->type != w83781d) && (data->type != as99127f)) {
  1291. i = w83781d_read_value(data, W83781D_REG_VBAT);
  1292. data->fan_div[0] |= (i >> 3) & 0x04;
  1293. data->fan_div[1] |= (i >> 4) & 0x04;
  1294. data->fan_div[2] |= (i >> 5) & 0x04;
  1295. }
  1296. if (data->type == w83782d) {
  1297. data->alarms = w83781d_read_value(data,
  1298. W83782D_REG_ALARM1)
  1299. | (w83781d_read_value(data,
  1300. W83782D_REG_ALARM2) << 8)
  1301. | (w83781d_read_value(data,
  1302. W83782D_REG_ALARM3) << 16);
  1303. } else if (data->type == w83783s) {
  1304. data->alarms = w83781d_read_value(data,
  1305. W83782D_REG_ALARM1)
  1306. | (w83781d_read_value(data,
  1307. W83782D_REG_ALARM2) << 8);
  1308. } else {
  1309. /* No real-time status registers, fall back to
  1310. interrupt status registers */
  1311. data->alarms = w83781d_read_value(data,
  1312. W83781D_REG_ALARM1)
  1313. | (w83781d_read_value(data,
  1314. W83781D_REG_ALARM2) << 8);
  1315. }
  1316. i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
  1317. data->beep_mask = (i << 8) +
  1318. w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
  1319. if ((data->type != w83781d) && (data->type != as99127f)) {
  1320. data->beep_mask |=
  1321. w83781d_read_value(data,
  1322. W83781D_REG_BEEP_INTS3) << 16;
  1323. }
  1324. data->last_updated = jiffies;
  1325. data->valid = 1;
  1326. }
  1327. mutex_unlock(&data->update_lock);
  1328. return data;
  1329. }
  1330. static const struct i2c_device_id w83781d_ids[] = {
  1331. { "w83781d", w83781d, },
  1332. { "w83782d", w83782d, },
  1333. { "w83783s", w83783s, },
  1334. { "as99127f", as99127f },
  1335. { /* LIST END */ }
  1336. };
  1337. MODULE_DEVICE_TABLE(i2c, w83781d_ids);
  1338. static struct i2c_driver w83781d_driver = {
  1339. .class = I2C_CLASS_HWMON,
  1340. .driver = {
  1341. .name = "w83781d",
  1342. },
  1343. .probe = w83781d_probe,
  1344. .remove = w83781d_remove,
  1345. .id_table = w83781d_ids,
  1346. .detect = w83781d_detect,
  1347. .address_list = normal_i2c,
  1348. };
  1349. /*
  1350. * ISA related code
  1351. */
  1352. #ifdef CONFIG_ISA
  1353. /* ISA device, if found */
  1354. static struct platform_device *pdev;
  1355. static unsigned short isa_address = 0x290;
  1356. /* I2C devices get this name attribute automatically, but for ISA devices
  1357. we must create it by ourselves. */
  1358. static ssize_t
  1359. show_name(struct device *dev, struct device_attribute *devattr, char *buf)
  1360. {
  1361. struct w83781d_data *data = dev_get_drvdata(dev);
  1362. return sprintf(buf, "%s\n", data->name);
  1363. }
  1364. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  1365. static struct w83781d_data *w83781d_data_if_isa(void)
  1366. {
  1367. return pdev ? platform_get_drvdata(pdev) : NULL;
  1368. }
  1369. /* Returns 1 if the I2C chip appears to be an alias of the ISA chip */
  1370. static int w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1371. {
  1372. struct w83781d_data *isa;
  1373. int i;
  1374. if (!pdev) /* No ISA chip */
  1375. return 0;
  1376. isa = platform_get_drvdata(pdev);
  1377. if (w83781d_read_value(isa, W83781D_REG_I2C_ADDR) != client->addr)
  1378. return 0; /* Address doesn't match */
  1379. if (w83781d_read_value(isa, W83781D_REG_WCHIPID) != chipid)
  1380. return 0; /* Chip type doesn't match */
  1381. /* We compare all the limit registers, the config register and the
  1382. * interrupt mask registers */
  1383. for (i = 0x2b; i <= 0x3d; i++) {
  1384. if (w83781d_read_value(isa, i) !=
  1385. i2c_smbus_read_byte_data(client, i))
  1386. return 0;
  1387. }
  1388. if (w83781d_read_value(isa, W83781D_REG_CONFIG) !=
  1389. i2c_smbus_read_byte_data(client, W83781D_REG_CONFIG))
  1390. return 0;
  1391. for (i = 0x43; i <= 0x46; i++) {
  1392. if (w83781d_read_value(isa, i) !=
  1393. i2c_smbus_read_byte_data(client, i))
  1394. return 0;
  1395. }
  1396. return 1;
  1397. }
  1398. static int
  1399. w83781d_read_value_isa(struct w83781d_data *data, u16 reg)
  1400. {
  1401. int word_sized, res;
  1402. word_sized = (((reg & 0xff00) == 0x100)
  1403. || ((reg & 0xff00) == 0x200))
  1404. && (((reg & 0x00ff) == 0x50)
  1405. || ((reg & 0x00ff) == 0x53)
  1406. || ((reg & 0x00ff) == 0x55));
  1407. if (reg & 0xff00) {
  1408. outb_p(W83781D_REG_BANK,
  1409. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1410. outb_p(reg >> 8,
  1411. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1412. }
  1413. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1414. res = inb_p(data->isa_addr + W83781D_DATA_REG_OFFSET);
  1415. if (word_sized) {
  1416. outb_p((reg & 0xff) + 1,
  1417. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1418. res =
  1419. (res << 8) + inb_p(data->isa_addr +
  1420. W83781D_DATA_REG_OFFSET);
  1421. }
  1422. if (reg & 0xff00) {
  1423. outb_p(W83781D_REG_BANK,
  1424. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1425. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1426. }
  1427. return res;
  1428. }
  1429. static void
  1430. w83781d_write_value_isa(struct w83781d_data *data, u16 reg, u16 value)
  1431. {
  1432. int word_sized;
  1433. word_sized = (((reg & 0xff00) == 0x100)
  1434. || ((reg & 0xff00) == 0x200))
  1435. && (((reg & 0x00ff) == 0x53)
  1436. || ((reg & 0x00ff) == 0x55));
  1437. if (reg & 0xff00) {
  1438. outb_p(W83781D_REG_BANK,
  1439. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1440. outb_p(reg >> 8,
  1441. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1442. }
  1443. outb_p(reg & 0xff, data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1444. if (word_sized) {
  1445. outb_p(value >> 8,
  1446. data->isa_addr + W83781D_DATA_REG_OFFSET);
  1447. outb_p((reg & 0xff) + 1,
  1448. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1449. }
  1450. outb_p(value & 0xff, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1451. if (reg & 0xff00) {
  1452. outb_p(W83781D_REG_BANK,
  1453. data->isa_addr + W83781D_ADDR_REG_OFFSET);
  1454. outb_p(0, data->isa_addr + W83781D_DATA_REG_OFFSET);
  1455. }
  1456. }
  1457. /* The SMBus locks itself, usually, but nothing may access the Winbond between
  1458. bank switches. ISA access must always be locked explicitly!
  1459. We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
  1460. would slow down the W83781D access and should not be necessary.
  1461. There are some ugly typecasts here, but the good news is - they should
  1462. nowhere else be necessary! */
  1463. static int
  1464. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1465. {
  1466. struct i2c_client *client = data->client;
  1467. int res;
  1468. mutex_lock(&data->lock);
  1469. if (client)
  1470. res = w83781d_read_value_i2c(data, reg);
  1471. else
  1472. res = w83781d_read_value_isa(data, reg);
  1473. mutex_unlock(&data->lock);
  1474. return res;
  1475. }
  1476. static int
  1477. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1478. {
  1479. struct i2c_client *client = data->client;
  1480. mutex_lock(&data->lock);
  1481. if (client)
  1482. w83781d_write_value_i2c(data, reg, value);
  1483. else
  1484. w83781d_write_value_isa(data, reg, value);
  1485. mutex_unlock(&data->lock);
  1486. return 0;
  1487. }
  1488. static int __devinit
  1489. w83781d_isa_probe(struct platform_device *pdev)
  1490. {
  1491. int err, reg;
  1492. struct w83781d_data *data;
  1493. struct resource *res;
  1494. /* Reserve the ISA region */
  1495. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1496. if (!request_region(res->start + W83781D_ADDR_REG_OFFSET, 2,
  1497. "w83781d")) {
  1498. err = -EBUSY;
  1499. goto exit;
  1500. }
  1501. data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL);
  1502. if (!data) {
  1503. err = -ENOMEM;
  1504. goto exit_release_region;
  1505. }
  1506. mutex_init(&data->lock);
  1507. data->isa_addr = res->start;
  1508. platform_set_drvdata(pdev, data);
  1509. reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
  1510. switch (reg) {
  1511. case 0x30:
  1512. data->type = w83782d;
  1513. data->name = "w83782d";
  1514. break;
  1515. default:
  1516. data->type = w83781d;
  1517. data->name = "w83781d";
  1518. }
  1519. /* Initialize the W83781D chip */
  1520. w83781d_init_device(&pdev->dev);
  1521. /* Register sysfs hooks */
  1522. err = w83781d_create_files(&pdev->dev, data->type, 1);
  1523. if (err)
  1524. goto exit_remove_files;
  1525. err = device_create_file(&pdev->dev, &dev_attr_name);
  1526. if (err)
  1527. goto exit_remove_files;
  1528. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  1529. if (IS_ERR(data->hwmon_dev)) {
  1530. err = PTR_ERR(data->hwmon_dev);
  1531. goto exit_remove_files;
  1532. }
  1533. return 0;
  1534. exit_remove_files:
  1535. sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
  1536. sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
  1537. device_remove_file(&pdev->dev, &dev_attr_name);
  1538. kfree(data);
  1539. exit_release_region:
  1540. release_region(res->start + W83781D_ADDR_REG_OFFSET, 2);
  1541. exit:
  1542. return err;
  1543. }
  1544. static int __devexit
  1545. w83781d_isa_remove(struct platform_device *pdev)
  1546. {
  1547. struct w83781d_data *data = platform_get_drvdata(pdev);
  1548. hwmon_device_unregister(data->hwmon_dev);
  1549. sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
  1550. sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
  1551. device_remove_file(&pdev->dev, &dev_attr_name);
  1552. release_region(data->isa_addr + W83781D_ADDR_REG_OFFSET, 2);
  1553. kfree(data);
  1554. return 0;
  1555. }
  1556. static struct platform_driver w83781d_isa_driver = {
  1557. .driver = {
  1558. .owner = THIS_MODULE,
  1559. .name = "w83781d",
  1560. },
  1561. .probe = w83781d_isa_probe,
  1562. .remove = __devexit_p(w83781d_isa_remove),
  1563. };
  1564. /* return 1 if a supported chip is found, 0 otherwise */
  1565. static int __init
  1566. w83781d_isa_found(unsigned short address)
  1567. {
  1568. int val, save, found = 0;
  1569. int port;
  1570. /* Some boards declare base+0 to base+7 as a PNP device, some base+4
  1571. * to base+7 and some base+5 to base+6. So we better request each port
  1572. * individually for the probing phase. */
  1573. for (port = address; port < address + W83781D_EXTENT; port++) {
  1574. if (!request_region(port, 1, "w83781d")) {
  1575. pr_debug("Failed to request port 0x%x\n", port);
  1576. goto release;
  1577. }
  1578. }
  1579. #define REALLY_SLOW_IO
  1580. /* We need the timeouts for at least some W83781D-like
  1581. chips. But only if we read 'undefined' registers. */
  1582. val = inb_p(address + 1);
  1583. if (inb_p(address + 2) != val
  1584. || inb_p(address + 3) != val
  1585. || inb_p(address + 7) != val) {
  1586. pr_debug("Detection failed at step %d\n", 1);
  1587. goto release;
  1588. }
  1589. #undef REALLY_SLOW_IO
  1590. /* We should be able to change the 7 LSB of the address port. The
  1591. MSB (busy flag) should be clear initially, set after the write. */
  1592. save = inb_p(address + W83781D_ADDR_REG_OFFSET);
  1593. if (save & 0x80) {
  1594. pr_debug("Detection failed at step %d\n", 2);
  1595. goto release;
  1596. }
  1597. val = ~save & 0x7f;
  1598. outb_p(val, address + W83781D_ADDR_REG_OFFSET);
  1599. if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
  1600. outb_p(save, address + W83781D_ADDR_REG_OFFSET);
  1601. pr_debug("Detection failed at step %d\n", 3);
  1602. goto release;
  1603. }
  1604. /* We found a device, now see if it could be a W83781D */
  1605. outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
  1606. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1607. if (val & 0x80) {
  1608. pr_debug("Detection failed at step %d\n", 4);
  1609. goto release;
  1610. }
  1611. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1612. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1613. outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
  1614. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1615. if ((!(save & 0x80) && (val != 0xa3))
  1616. || ((save & 0x80) && (val != 0x5c))) {
  1617. pr_debug("Detection failed at step %d\n", 5);
  1618. goto release;
  1619. }
  1620. outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
  1621. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1622. if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
  1623. pr_debug("Detection failed at step %d\n", 6);
  1624. goto release;
  1625. }
  1626. /* The busy flag should be clear again */
  1627. if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
  1628. pr_debug("Detection failed at step %d\n", 7);
  1629. goto release;
  1630. }
  1631. /* Determine the chip type */
  1632. outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
  1633. save = inb_p(address + W83781D_DATA_REG_OFFSET);
  1634. outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
  1635. outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
  1636. val = inb_p(address + W83781D_DATA_REG_OFFSET);
  1637. if ((val & 0xfe) == 0x10 /* W83781D */
  1638. || val == 0x30) /* W83782D */
  1639. found = 1;
  1640. if (found)
  1641. pr_info("Found a %s chip at %#x\n",
  1642. val == 0x30 ? "W83782D" : "W83781D", (int)address);
  1643. release:
  1644. for (port--; port >= address; port--)
  1645. release_region(port, 1);
  1646. return found;
  1647. }
  1648. static int __init
  1649. w83781d_isa_device_add(unsigned short address)
  1650. {
  1651. struct resource res = {
  1652. .start = address,
  1653. .end = address + W83781D_EXTENT - 1,
  1654. .name = "w83781d",
  1655. .flags = IORESOURCE_IO,
  1656. };
  1657. int err;
  1658. pdev = platform_device_alloc("w83781d", address);
  1659. if (!pdev) {
  1660. err = -ENOMEM;
  1661. pr_err("Device allocation failed\n");
  1662. goto exit;
  1663. }
  1664. err = platform_device_add_resources(pdev, &res, 1);
  1665. if (err) {
  1666. pr_err("Device resource addition failed (%d)\n", err);
  1667. goto exit_device_put;
  1668. }
  1669. err = platform_device_add(pdev);
  1670. if (err) {
  1671. pr_err("Device addition failed (%d)\n", err);
  1672. goto exit_device_put;
  1673. }
  1674. return 0;
  1675. exit_device_put:
  1676. platform_device_put(pdev);
  1677. exit:
  1678. pdev = NULL;
  1679. return err;
  1680. }
  1681. static int __init
  1682. w83781d_isa_register(void)
  1683. {
  1684. int res;
  1685. if (w83781d_isa_found(isa_address)) {
  1686. res = platform_driver_register(&w83781d_isa_driver);
  1687. if (res)
  1688. goto exit;
  1689. /* Sets global pdev as a side effect */
  1690. res = w83781d_isa_device_add(isa_address);
  1691. if (res)
  1692. goto exit_unreg_isa_driver;
  1693. }
  1694. return 0;
  1695. exit_unreg_isa_driver:
  1696. platform_driver_unregister(&w83781d_isa_driver);
  1697. exit:
  1698. return res;
  1699. }
  1700. static void
  1701. w83781d_isa_unregister(void)
  1702. {
  1703. if (pdev) {
  1704. platform_device_unregister(pdev);
  1705. platform_driver_unregister(&w83781d_isa_driver);
  1706. }
  1707. }
  1708. #else /* !CONFIG_ISA */
  1709. static struct w83781d_data *w83781d_data_if_isa(void)
  1710. {
  1711. return NULL;
  1712. }
  1713. static int
  1714. w83781d_alias_detect(struct i2c_client *client, u8 chipid)
  1715. {
  1716. return 0;
  1717. }
  1718. static int
  1719. w83781d_read_value(struct w83781d_data *data, u16 reg)
  1720. {
  1721. int res;
  1722. mutex_lock(&data->lock);
  1723. res = w83781d_read_value_i2c(data, reg);
  1724. mutex_unlock(&data->lock);
  1725. return res;
  1726. }
  1727. static int
  1728. w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
  1729. {
  1730. mutex_lock(&data->lock);
  1731. w83781d_write_value_i2c(data, reg, value);
  1732. mutex_unlock(&data->lock);
  1733. return 0;
  1734. }
  1735. static int __init
  1736. w83781d_isa_register(void)
  1737. {
  1738. return 0;
  1739. }
  1740. static void
  1741. w83781d_isa_unregister(void)
  1742. {
  1743. }
  1744. #endif /* CONFIG_ISA */
  1745. static int __init
  1746. sensors_w83781d_init(void)
  1747. {
  1748. int res;
  1749. /* We register the ISA device first, so that we can skip the
  1750. * registration of an I2C interface to the same device. */
  1751. res = w83781d_isa_register();
  1752. if (res)
  1753. goto exit;
  1754. res = i2c_add_driver(&w83781d_driver);
  1755. if (res)
  1756. goto exit_unreg_isa;
  1757. return 0;
  1758. exit_unreg_isa:
  1759. w83781d_isa_unregister();
  1760. exit:
  1761. return res;
  1762. }
  1763. static void __exit
  1764. sensors_w83781d_exit(void)
  1765. {
  1766. w83781d_isa_unregister();
  1767. i2c_del_driver(&w83781d_driver);
  1768. }
  1769. MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
  1770. "Philip Edelbrock <phil@netroedge.com>, "
  1771. "and Mark Studebaker <mdsxyz123@yahoo.com>");
  1772. MODULE_DESCRIPTION("W83781D driver");
  1773. MODULE_LICENSE("GPL");
  1774. module_init(sensors_w83781d_init);
  1775. module_exit(sensors_w83781d_exit);