edac_pci.c 12 KB

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  1. /*
  2. * EDAC PCI component
  3. *
  4. * Author: Dave Jiang <djiang@mvista.com>
  5. *
  6. * 2007 (c) MontaVista Software, Inc. This file is licensed under
  7. * the terms of the GNU General Public License version 2. This program
  8. * is licensed "as is" without any warranty of any kind, whether express
  9. * or implied.
  10. *
  11. */
  12. #include <linux/module.h>
  13. #include <linux/types.h>
  14. #include <linux/smp.h>
  15. #include <linux/init.h>
  16. #include <linux/sysctl.h>
  17. #include <linux/highmem.h>
  18. #include <linux/timer.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/list.h>
  22. #include <linux/sysdev.h>
  23. #include <linux/ctype.h>
  24. #include <linux/workqueue.h>
  25. #include <asm/uaccess.h>
  26. #include <asm/page.h>
  27. #include "edac_core.h"
  28. #include "edac_module.h"
  29. static DEFINE_MUTEX(edac_pci_ctls_mutex);
  30. static LIST_HEAD(edac_pci_list);
  31. static atomic_t pci_indexes = ATOMIC_INIT(0);
  32. /*
  33. * edac_pci_alloc_ctl_info
  34. *
  35. * The alloc() function for the 'edac_pci' control info
  36. * structure. The chip driver will allocate one of these for each
  37. * edac_pci it is going to control/register with the EDAC CORE.
  38. */
  39. struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
  40. const char *edac_pci_name)
  41. {
  42. struct edac_pci_ctl_info *pci;
  43. void *pvt;
  44. unsigned int size;
  45. debugf1("%s()\n", __func__);
  46. pci = (struct edac_pci_ctl_info *)0;
  47. pvt = edac_align_ptr(&pci[1], sz_pvt);
  48. size = ((unsigned long)pvt) + sz_pvt;
  49. /* Alloc the needed control struct memory */
  50. pci = kzalloc(size, GFP_KERNEL);
  51. if (pci == NULL)
  52. return NULL;
  53. /* Now much private space */
  54. pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL;
  55. pci->pvt_info = pvt;
  56. pci->op_state = OP_ALLOC;
  57. snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name);
  58. return pci;
  59. }
  60. EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info);
  61. /*
  62. * edac_pci_free_ctl_info()
  63. *
  64. * Last action on the pci control structure.
  65. *
  66. * call the remove sysfs information, which will unregister
  67. * this control struct's kobj. When that kobj's ref count
  68. * goes to zero, its release function will be call and then
  69. * kfree() the memory.
  70. */
  71. void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)
  72. {
  73. debugf1("%s()\n", __func__);
  74. edac_pci_remove_sysfs(pci);
  75. }
  76. EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info);
  77. /*
  78. * find_edac_pci_by_dev()
  79. * scans the edac_pci list for a specific 'struct device *'
  80. *
  81. * return NULL if not found, or return control struct pointer
  82. */
  83. static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev)
  84. {
  85. struct edac_pci_ctl_info *pci;
  86. struct list_head *item;
  87. debugf1("%s()\n", __func__);
  88. list_for_each(item, &edac_pci_list) {
  89. pci = list_entry(item, struct edac_pci_ctl_info, link);
  90. if (pci->dev == dev)
  91. return pci;
  92. }
  93. return NULL;
  94. }
  95. /*
  96. * add_edac_pci_to_global_list
  97. * Before calling this function, caller must assign a unique value to
  98. * edac_dev->pci_idx.
  99. * Return:
  100. * 0 on success
  101. * 1 on failure
  102. */
  103. static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
  104. {
  105. struct list_head *item, *insert_before;
  106. struct edac_pci_ctl_info *rover;
  107. debugf1("%s()\n", __func__);
  108. insert_before = &edac_pci_list;
  109. /* Determine if already on the list */
  110. rover = find_edac_pci_by_dev(pci->dev);
  111. if (unlikely(rover != NULL))
  112. goto fail0;
  113. /* Insert in ascending order by 'pci_idx', so find position */
  114. list_for_each(item, &edac_pci_list) {
  115. rover = list_entry(item, struct edac_pci_ctl_info, link);
  116. if (rover->pci_idx >= pci->pci_idx) {
  117. if (unlikely(rover->pci_idx == pci->pci_idx))
  118. goto fail1;
  119. insert_before = item;
  120. break;
  121. }
  122. }
  123. list_add_tail_rcu(&pci->link, insert_before);
  124. return 0;
  125. fail0:
  126. edac_printk(KERN_WARNING, EDAC_PCI,
  127. "%s (%s) %s %s already assigned %d\n",
  128. dev_name(rover->dev), edac_dev_name(rover),
  129. rover->mod_name, rover->ctl_name, rover->pci_idx);
  130. return 1;
  131. fail1:
  132. edac_printk(KERN_WARNING, EDAC_PCI,
  133. "but in low-level driver: attempt to assign\n"
  134. "\tduplicate pci_idx %d in %s()\n", rover->pci_idx,
  135. __func__);
  136. return 1;
  137. }
  138. /*
  139. * del_edac_pci_from_global_list
  140. *
  141. * remove the PCI control struct from the global list
  142. */
  143. static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci)
  144. {
  145. list_del_rcu(&pci->link);
  146. /* these are for safe removal of devices from global list while
  147. * NMI handlers may be traversing list
  148. */
  149. synchronize_rcu();
  150. INIT_LIST_HEAD(&pci->link);
  151. }
  152. #if 0
  153. /* Older code, but might use in the future */
  154. /*
  155. * edac_pci_find()
  156. * Search for an edac_pci_ctl_info structure whose index is 'idx'
  157. *
  158. * If found, return a pointer to the structure
  159. * Else return NULL.
  160. *
  161. * Caller must hold pci_ctls_mutex.
  162. */
  163. struct edac_pci_ctl_info *edac_pci_find(int idx)
  164. {
  165. struct list_head *item;
  166. struct edac_pci_ctl_info *pci;
  167. /* Iterage over list, looking for exact match of ID */
  168. list_for_each(item, &edac_pci_list) {
  169. pci = list_entry(item, struct edac_pci_ctl_info, link);
  170. if (pci->pci_idx >= idx) {
  171. if (pci->pci_idx == idx)
  172. return pci;
  173. /* not on list, so terminate early */
  174. break;
  175. }
  176. }
  177. return NULL;
  178. }
  179. EXPORT_SYMBOL_GPL(edac_pci_find);
  180. #endif
  181. /*
  182. * edac_pci_workq_function()
  183. *
  184. * periodic function that performs the operation
  185. * scheduled by a workq request, for a given PCI control struct
  186. */
  187. static void edac_pci_workq_function(struct work_struct *work_req)
  188. {
  189. struct delayed_work *d_work = to_delayed_work(work_req);
  190. struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work);
  191. int msec;
  192. unsigned long delay;
  193. debugf3("%s() checking\n", __func__);
  194. mutex_lock(&edac_pci_ctls_mutex);
  195. if (pci->op_state == OP_RUNNING_POLL) {
  196. /* we might be in POLL mode, but there may NOT be a poll func
  197. */
  198. if ((pci->edac_check != NULL) && edac_pci_get_check_errors())
  199. pci->edac_check(pci);
  200. /* if we are on a one second period, then use round */
  201. msec = edac_pci_get_poll_msec();
  202. if (msec == 1000)
  203. delay = round_jiffies_relative(msecs_to_jiffies(msec));
  204. else
  205. delay = msecs_to_jiffies(msec);
  206. /* Reschedule only if we are in POLL mode */
  207. queue_delayed_work(edac_workqueue, &pci->work, delay);
  208. }
  209. mutex_unlock(&edac_pci_ctls_mutex);
  210. }
  211. /*
  212. * edac_pci_workq_setup()
  213. * initialize a workq item for this edac_pci instance
  214. * passing in the new delay period in msec
  215. *
  216. * locking model:
  217. * called when 'edac_pci_ctls_mutex' is locked
  218. */
  219. static void edac_pci_workq_setup(struct edac_pci_ctl_info *pci,
  220. unsigned int msec)
  221. {
  222. debugf0("%s()\n", __func__);
  223. INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function);
  224. queue_delayed_work(edac_workqueue, &pci->work,
  225. msecs_to_jiffies(edac_pci_get_poll_msec()));
  226. }
  227. /*
  228. * edac_pci_workq_teardown()
  229. * stop the workq processing on this edac_pci instance
  230. */
  231. static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci)
  232. {
  233. int status;
  234. debugf0("%s()\n", __func__);
  235. status = cancel_delayed_work(&pci->work);
  236. if (status == 0)
  237. flush_workqueue(edac_workqueue);
  238. }
  239. /*
  240. * edac_pci_reset_delay_period
  241. *
  242. * called with a new period value for the workq period
  243. * a) stop current workq timer
  244. * b) restart workq timer with new value
  245. */
  246. void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
  247. unsigned long value)
  248. {
  249. debugf0("%s()\n", __func__);
  250. edac_pci_workq_teardown(pci);
  251. /* need to lock for the setup */
  252. mutex_lock(&edac_pci_ctls_mutex);
  253. edac_pci_workq_setup(pci, value);
  254. mutex_unlock(&edac_pci_ctls_mutex);
  255. }
  256. EXPORT_SYMBOL_GPL(edac_pci_reset_delay_period);
  257. /*
  258. * edac_pci_alloc_index: Allocate a unique PCI index number
  259. *
  260. * Return:
  261. * allocated index number
  262. *
  263. */
  264. int edac_pci_alloc_index(void)
  265. {
  266. return atomic_inc_return(&pci_indexes) - 1;
  267. }
  268. EXPORT_SYMBOL_GPL(edac_pci_alloc_index);
  269. /*
  270. * edac_pci_add_device: Insert the 'edac_dev' structure into the
  271. * edac_pci global list and create sysfs entries associated with
  272. * edac_pci structure.
  273. * @pci: pointer to the edac_device structure to be added to the list
  274. * @edac_idx: A unique numeric identifier to be assigned to the
  275. * 'edac_pci' structure.
  276. *
  277. * Return:
  278. * 0 Success
  279. * !0 Failure
  280. */
  281. int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
  282. {
  283. debugf0("%s()\n", __func__);
  284. pci->pci_idx = edac_idx;
  285. pci->start_time = jiffies;
  286. mutex_lock(&edac_pci_ctls_mutex);
  287. if (add_edac_pci_to_global_list(pci))
  288. goto fail0;
  289. if (edac_pci_create_sysfs(pci)) {
  290. edac_pci_printk(pci, KERN_WARNING,
  291. "failed to create sysfs pci\n");
  292. goto fail1;
  293. }
  294. if (pci->edac_check != NULL) {
  295. pci->op_state = OP_RUNNING_POLL;
  296. edac_pci_workq_setup(pci, 1000);
  297. } else {
  298. pci->op_state = OP_RUNNING_INTERRUPT;
  299. }
  300. edac_pci_printk(pci, KERN_INFO,
  301. "Giving out device to module '%s' controller '%s':"
  302. " DEV '%s' (%s)\n",
  303. pci->mod_name,
  304. pci->ctl_name,
  305. edac_dev_name(pci), edac_op_state_to_string(pci->op_state));
  306. mutex_unlock(&edac_pci_ctls_mutex);
  307. return 0;
  308. /* error unwind stack */
  309. fail1:
  310. del_edac_pci_from_global_list(pci);
  311. fail0:
  312. mutex_unlock(&edac_pci_ctls_mutex);
  313. return 1;
  314. }
  315. EXPORT_SYMBOL_GPL(edac_pci_add_device);
  316. /*
  317. * edac_pci_del_device()
  318. * Remove sysfs entries for specified edac_pci structure and
  319. * then remove edac_pci structure from global list
  320. *
  321. * @dev:
  322. * Pointer to 'struct device' representing edac_pci structure
  323. * to remove
  324. *
  325. * Return:
  326. * Pointer to removed edac_pci structure,
  327. * or NULL if device not found
  328. */
  329. struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev)
  330. {
  331. struct edac_pci_ctl_info *pci;
  332. debugf0("%s()\n", __func__);
  333. mutex_lock(&edac_pci_ctls_mutex);
  334. /* ensure the control struct is on the global list
  335. * if not, then leave
  336. */
  337. pci = find_edac_pci_by_dev(dev);
  338. if (pci == NULL) {
  339. mutex_unlock(&edac_pci_ctls_mutex);
  340. return NULL;
  341. }
  342. pci->op_state = OP_OFFLINE;
  343. del_edac_pci_from_global_list(pci);
  344. mutex_unlock(&edac_pci_ctls_mutex);
  345. /* stop the workq timer */
  346. edac_pci_workq_teardown(pci);
  347. edac_printk(KERN_INFO, EDAC_PCI,
  348. "Removed device %d for %s %s: DEV %s\n",
  349. pci->pci_idx, pci->mod_name, pci->ctl_name, edac_dev_name(pci));
  350. return pci;
  351. }
  352. EXPORT_SYMBOL_GPL(edac_pci_del_device);
  353. /*
  354. * edac_pci_generic_check
  355. *
  356. * a Generic parity check API
  357. */
  358. static void edac_pci_generic_check(struct edac_pci_ctl_info *pci)
  359. {
  360. debugf4("%s()\n", __func__);
  361. edac_pci_do_parity_check();
  362. }
  363. /* free running instance index counter */
  364. static int edac_pci_idx;
  365. #define EDAC_PCI_GENCTL_NAME "EDAC PCI controller"
  366. struct edac_pci_gen_data {
  367. int edac_idx;
  368. };
  369. /*
  370. * edac_pci_create_generic_ctl
  371. *
  372. * A generic constructor for a PCI parity polling device
  373. * Some systems have more than one domain of PCI busses.
  374. * For systems with one domain, then this API will
  375. * provide for a generic poller.
  376. *
  377. * This routine calls the edac_pci_alloc_ctl_info() for
  378. * the generic device, with default values
  379. */
  380. struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev,
  381. const char *mod_name)
  382. {
  383. struct edac_pci_ctl_info *pci;
  384. struct edac_pci_gen_data *pdata;
  385. pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME);
  386. if (!pci)
  387. return NULL;
  388. pdata = pci->pvt_info;
  389. pci->dev = dev;
  390. dev_set_drvdata(pci->dev, pci);
  391. pci->dev_name = pci_name(to_pci_dev(dev));
  392. pci->mod_name = mod_name;
  393. pci->ctl_name = EDAC_PCI_GENCTL_NAME;
  394. pci->edac_check = edac_pci_generic_check;
  395. pdata->edac_idx = edac_pci_idx++;
  396. if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
  397. debugf3("%s(): failed edac_pci_add_device()\n", __func__);
  398. edac_pci_free_ctl_info(pci);
  399. return NULL;
  400. }
  401. return pci;
  402. }
  403. EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl);
  404. /*
  405. * edac_pci_release_generic_ctl
  406. *
  407. * The release function of a generic EDAC PCI polling device
  408. */
  409. void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)
  410. {
  411. debugf0("%s() pci mod=%s\n", __func__, pci->mod_name);
  412. edac_pci_del_device(pci->dev);
  413. edac_pci_free_ctl_info(pci);
  414. }
  415. EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl);