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- #
- # EDAC Kconfig
- # Copyright (c) 2008 Doug Thompson www.softwarebitmaker.com
- # Licensed and distributed under the GPL
- #
- menuconfig EDAC
- bool "EDAC (Error Detection And Correction) reporting"
- depends on HAS_IOMEM
- depends on X86 || PPC || TILE
- help
- EDAC is designed to report errors in the core system.
- These are low-level errors that are reported in the CPU or
- supporting chipset or other subsystems:
- memory errors, cache errors, PCI errors, thermal throttling, etc..
- If unsure, select 'Y'.
- If this code is reporting problems on your system, please
- see the EDAC project web pages for more information at:
- <http://bluesmoke.sourceforge.net/>
- and:
- <http://buttersideup.com/edacwiki>
- There is also a mailing list for the EDAC project, which can
- be found via the sourceforge page.
- if EDAC
- comment "Reporting subsystems"
- config EDAC_DEBUG
- bool "Debugging"
- help
- This turns on debugging information for the entire EDAC
- sub-system. You can insert module with "debug_level=x", current
- there're four debug levels (x=0,1,2,3 from low to high).
- Usually you should select 'N'.
- config EDAC_DECODE_MCE
- tristate "Decode MCEs in human-readable form (only on AMD for now)"
- depends on CPU_SUP_AMD && X86_MCE
- default y
- ---help---
- Enable this option if you want to decode Machine Check Exceptions
- occurring on your machine in human-readable form.
- You should definitely say Y here in case you want to decode MCEs
- which occur really early upon boot, before the module infrastructure
- has been initialized.
- config EDAC_MCE_INJ
- tristate "Simple MCE injection interface over /sysfs"
- depends on EDAC_DECODE_MCE
- default n
- help
- This is a simple interface to inject MCEs over /sysfs and test
- the MCE decoding code in EDAC.
- This is currently AMD-only.
- config EDAC_MM_EDAC
- tristate "Main Memory EDAC (Error Detection And Correction) reporting"
- help
- Some systems are able to detect and correct errors in main
- memory. EDAC can report statistics on memory error
- detection and correction (EDAC - or commonly referred to ECC
- errors). EDAC will also try to decode where these errors
- occurred so that a particular failing memory module can be
- replaced. If unsure, select 'Y'.
- config EDAC_MCE
- bool
- config EDAC_AMD64
- tristate "AMD64 (Opteron, Athlon64) K8, F10h"
- depends on EDAC_MM_EDAC && AMD_NB && X86_64 && EDAC_DECODE_MCE
- help
- Support for error detection and correction of DRAM ECC errors on
- the AMD64 families of memory controllers (K8 and F10h)
- config EDAC_AMD64_ERROR_INJECTION
- bool "Sysfs HW Error injection facilities"
- depends on EDAC_AMD64
- help
- Recent Opterons (Family 10h and later) provide for Memory Error
- Injection into the ECC detection circuits. The amd64_edac module
- allows the operator/user to inject Uncorrectable and Correctable
- errors into DRAM.
- When enabled, in each of the respective memory controller directories
- (/sys/devices/system/edac/mc/mcX), there are 3 input files:
- - inject_section (0..3, 16-byte section of 64-byte cacheline),
- - inject_word (0..8, 16-bit word of 16-byte section),
- - inject_ecc_vector (hex ecc vector: select bits of inject word)
- In addition, there are two control files, inject_read and inject_write,
- which trigger the DRAM ECC Read and Write respectively.
- config EDAC_AMD76X
- tristate "AMD 76x (760, 762, 768)"
- depends on EDAC_MM_EDAC && PCI && X86_32
- help
- Support for error detection and correction on the AMD 76x
- series of chipsets used with the Athlon processor.
- config EDAC_E7XXX
- tristate "Intel e7xxx (e7205, e7500, e7501, e7505)"
- depends on EDAC_MM_EDAC && PCI && X86_32
- help
- Support for error detection and correction on the Intel
- E7205, E7500, E7501 and E7505 server chipsets.
- config EDAC_E752X
- tristate "Intel e752x (e7520, e7525, e7320) and 3100"
- depends on EDAC_MM_EDAC && PCI && X86 && HOTPLUG
- help
- Support for error detection and correction on the Intel
- E7520, E7525, E7320 server chipsets.
- config EDAC_I82443BXGX
- tristate "Intel 82443BX/GX (440BX/GX)"
- depends on EDAC_MM_EDAC && PCI && X86_32
- depends on BROKEN
- help
- Support for error detection and correction on the Intel
- 82443BX/GX memory controllers (440BX/GX chipsets).
- config EDAC_I82875P
- tristate "Intel 82875p (D82875P, E7210)"
- depends on EDAC_MM_EDAC && PCI && X86_32
- help
- Support for error detection and correction on the Intel
- DP82785P and E7210 server chipsets.
- config EDAC_I82975X
- tristate "Intel 82975x (D82975x)"
- depends on EDAC_MM_EDAC && PCI && X86
- help
- Support for error detection and correction on the Intel
- DP82975x server chipsets.
- config EDAC_I3000
- tristate "Intel 3000/3010"
- depends on EDAC_MM_EDAC && PCI && X86
- help
- Support for error detection and correction on the Intel
- 3000 and 3010 server chipsets.
- config EDAC_I3200
- tristate "Intel 3200"
- depends on EDAC_MM_EDAC && PCI && X86 && EXPERIMENTAL
- help
- Support for error detection and correction on the Intel
- 3200 and 3210 server chipsets.
- config EDAC_X38
- tristate "Intel X38"
- depends on EDAC_MM_EDAC && PCI && X86
- help
- Support for error detection and correction on the Intel
- X38 server chipsets.
- config EDAC_I5400
- tristate "Intel 5400 (Seaburg) chipsets"
- depends on EDAC_MM_EDAC && PCI && X86
- help
- Support for error detection and correction the Intel
- i5400 MCH chipset (Seaburg).
- config EDAC_I7CORE
- tristate "Intel i7 Core (Nehalem) processors"
- depends on EDAC_MM_EDAC && PCI && X86
- select EDAC_MCE
- help
- Support for error detection and correction the Intel
- i7 Core (Nehalem) Integrated Memory Controller that exists on
- newer processors like i7 Core, i7 Core Extreme, Xeon 35xx
- and Xeon 55xx processors.
- config EDAC_I82860
- tristate "Intel 82860"
- depends on EDAC_MM_EDAC && PCI && X86_32
- help
- Support for error detection and correction on the Intel
- 82860 chipset.
- config EDAC_R82600
- tristate "Radisys 82600 embedded chipset"
- depends on EDAC_MM_EDAC && PCI && X86_32
- help
- Support for error detection and correction on the Radisys
- 82600 embedded chipset.
- config EDAC_I5000
- tristate "Intel Greencreek/Blackford chipset"
- depends on EDAC_MM_EDAC && X86 && PCI
- help
- Support for error detection and correction the Intel
- Greekcreek/Blackford chipsets.
- config EDAC_I5100
- tristate "Intel San Clemente MCH"
- depends on EDAC_MM_EDAC && X86 && PCI
- help
- Support for error detection and correction the Intel
- San Clemente MCH.
- config EDAC_I7300
- tristate "Intel Clarksboro MCH"
- depends on EDAC_MM_EDAC && X86 && PCI
- help
- Support for error detection and correction the Intel
- Clarksboro MCH (Intel 7300 chipset).
- config EDAC_MPC85XX
- tristate "Freescale MPC83xx / MPC85xx"
- depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx)
- help
- Support for error detection and correction on the Freescale
- MPC8349, MPC8560, MPC8540, MPC8548
- config EDAC_MV64X60
- tristate "Marvell MV64x60"
- depends on EDAC_MM_EDAC && MV64X60
- help
- Support for error detection and correction on the Marvell
- MV64360 and MV64460 chipsets.
- config EDAC_PASEMI
- tristate "PA Semi PWRficient"
- depends on EDAC_MM_EDAC && PCI
- depends on PPC_PASEMI
- help
- Support for error detection and correction on PA Semi
- PWRficient.
- config EDAC_CELL
- tristate "Cell Broadband Engine memory controller"
- depends on EDAC_MM_EDAC && PPC_CELL_COMMON
- help
- Support for error detection and correction on the
- Cell Broadband Engine internal memory controller
- on platform without a hypervisor
- config EDAC_PPC4XX
- tristate "PPC4xx IBM DDR2 Memory Controller"
- depends on EDAC_MM_EDAC && 4xx
- help
- This enables support for EDAC on the ECC memory used
- with the IBM DDR2 memory controller found in various
- PowerPC 4xx embedded processors such as the 405EX[r],
- 440SP, 440SPe, 460EX, 460GT and 460SX.
- config EDAC_AMD8131
- tristate "AMD8131 HyperTransport PCI-X Tunnel"
- depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
- help
- Support for error detection and correction on the
- AMD8131 HyperTransport PCI-X Tunnel chip.
- Note, add more Kconfig dependency if it's adopted
- on some machine other than Maple.
- config EDAC_AMD8111
- tristate "AMD8111 HyperTransport I/O Hub"
- depends on EDAC_MM_EDAC && PCI && PPC_MAPLE
- help
- Support for error detection and correction on the
- AMD8111 HyperTransport I/O Hub chip.
- Note, add more Kconfig dependency if it's adopted
- on some machine other than Maple.
- config EDAC_CPC925
- tristate "IBM CPC925 Memory Controller (PPC970FX)"
- depends on EDAC_MM_EDAC && PPC64
- help
- Support for error detection and correction on the
- IBM CPC925 Bridge and Memory Controller, which is
- a companion chip to the PowerPC 970 family of
- processors.
- config EDAC_TILE
- tristate "Tilera Memory Controller"
- depends on EDAC_MM_EDAC && TILE
- default y
- help
- Support for error detection and correction on the
- Tilera memory controller.
- endif # EDAC
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