tpm_tis.c 19 KB

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  1. /*
  2. * Copyright (C) 2005, 2006 IBM Corporation
  3. *
  4. * Authors:
  5. * Leendert van Doorn <leendert@watson.ibm.com>
  6. * Kylene Hall <kjhall@us.ibm.com>
  7. *
  8. * Maintained by: <tpmdd-devel@lists.sourceforge.net>
  9. *
  10. * Device driver for TCG/TCPA TPM (trusted platform module).
  11. * Specifications at www.trustedcomputinggroup.org
  12. *
  13. * This device driver implements the TPM interface as defined in
  14. * the TCG TPM Interface Spec version 1.2, revision 1.0.
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License as
  18. * published by the Free Software Foundation, version 2 of the
  19. * License.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/pnp.h>
  25. #include <linux/slab.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/wait.h>
  28. #include <linux/acpi.h>
  29. #include "tpm.h"
  30. #define TPM_HEADER_SIZE 10
  31. enum tis_access {
  32. TPM_ACCESS_VALID = 0x80,
  33. TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
  34. TPM_ACCESS_REQUEST_PENDING = 0x04,
  35. TPM_ACCESS_REQUEST_USE = 0x02,
  36. };
  37. enum tis_status {
  38. TPM_STS_VALID = 0x80,
  39. TPM_STS_COMMAND_READY = 0x40,
  40. TPM_STS_GO = 0x20,
  41. TPM_STS_DATA_AVAIL = 0x10,
  42. TPM_STS_DATA_EXPECT = 0x08,
  43. };
  44. enum tis_int_flags {
  45. TPM_GLOBAL_INT_ENABLE = 0x80000000,
  46. TPM_INTF_BURST_COUNT_STATIC = 0x100,
  47. TPM_INTF_CMD_READY_INT = 0x080,
  48. TPM_INTF_INT_EDGE_FALLING = 0x040,
  49. TPM_INTF_INT_EDGE_RISING = 0x020,
  50. TPM_INTF_INT_LEVEL_LOW = 0x010,
  51. TPM_INTF_INT_LEVEL_HIGH = 0x008,
  52. TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
  53. TPM_INTF_STS_VALID_INT = 0x002,
  54. TPM_INTF_DATA_AVAIL_INT = 0x001,
  55. };
  56. enum tis_defaults {
  57. TIS_MEM_BASE = 0xFED40000,
  58. TIS_MEM_LEN = 0x5000,
  59. TIS_SHORT_TIMEOUT = 750, /* ms */
  60. TIS_LONG_TIMEOUT = 2000, /* 2 sec */
  61. };
  62. #define TPM_ACCESS(l) (0x0000 | ((l) << 12))
  63. #define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
  64. #define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
  65. #define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
  66. #define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
  67. #define TPM_STS(l) (0x0018 | ((l) << 12))
  68. #define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
  69. #define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
  70. #define TPM_RID(l) (0x0F04 | ((l) << 12))
  71. static LIST_HEAD(tis_chips);
  72. static DEFINE_SPINLOCK(tis_lock);
  73. #ifdef CONFIG_ACPI
  74. static int is_itpm(struct pnp_dev *dev)
  75. {
  76. struct acpi_device *acpi = pnp_acpi_device(dev);
  77. struct acpi_hardware_id *id;
  78. list_for_each_entry(id, &acpi->pnp.ids, list) {
  79. if (!strcmp("INTC0102", id->id))
  80. return 1;
  81. }
  82. return 0;
  83. }
  84. #else
  85. static int is_itpm(struct pnp_dev *dev)
  86. {
  87. return 0;
  88. }
  89. #endif
  90. static int check_locality(struct tpm_chip *chip, int l)
  91. {
  92. if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
  93. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
  94. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
  95. return chip->vendor.locality = l;
  96. return -1;
  97. }
  98. static void release_locality(struct tpm_chip *chip, int l, int force)
  99. {
  100. if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) &
  101. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
  102. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
  103. iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
  104. chip->vendor.iobase + TPM_ACCESS(l));
  105. }
  106. static int request_locality(struct tpm_chip *chip, int l)
  107. {
  108. unsigned long stop;
  109. long rc;
  110. if (check_locality(chip, l) >= 0)
  111. return l;
  112. iowrite8(TPM_ACCESS_REQUEST_USE,
  113. chip->vendor.iobase + TPM_ACCESS(l));
  114. if (chip->vendor.irq) {
  115. rc = wait_event_interruptible_timeout(chip->vendor.int_queue,
  116. (check_locality
  117. (chip, l) >= 0),
  118. chip->vendor.timeout_a);
  119. if (rc > 0)
  120. return l;
  121. } else {
  122. /* wait for burstcount */
  123. stop = jiffies + chip->vendor.timeout_a;
  124. do {
  125. if (check_locality(chip, l) >= 0)
  126. return l;
  127. msleep(TPM_TIMEOUT);
  128. }
  129. while (time_before(jiffies, stop));
  130. }
  131. return -1;
  132. }
  133. static u8 tpm_tis_status(struct tpm_chip *chip)
  134. {
  135. return ioread8(chip->vendor.iobase +
  136. TPM_STS(chip->vendor.locality));
  137. }
  138. static void tpm_tis_ready(struct tpm_chip *chip)
  139. {
  140. /* this causes the current command to be aborted */
  141. iowrite8(TPM_STS_COMMAND_READY,
  142. chip->vendor.iobase + TPM_STS(chip->vendor.locality));
  143. }
  144. static int get_burstcount(struct tpm_chip *chip)
  145. {
  146. unsigned long stop;
  147. int burstcnt;
  148. /* wait for burstcount */
  149. /* which timeout value, spec has 2 answers (c & d) */
  150. stop = jiffies + chip->vendor.timeout_d;
  151. do {
  152. burstcnt = ioread8(chip->vendor.iobase +
  153. TPM_STS(chip->vendor.locality) + 1);
  154. burstcnt += ioread8(chip->vendor.iobase +
  155. TPM_STS(chip->vendor.locality) +
  156. 2) << 8;
  157. if (burstcnt)
  158. return burstcnt;
  159. msleep(TPM_TIMEOUT);
  160. } while (time_before(jiffies, stop));
  161. return -EBUSY;
  162. }
  163. static int wait_for_stat(struct tpm_chip *chip, u8 mask, unsigned long timeout,
  164. wait_queue_head_t *queue)
  165. {
  166. unsigned long stop;
  167. long rc;
  168. u8 status;
  169. /* check current status */
  170. status = tpm_tis_status(chip);
  171. if ((status & mask) == mask)
  172. return 0;
  173. if (chip->vendor.irq) {
  174. rc = wait_event_interruptible_timeout(*queue,
  175. ((tpm_tis_status
  176. (chip) & mask) ==
  177. mask), timeout);
  178. if (rc > 0)
  179. return 0;
  180. } else {
  181. stop = jiffies + timeout;
  182. do {
  183. msleep(TPM_TIMEOUT);
  184. status = tpm_tis_status(chip);
  185. if ((status & mask) == mask)
  186. return 0;
  187. } while (time_before(jiffies, stop));
  188. }
  189. return -ETIME;
  190. }
  191. static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
  192. {
  193. int size = 0, burstcnt;
  194. while (size < count &&
  195. wait_for_stat(chip,
  196. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  197. chip->vendor.timeout_c,
  198. &chip->vendor.read_queue)
  199. == 0) {
  200. burstcnt = get_burstcount(chip);
  201. for (; burstcnt > 0 && size < count; burstcnt--)
  202. buf[size++] = ioread8(chip->vendor.iobase +
  203. TPM_DATA_FIFO(chip->vendor.
  204. locality));
  205. }
  206. return size;
  207. }
  208. static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  209. {
  210. int size = 0;
  211. int expected, status;
  212. if (count < TPM_HEADER_SIZE) {
  213. size = -EIO;
  214. goto out;
  215. }
  216. /* read first 10 bytes, including tag, paramsize, and result */
  217. if ((size =
  218. recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
  219. dev_err(chip->dev, "Unable to read header\n");
  220. goto out;
  221. }
  222. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  223. if (expected > count) {
  224. size = -EIO;
  225. goto out;
  226. }
  227. if ((size +=
  228. recv_data(chip, &buf[TPM_HEADER_SIZE],
  229. expected - TPM_HEADER_SIZE)) < expected) {
  230. dev_err(chip->dev, "Unable to read remainder of result\n");
  231. size = -ETIME;
  232. goto out;
  233. }
  234. wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  235. &chip->vendor.int_queue);
  236. status = tpm_tis_status(chip);
  237. if (status & TPM_STS_DATA_AVAIL) { /* retry? */
  238. dev_err(chip->dev, "Error left over data\n");
  239. size = -EIO;
  240. goto out;
  241. }
  242. out:
  243. tpm_tis_ready(chip);
  244. release_locality(chip, chip->vendor.locality, 0);
  245. return size;
  246. }
  247. static int itpm;
  248. module_param(itpm, bool, 0444);
  249. MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
  250. /*
  251. * If interrupts are used (signaled by an irq set in the vendor structure)
  252. * tpm.c can skip polling for the data to be available as the interrupt is
  253. * waited for here
  254. */
  255. static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
  256. {
  257. int rc, status, burstcnt;
  258. size_t count = 0;
  259. u32 ordinal;
  260. if (request_locality(chip, 0) < 0)
  261. return -EBUSY;
  262. status = tpm_tis_status(chip);
  263. if ((status & TPM_STS_COMMAND_READY) == 0) {
  264. tpm_tis_ready(chip);
  265. if (wait_for_stat
  266. (chip, TPM_STS_COMMAND_READY, chip->vendor.timeout_b,
  267. &chip->vendor.int_queue) < 0) {
  268. rc = -ETIME;
  269. goto out_err;
  270. }
  271. }
  272. while (count < len - 1) {
  273. burstcnt = get_burstcount(chip);
  274. for (; burstcnt > 0 && count < len - 1; burstcnt--) {
  275. iowrite8(buf[count], chip->vendor.iobase +
  276. TPM_DATA_FIFO(chip->vendor.locality));
  277. count++;
  278. }
  279. wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  280. &chip->vendor.int_queue);
  281. status = tpm_tis_status(chip);
  282. if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
  283. rc = -EIO;
  284. goto out_err;
  285. }
  286. }
  287. /* write last byte */
  288. iowrite8(buf[count],
  289. chip->vendor.iobase +
  290. TPM_DATA_FIFO(chip->vendor.locality));
  291. wait_for_stat(chip, TPM_STS_VALID, chip->vendor.timeout_c,
  292. &chip->vendor.int_queue);
  293. status = tpm_tis_status(chip);
  294. if ((status & TPM_STS_DATA_EXPECT) != 0) {
  295. rc = -EIO;
  296. goto out_err;
  297. }
  298. /* go and do it */
  299. iowrite8(TPM_STS_GO,
  300. chip->vendor.iobase + TPM_STS(chip->vendor.locality));
  301. if (chip->vendor.irq) {
  302. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  303. if (wait_for_stat
  304. (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  305. tpm_calc_ordinal_duration(chip, ordinal),
  306. &chip->vendor.read_queue) < 0) {
  307. rc = -ETIME;
  308. goto out_err;
  309. }
  310. }
  311. return len;
  312. out_err:
  313. tpm_tis_ready(chip);
  314. release_locality(chip, chip->vendor.locality, 0);
  315. return rc;
  316. }
  317. static const struct file_operations tis_ops = {
  318. .owner = THIS_MODULE,
  319. .llseek = no_llseek,
  320. .open = tpm_open,
  321. .read = tpm_read,
  322. .write = tpm_write,
  323. .release = tpm_release,
  324. };
  325. static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
  326. static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
  327. static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL);
  328. static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL);
  329. static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL);
  330. static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated,
  331. NULL);
  332. static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL);
  333. static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
  334. static struct attribute *tis_attrs[] = {
  335. &dev_attr_pubek.attr,
  336. &dev_attr_pcrs.attr,
  337. &dev_attr_enabled.attr,
  338. &dev_attr_active.attr,
  339. &dev_attr_owned.attr,
  340. &dev_attr_temp_deactivated.attr,
  341. &dev_attr_caps.attr,
  342. &dev_attr_cancel.attr, NULL,
  343. };
  344. static struct attribute_group tis_attr_grp = {
  345. .attrs = tis_attrs
  346. };
  347. static struct tpm_vendor_specific tpm_tis = {
  348. .status = tpm_tis_status,
  349. .recv = tpm_tis_recv,
  350. .send = tpm_tis_send,
  351. .cancel = tpm_tis_ready,
  352. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  353. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  354. .req_canceled = TPM_STS_COMMAND_READY,
  355. .attr_group = &tis_attr_grp,
  356. .miscdev = {
  357. .fops = &tis_ops,},
  358. };
  359. static irqreturn_t tis_int_probe(int irq, void *dev_id)
  360. {
  361. struct tpm_chip *chip = dev_id;
  362. u32 interrupt;
  363. interrupt = ioread32(chip->vendor.iobase +
  364. TPM_INT_STATUS(chip->vendor.locality));
  365. if (interrupt == 0)
  366. return IRQ_NONE;
  367. chip->vendor.irq = irq;
  368. /* Clear interrupts handled with TPM_EOI */
  369. iowrite32(interrupt,
  370. chip->vendor.iobase +
  371. TPM_INT_STATUS(chip->vendor.locality));
  372. return IRQ_HANDLED;
  373. }
  374. static irqreturn_t tis_int_handler(int dummy, void *dev_id)
  375. {
  376. struct tpm_chip *chip = dev_id;
  377. u32 interrupt;
  378. int i;
  379. interrupt = ioread32(chip->vendor.iobase +
  380. TPM_INT_STATUS(chip->vendor.locality));
  381. if (interrupt == 0)
  382. return IRQ_NONE;
  383. if (interrupt & TPM_INTF_DATA_AVAIL_INT)
  384. wake_up_interruptible(&chip->vendor.read_queue);
  385. if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
  386. for (i = 0; i < 5; i++)
  387. if (check_locality(chip, i) >= 0)
  388. break;
  389. if (interrupt &
  390. (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
  391. TPM_INTF_CMD_READY_INT))
  392. wake_up_interruptible(&chip->vendor.int_queue);
  393. /* Clear interrupts handled with TPM_EOI */
  394. iowrite32(interrupt,
  395. chip->vendor.iobase +
  396. TPM_INT_STATUS(chip->vendor.locality));
  397. ioread32(chip->vendor.iobase + TPM_INT_STATUS(chip->vendor.locality));
  398. return IRQ_HANDLED;
  399. }
  400. static int interrupts = 1;
  401. module_param(interrupts, bool, 0444);
  402. MODULE_PARM_DESC(interrupts, "Enable interrupts");
  403. static int tpm_tis_init(struct device *dev, resource_size_t start,
  404. resource_size_t len, unsigned int irq)
  405. {
  406. u32 vendor, intfcaps, intmask;
  407. int rc, i;
  408. struct tpm_chip *chip;
  409. if (!(chip = tpm_register_hardware(dev, &tpm_tis)))
  410. return -ENODEV;
  411. chip->vendor.iobase = ioremap(start, len);
  412. if (!chip->vendor.iobase) {
  413. rc = -EIO;
  414. goto out_err;
  415. }
  416. /* Default timeouts */
  417. chip->vendor.timeout_a = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  418. chip->vendor.timeout_b = msecs_to_jiffies(TIS_LONG_TIMEOUT);
  419. chip->vendor.timeout_c = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  420. chip->vendor.timeout_d = msecs_to_jiffies(TIS_SHORT_TIMEOUT);
  421. if (request_locality(chip, 0) != 0) {
  422. rc = -ENODEV;
  423. goto out_err;
  424. }
  425. vendor = ioread32(chip->vendor.iobase + TPM_DID_VID(0));
  426. dev_info(dev,
  427. "1.2 TPM (device-id 0x%X, rev-id %d)\n",
  428. vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
  429. if (itpm)
  430. dev_info(dev, "Intel iTPM workaround enabled\n");
  431. /* Figure out the capabilities */
  432. intfcaps =
  433. ioread32(chip->vendor.iobase +
  434. TPM_INTF_CAPS(chip->vendor.locality));
  435. dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
  436. intfcaps);
  437. if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
  438. dev_dbg(dev, "\tBurst Count Static\n");
  439. if (intfcaps & TPM_INTF_CMD_READY_INT)
  440. dev_dbg(dev, "\tCommand Ready Int Support\n");
  441. if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
  442. dev_dbg(dev, "\tInterrupt Edge Falling\n");
  443. if (intfcaps & TPM_INTF_INT_EDGE_RISING)
  444. dev_dbg(dev, "\tInterrupt Edge Rising\n");
  445. if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
  446. dev_dbg(dev, "\tInterrupt Level Low\n");
  447. if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
  448. dev_dbg(dev, "\tInterrupt Level High\n");
  449. if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
  450. dev_dbg(dev, "\tLocality Change Int Support\n");
  451. if (intfcaps & TPM_INTF_STS_VALID_INT)
  452. dev_dbg(dev, "\tSts Valid Int Support\n");
  453. if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
  454. dev_dbg(dev, "\tData Avail Int Support\n");
  455. /* INTERRUPT Setup */
  456. init_waitqueue_head(&chip->vendor.read_queue);
  457. init_waitqueue_head(&chip->vendor.int_queue);
  458. intmask =
  459. ioread32(chip->vendor.iobase +
  460. TPM_INT_ENABLE(chip->vendor.locality));
  461. intmask |= TPM_INTF_CMD_READY_INT
  462. | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
  463. | TPM_INTF_STS_VALID_INT;
  464. iowrite32(intmask,
  465. chip->vendor.iobase +
  466. TPM_INT_ENABLE(chip->vendor.locality));
  467. if (interrupts)
  468. chip->vendor.irq = irq;
  469. if (interrupts && !chip->vendor.irq) {
  470. chip->vendor.irq =
  471. ioread8(chip->vendor.iobase +
  472. TPM_INT_VECTOR(chip->vendor.locality));
  473. for (i = 3; i < 16 && chip->vendor.irq == 0; i++) {
  474. iowrite8(i, chip->vendor.iobase +
  475. TPM_INT_VECTOR(chip->vendor.locality));
  476. if (request_irq
  477. (i, tis_int_probe, IRQF_SHARED,
  478. chip->vendor.miscdev.name, chip) != 0) {
  479. dev_info(chip->dev,
  480. "Unable to request irq: %d for probe\n",
  481. i);
  482. continue;
  483. }
  484. /* Clear all existing */
  485. iowrite32(ioread32
  486. (chip->vendor.iobase +
  487. TPM_INT_STATUS(chip->vendor.locality)),
  488. chip->vendor.iobase +
  489. TPM_INT_STATUS(chip->vendor.locality));
  490. /* Turn on */
  491. iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
  492. chip->vendor.iobase +
  493. TPM_INT_ENABLE(chip->vendor.locality));
  494. /* Generate Interrupts */
  495. tpm_gen_interrupt(chip);
  496. /* Turn off */
  497. iowrite32(intmask,
  498. chip->vendor.iobase +
  499. TPM_INT_ENABLE(chip->vendor.locality));
  500. free_irq(i, chip);
  501. }
  502. }
  503. if (chip->vendor.irq) {
  504. iowrite8(chip->vendor.irq,
  505. chip->vendor.iobase +
  506. TPM_INT_VECTOR(chip->vendor.locality));
  507. if (request_irq
  508. (chip->vendor.irq, tis_int_handler, IRQF_SHARED,
  509. chip->vendor.miscdev.name, chip) != 0) {
  510. dev_info(chip->dev,
  511. "Unable to request irq: %d for use\n",
  512. chip->vendor.irq);
  513. chip->vendor.irq = 0;
  514. } else {
  515. /* Clear all existing */
  516. iowrite32(ioread32
  517. (chip->vendor.iobase +
  518. TPM_INT_STATUS(chip->vendor.locality)),
  519. chip->vendor.iobase +
  520. TPM_INT_STATUS(chip->vendor.locality));
  521. /* Turn on */
  522. iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
  523. chip->vendor.iobase +
  524. TPM_INT_ENABLE(chip->vendor.locality));
  525. }
  526. }
  527. INIT_LIST_HEAD(&chip->vendor.list);
  528. spin_lock(&tis_lock);
  529. list_add(&chip->vendor.list, &tis_chips);
  530. spin_unlock(&tis_lock);
  531. tpm_get_timeouts(chip);
  532. tpm_continue_selftest(chip);
  533. return 0;
  534. out_err:
  535. if (chip->vendor.iobase)
  536. iounmap(chip->vendor.iobase);
  537. tpm_remove_hardware(chip->dev);
  538. return rc;
  539. }
  540. #ifdef CONFIG_PNP
  541. static int __devinit tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
  542. const struct pnp_device_id *pnp_id)
  543. {
  544. resource_size_t start, len;
  545. unsigned int irq = 0;
  546. start = pnp_mem_start(pnp_dev, 0);
  547. len = pnp_mem_len(pnp_dev, 0);
  548. if (pnp_irq_valid(pnp_dev, 0))
  549. irq = pnp_irq(pnp_dev, 0);
  550. else
  551. interrupts = 0;
  552. if (is_itpm(pnp_dev))
  553. itpm = 1;
  554. return tpm_tis_init(&pnp_dev->dev, start, len, irq);
  555. }
  556. static int tpm_tis_pnp_suspend(struct pnp_dev *dev, pm_message_t msg)
  557. {
  558. return tpm_pm_suspend(&dev->dev, msg);
  559. }
  560. static int tpm_tis_pnp_resume(struct pnp_dev *dev)
  561. {
  562. struct tpm_chip *chip = pnp_get_drvdata(dev);
  563. int ret;
  564. ret = tpm_pm_resume(&dev->dev);
  565. if (!ret)
  566. tpm_continue_selftest(chip);
  567. return ret;
  568. }
  569. static struct pnp_device_id tpm_pnp_tbl[] __devinitdata = {
  570. {"PNP0C31", 0}, /* TPM */
  571. {"ATM1200", 0}, /* Atmel */
  572. {"IFX0102", 0}, /* Infineon */
  573. {"BCM0101", 0}, /* Broadcom */
  574. {"BCM0102", 0}, /* Broadcom */
  575. {"NSC1200", 0}, /* National */
  576. {"ICO0102", 0}, /* Intel */
  577. /* Add new here */
  578. {"", 0}, /* User Specified */
  579. {"", 0} /* Terminator */
  580. };
  581. MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
  582. static __devexit void tpm_tis_pnp_remove(struct pnp_dev *dev)
  583. {
  584. struct tpm_chip *chip = pnp_get_drvdata(dev);
  585. tpm_dev_vendor_release(chip);
  586. kfree(chip);
  587. }
  588. static struct pnp_driver tis_pnp_driver = {
  589. .name = "tpm_tis",
  590. .id_table = tpm_pnp_tbl,
  591. .probe = tpm_tis_pnp_init,
  592. .suspend = tpm_tis_pnp_suspend,
  593. .resume = tpm_tis_pnp_resume,
  594. .remove = tpm_tis_pnp_remove,
  595. };
  596. #define TIS_HID_USR_IDX sizeof(tpm_pnp_tbl)/sizeof(struct pnp_device_id) -2
  597. module_param_string(hid, tpm_pnp_tbl[TIS_HID_USR_IDX].id,
  598. sizeof(tpm_pnp_tbl[TIS_HID_USR_IDX].id), 0444);
  599. MODULE_PARM_DESC(hid, "Set additional specific HID for this driver to probe");
  600. #endif
  601. static int tpm_tis_suspend(struct platform_device *dev, pm_message_t msg)
  602. {
  603. return tpm_pm_suspend(&dev->dev, msg);
  604. }
  605. static int tpm_tis_resume(struct platform_device *dev)
  606. {
  607. return tpm_pm_resume(&dev->dev);
  608. }
  609. static struct platform_driver tis_drv = {
  610. .driver = {
  611. .name = "tpm_tis",
  612. .owner = THIS_MODULE,
  613. },
  614. .suspend = tpm_tis_suspend,
  615. .resume = tpm_tis_resume,
  616. };
  617. static struct platform_device *pdev;
  618. static int force;
  619. module_param(force, bool, 0444);
  620. MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
  621. static int __init init_tis(void)
  622. {
  623. int rc;
  624. #ifdef CONFIG_PNP
  625. if (!force)
  626. return pnp_register_driver(&tis_pnp_driver);
  627. #endif
  628. rc = platform_driver_register(&tis_drv);
  629. if (rc < 0)
  630. return rc;
  631. if (IS_ERR(pdev=platform_device_register_simple("tpm_tis", -1, NULL, 0)))
  632. return PTR_ERR(pdev);
  633. if((rc=tpm_tis_init(&pdev->dev, TIS_MEM_BASE, TIS_MEM_LEN, 0)) != 0) {
  634. platform_device_unregister(pdev);
  635. platform_driver_unregister(&tis_drv);
  636. }
  637. return rc;
  638. }
  639. static void __exit cleanup_tis(void)
  640. {
  641. struct tpm_vendor_specific *i, *j;
  642. struct tpm_chip *chip;
  643. spin_lock(&tis_lock);
  644. list_for_each_entry_safe(i, j, &tis_chips, list) {
  645. chip = to_tpm_chip(i);
  646. tpm_remove_hardware(chip->dev);
  647. iowrite32(~TPM_GLOBAL_INT_ENABLE &
  648. ioread32(chip->vendor.iobase +
  649. TPM_INT_ENABLE(chip->vendor.
  650. locality)),
  651. chip->vendor.iobase +
  652. TPM_INT_ENABLE(chip->vendor.locality));
  653. release_locality(chip, chip->vendor.locality, 1);
  654. if (chip->vendor.irq)
  655. free_irq(chip->vendor.irq, chip);
  656. iounmap(i->iobase);
  657. list_del(&i->list);
  658. }
  659. spin_unlock(&tis_lock);
  660. #ifdef CONFIG_PNP
  661. if (!force) {
  662. pnp_unregister_driver(&tis_pnp_driver);
  663. return;
  664. }
  665. #endif
  666. platform_device_unregister(pdev);
  667. platform_driver_unregister(&tis_drv);
  668. }
  669. module_init(init_tis);
  670. module_exit(cleanup_tis);
  671. MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
  672. MODULE_DESCRIPTION("TPM Driver");
  673. MODULE_VERSION("2.0");
  674. MODULE_LICENSE("GPL");