dwc_otg_hcd_linux.c 24 KB

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  1. /* ==========================================================================
  2. * $File: //dwh/usb_iip/dev/software/otg/linux/drivers/dwc_otg_hcd_linux.c $
  3. * $Revision: #20 $
  4. * $Date: 2011/10/26 $
  5. * $Change: 1872981 $
  6. *
  7. * Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
  8. * "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
  9. * otherwise expressly agreed to in writing between Synopsys and you.
  10. *
  11. * The Software IS NOT an item of Licensed Software or Licensed Product under
  12. * any End User Software License Agreement or Agreement for Licensed Product
  13. * with Synopsys or any supplement thereto. You are permitted to use and
  14. * redistribute this Software in source and binary forms, with or without
  15. * modification, provided that redistributions of source code must retain this
  16. * notice. You may not view, use, disclose, copy or distribute this file or
  17. * any information contained herein except pursuant to this license grant from
  18. * Synopsys. If you do not agree with this notice, including the disclaimer
  19. * below, then you are not authorized to use the Software.
  20. *
  21. * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
  22. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24. * ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
  25. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  26. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  27. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  28. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  29. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  30. * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
  31. * DAMAGE.
  32. * ========================================================================== */
  33. #ifndef DWC_DEVICE_ONLY
  34. /**
  35. * @file
  36. *
  37. * This file contains the implementation of the HCD. In Linux, the HCD
  38. * implements the hc_driver API.
  39. */
  40. #include <linux/kernel.h>
  41. #include <linux/module.h>
  42. #include <linux/moduleparam.h>
  43. #include <linux/init.h>
  44. #include <linux/device.h>
  45. #include <linux/errno.h>
  46. #include <linux/list.h>
  47. #include <linux/interrupt.h>
  48. #include <linux/string.h>
  49. #include <linux/dma-mapping.h>
  50. #include <linux/version.h>
  51. #include <asm/io.h>
  52. #include <linux/usb.h>
  53. #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)
  54. #include <../drivers/usb/core/hcd.h>
  55. #else
  56. #include <linux/usb/hcd.h>
  57. #endif
  58. #include "dwc_otg_hcd_if.h"
  59. #include "dwc_otg_dbg.h"
  60. #include "dwc_otg_driver.h"
  61. #include "dwc_otg_hcd.h"
  62. /**
  63. * Gets the endpoint number from a _bEndpointAddress argument. The endpoint is
  64. * qualified with its direction (possible 32 endpoints per device).
  65. */
  66. #define dwc_ep_addr_to_endpoint(_bEndpointAddress_) ((_bEndpointAddress_ & USB_ENDPOINT_NUMBER_MASK) | \
  67. ((_bEndpointAddress_ & USB_DIR_IN) != 0) << 4)
  68. static const char dwc_otg_hcd_name[] = "dwc_otg_hcd";
  69. /** @name Linux HC Driver API Functions */
  70. /** @{ */
  71. static int urb_enqueue(struct usb_hcd *hcd,
  72. #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
  73. struct usb_host_endpoint *ep,
  74. #endif
  75. struct urb *urb, gfp_t mem_flags);
  76. #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
  77. static int urb_dequeue(struct usb_hcd *hcd, struct urb *urb);
  78. #else
  79. static int urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status);
  80. #endif
  81. static void endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep);
  82. #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)
  83. static void endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep);
  84. #endif
  85. static irqreturn_t dwc_otg_hcd_irq(struct usb_hcd *hcd);
  86. extern int hcd_start(struct usb_hcd *hcd);
  87. extern void hcd_stop(struct usb_hcd *hcd);
  88. extern int hcd_suspend(struct usb_hcd *hcd);
  89. extern int hcd_resume(struct usb_hcd *hcd);
  90. static int get_frame_number(struct usb_hcd *hcd);
  91. extern int hub_status_data(struct usb_hcd *hcd, char *buf);
  92. extern int hub_control(struct usb_hcd *hcd,
  93. u16 typeReq,
  94. u16 wValue, u16 wIndex, char *buf, u16 wLength);
  95. struct wrapper_priv_data {
  96. dwc_otg_hcd_t *dwc_otg_hcd;
  97. };
  98. /** @} */
  99. static struct hc_driver dwc_otg_hc_driver = {
  100. .description = dwc_otg_hcd_name,
  101. .product_desc = "DWC OTG Controller",
  102. .hcd_priv_size = sizeof(struct wrapper_priv_data),
  103. .irq = dwc_otg_hcd_irq,
  104. .flags = HCD_MEMORY | HCD_USB2,
  105. //.reset =
  106. .start = hcd_start,
  107. .stop = hcd_stop,
  108. .bus_suspend = hcd_suspend,
  109. .bus_resume = hcd_resume,
  110. .urb_enqueue = urb_enqueue,
  111. .urb_dequeue = urb_dequeue,
  112. .endpoint_disable = endpoint_disable,
  113. #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)
  114. .endpoint_reset = endpoint_reset,
  115. #endif
  116. .get_frame_number = get_frame_number,
  117. .hub_status_data = hub_status_data,
  118. .hub_control = hub_control,
  119. };
  120. /** Gets the dwc_otg_hcd from a struct usb_hcd */
  121. static inline dwc_otg_hcd_t *hcd_to_dwc_otg_hcd(struct usb_hcd *hcd)
  122. {
  123. struct wrapper_priv_data *p;
  124. p = (struct wrapper_priv_data *)(hcd->hcd_priv);
  125. return p->dwc_otg_hcd;
  126. }
  127. /** Gets the struct usb_hcd that contains a dwc_otg_hcd_t. */
  128. static inline struct usb_hcd *dwc_otg_hcd_to_hcd(dwc_otg_hcd_t * dwc_otg_hcd)
  129. {
  130. return dwc_otg_hcd_get_priv_data(dwc_otg_hcd);
  131. }
  132. /** Gets the usb_host_endpoint associated with an URB. */
  133. inline struct usb_host_endpoint *dwc_urb_to_endpoint(struct urb *urb)
  134. {
  135. struct usb_device *dev = urb->dev;
  136. int ep_num = usb_pipeendpoint(urb->pipe);
  137. if (usb_pipein(urb->pipe))
  138. return dev->ep_in[ep_num];
  139. else
  140. return dev->ep_out[ep_num];
  141. }
  142. static int _disconnect(dwc_otg_hcd_t * hcd)
  143. {
  144. struct usb_hcd *usb_hcd = dwc_otg_hcd_to_hcd(hcd);
  145. usb_hcd->self.is_b_host = 0;
  146. return 0;
  147. }
  148. static int _start(dwc_otg_hcd_t * hcd)
  149. {
  150. struct usb_hcd *usb_hcd = dwc_otg_hcd_to_hcd(hcd);
  151. usb_hcd->self.is_b_host = dwc_otg_hcd_is_b_host(hcd);
  152. hcd_start(usb_hcd);
  153. return 0;
  154. }
  155. static int _hub_info(dwc_otg_hcd_t * hcd, void *urb_handle, uint32_t * hub_addr,
  156. uint32_t * port_addr)
  157. {
  158. struct urb *urb = (struct urb *)urb_handle;
  159. if (urb->dev->tt) {
  160. *hub_addr = urb->dev->tt->hub->devnum;
  161. } else {
  162. *hub_addr = 0;
  163. }
  164. *port_addr = urb->dev->ttport;
  165. return 0;
  166. }
  167. static int _speed(dwc_otg_hcd_t * hcd, void *urb_handle)
  168. {
  169. struct urb *urb = (struct urb *)urb_handle;
  170. return urb->dev->speed;
  171. }
  172. static int _get_b_hnp_enable(dwc_otg_hcd_t * hcd)
  173. {
  174. struct usb_hcd *usb_hcd = dwc_otg_hcd_to_hcd(hcd);
  175. return usb_hcd->self.b_hnp_enable;
  176. }
  177. static void allocate_bus_bandwidth(struct usb_hcd *hcd, uint32_t bw,
  178. struct urb *urb)
  179. {
  180. hcd_to_bus(hcd)->bandwidth_allocated += bw / urb->interval;
  181. if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
  182. hcd_to_bus(hcd)->bandwidth_isoc_reqs++;
  183. } else {
  184. hcd_to_bus(hcd)->bandwidth_int_reqs++;
  185. }
  186. }
  187. static void free_bus_bandwidth(struct usb_hcd *hcd, uint32_t bw,
  188. struct urb *urb)
  189. {
  190. hcd_to_bus(hcd)->bandwidth_allocated -= bw / urb->interval;
  191. if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
  192. hcd_to_bus(hcd)->bandwidth_isoc_reqs--;
  193. } else {
  194. hcd_to_bus(hcd)->bandwidth_int_reqs--;
  195. }
  196. }
  197. /**
  198. * Sets the final status of an URB and returns it to the device driver. Any
  199. * required cleanup of the URB is performed.
  200. */
  201. static int _complete(dwc_otg_hcd_t * hcd, void *urb_handle,
  202. dwc_otg_hcd_urb_t * dwc_otg_urb, int32_t status)
  203. {
  204. struct urb *urb = (struct urb *)urb_handle;
  205. #ifdef DEBUG
  206. if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) {
  207. DWC_PRINTF("%s: urb %p, device %d, ep %d %s, status=%d\n",
  208. __func__, urb, usb_pipedevice(urb->pipe),
  209. usb_pipeendpoint(urb->pipe),
  210. usb_pipein(urb->pipe) ? "IN" : "OUT", status);
  211. if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
  212. int i;
  213. for (i = 0; i < urb->number_of_packets; i++) {
  214. DWC_PRINTF(" ISO Desc %d status: %d\n",
  215. i, urb->iso_frame_desc[i].status);
  216. }
  217. }
  218. }
  219. #endif
  220. urb->actual_length = dwc_otg_hcd_urb_get_actual_length(dwc_otg_urb);
  221. /* Convert status value. */
  222. switch (status) {
  223. case -DWC_E_PROTOCOL:
  224. status = -EPROTO;
  225. break;
  226. case -DWC_E_IN_PROGRESS:
  227. status = -EINPROGRESS;
  228. break;
  229. case -DWC_E_PIPE:
  230. status = -EPIPE;
  231. break;
  232. case -DWC_E_IO:
  233. status = -EIO;
  234. break;
  235. case -DWC_E_TIMEOUT:
  236. status = -ETIMEDOUT;
  237. break;
  238. case -DWC_E_OVERFLOW:
  239. status = -EOVERFLOW;
  240. break;
  241. default:
  242. if (status) {
  243. DWC_PRINTF("Uknown urb status %d\n", status);
  244. }
  245. }
  246. if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
  247. int i;
  248. urb->error_count = dwc_otg_hcd_urb_get_error_count(dwc_otg_urb);
  249. for (i = 0; i < urb->number_of_packets; ++i) {
  250. urb->iso_frame_desc[i].actual_length =
  251. dwc_otg_hcd_urb_get_iso_desc_actual_length
  252. (dwc_otg_urb, i);
  253. urb->iso_frame_desc[i].status =
  254. dwc_otg_hcd_urb_get_iso_desc_status(dwc_otg_urb, i);
  255. }
  256. }
  257. urb->status = status;
  258. urb->hcpriv = NULL;
  259. if (!status) {
  260. if ((urb->transfer_flags & URB_SHORT_NOT_OK) &&
  261. (urb->actual_length < urb->transfer_buffer_length)) {
  262. urb->status = -EREMOTEIO;
  263. }
  264. }
  265. if ((usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) ||
  266. (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
  267. struct usb_host_endpoint *ep = dwc_urb_to_endpoint(urb);
  268. if (ep) {
  269. free_bus_bandwidth(dwc_otg_hcd_to_hcd(hcd),
  270. dwc_otg_hcd_get_ep_bandwidth(hcd,
  271. ep->hcpriv),
  272. urb);
  273. }
  274. }
  275. #if 0
  276. usb_hcd_unlink_urb_from_ep(dwc_otg_hcd_to_hcd(hcd), urb);
  277. #endif
  278. DWC_FREE(dwc_otg_urb);
  279. DWC_SPINUNLOCK(hcd->lock);
  280. #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
  281. usb_hcd_giveback_urb(dwc_otg_hcd_to_hcd(hcd), urb);
  282. #else
  283. usb_hcd_giveback_urb(dwc_otg_hcd_to_hcd(hcd), urb, status);
  284. #endif
  285. DWC_SPINLOCK(hcd->lock);
  286. return 0;
  287. }
  288. static struct dwc_otg_hcd_function_ops hcd_fops = {
  289. .start = _start,
  290. .disconnect = _disconnect,
  291. .hub_info = _hub_info,
  292. .speed = _speed,
  293. .complete = _complete,
  294. .get_b_hnp_enable = _get_b_hnp_enable,
  295. };
  296. /**
  297. * Initializes the HCD. This function allocates memory for and initializes the
  298. * static parts of the usb_hcd and dwc_otg_hcd structures. It also registers the
  299. * USB bus with the core and calls the hc_driver->start() function. It returns
  300. * a negative error on failure.
  301. */
  302. int hcd_init(
  303. #ifdef LM_INTERFACE
  304. struct lm_device *_dev
  305. #elif defined(PCI_INTERFACE)
  306. struct pci_dev *_dev
  307. #endif
  308. )
  309. {
  310. struct usb_hcd *hcd = NULL;
  311. dwc_otg_hcd_t *dwc_otg_hcd = NULL;
  312. #ifdef LM_INTERFACE
  313. dwc_otg_device_t *otg_dev = lm_get_drvdata(_dev);
  314. #elif defined(PCI_INTERFACE)
  315. dwc_otg_device_t *otg_dev = pci_get_drvdata(_dev);
  316. #endif
  317. int retval = 0;
  318. DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD INIT\n");
  319. #if 0 /* move to dwc_otg_driver_probe*/
  320. /* Set device flags indicating whether the HCD supports DMA. */
  321. if (dwc_otg_is_dma_enable(otg_dev->core_if)) {
  322. #ifdef LM_INTERFACE
  323. _dev->dev.dma_mask = (void *)~0;
  324. _dev->dev.coherent_dma_mask = ~0;
  325. #elif defined(PCI_INTERFACE)
  326. pci_set_dma_mask(_dev, DMA_32BIT_MASK);
  327. pci_set_consistent_dma_mask(_dev, DMA_32BIT_MASK);
  328. #endif
  329. } else {
  330. #ifdef LM_INTERFACE
  331. _dev->dev.dma_mask = (void *)0;
  332. _dev->dev.coherent_dma_mask = 0;
  333. #elif defined(PCI_INTERFACE)
  334. pci_set_dma_mask(_dev, 0);
  335. pci_set_consistent_dma_mask(_dev, 0);
  336. #endif
  337. }
  338. #endif
  339. /*
  340. * Allocate memory for the base HCD plus the DWC OTG HCD.
  341. * Initialize the base HCD.
  342. */
  343. #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30)
  344. hcd = usb_create_hcd(&dwc_otg_hc_driver, &_dev->dev, _dev->dev.bus_id);
  345. #else
  346. hcd = usb_create_hcd(&dwc_otg_hc_driver, &_dev->dev, dev_name(&_dev->dev));
  347. hcd->has_tt = 1;
  348. // hcd->uses_new_polling = 1;
  349. // hcd->poll_rh = 0;
  350. #endif
  351. if (!hcd) {
  352. retval = -ENOMEM;
  353. goto error1;
  354. }
  355. hcd->regs = otg_dev->os_dep.base;
  356. /* Initialize the DWC OTG HCD. */
  357. dwc_otg_hcd = dwc_otg_hcd_alloc_hcd();
  358. if (!dwc_otg_hcd) {
  359. goto error2;
  360. }
  361. ((struct wrapper_priv_data *)(hcd->hcd_priv))->dwc_otg_hcd =
  362. dwc_otg_hcd;
  363. otg_dev->hcd = dwc_otg_hcd;
  364. if (dwc_otg_hcd_init(dwc_otg_hcd, otg_dev->core_if)) {
  365. goto error2;
  366. }
  367. otg_dev->hcd->otg_dev = otg_dev;
  368. hcd->self.otg_port = dwc_otg_hcd_otg_port(dwc_otg_hcd);
  369. #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,33) //don't support for LM(with 2.6.20.1 kernel)
  370. // hcd->self.otg_version = dwc_otg_get_otg_version(otg_dev->core_if);
  371. /* Don't support SG list at this point */
  372. hcd->self.sg_tablesize = 0;
  373. #endif
  374. /*
  375. * Finish generic HCD initialization and start the HCD. This function
  376. * allocates the DMA buffer pool, registers the USB bus, requests the
  377. * IRQ line, and calls hcd_start method.
  378. */
  379. retval = usb_add_hcd(hcd, _dev->irq, IRQF_SHARED | IRQF_DISABLED);
  380. if (retval < 0) {
  381. goto error2;
  382. }
  383. dwc_otg_hcd_set_priv_data(dwc_otg_hcd, hcd);
  384. return 0;
  385. error2:
  386. usb_put_hcd(hcd);
  387. error1:
  388. return retval;
  389. }
  390. /**
  391. * Removes the HCD.
  392. * Frees memory and resources associated with the HCD and deregisters the bus.
  393. */
  394. void hcd_remove(
  395. #ifdef LM_INTERFACE
  396. struct lm_device *_dev
  397. #elif defined(PCI_INTERFACE)
  398. struct pci_dev *_dev
  399. #endif
  400. )
  401. {
  402. #ifdef LM_INTERFACE
  403. dwc_otg_device_t *otg_dev = lm_get_drvdata(_dev);
  404. #elif defined(PCI_INTERFACE)
  405. dwc_otg_device_t *otg_dev = pci_get_drvdata(_dev);
  406. #endif
  407. dwc_otg_hcd_t *dwc_otg_hcd;
  408. struct usb_hcd *hcd;
  409. DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD REMOVE\n");
  410. if (!otg_dev) {
  411. DWC_DEBUGPL(DBG_ANY, "%s: otg_dev NULL!\n", __func__);
  412. return;
  413. }
  414. dwc_otg_hcd = otg_dev->hcd;
  415. if (!dwc_otg_hcd) {
  416. DWC_DEBUGPL(DBG_ANY, "%s: otg_dev->hcd NULL!\n", __func__);
  417. return;
  418. }
  419. hcd = dwc_otg_hcd_to_hcd(dwc_otg_hcd);
  420. if (!hcd) {
  421. DWC_DEBUGPL(DBG_ANY,
  422. "%s: dwc_otg_hcd_to_hcd(dwc_otg_hcd) NULL!\n",
  423. __func__);
  424. return;
  425. }
  426. usb_remove_hcd(hcd);
  427. dwc_otg_hcd_set_priv_data(dwc_otg_hcd, NULL);
  428. dwc_otg_hcd_remove(dwc_otg_hcd);
  429. usb_put_hcd(hcd);
  430. }
  431. /* =========================================================================
  432. * Linux HC Driver Functions
  433. * ========================================================================= */
  434. /** Initializes the DWC_otg controller and its root hub and prepares it for host
  435. * mode operation. Activates the root port. Returns 0 on success and a negative
  436. * error code on failure. */
  437. int hcd_start(struct usb_hcd *hcd)
  438. {
  439. dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
  440. struct usb_bus *bus;
  441. DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD START\n");
  442. bus = hcd_to_bus(hcd);
  443. hcd->state = HC_STATE_RUNNING;
  444. if (dwc_otg_hcd_start(dwc_otg_hcd, &hcd_fops)) {
  445. return 0;
  446. }
  447. /* Initialize and connect root hub if one is not already attached */
  448. if (bus->root_hub) {
  449. DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD Has Root Hub\n");
  450. /* Inform the HUB driver to resume. */
  451. usb_hcd_resume_root_hub(hcd);
  452. }
  453. return 0;
  454. }
  455. /**
  456. * Halts the DWC_otg host mode operations in a clean manner. USB transfers are
  457. * stopped.
  458. */
  459. void hcd_stop(struct usb_hcd *hcd)
  460. {
  461. dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
  462. dwc_otg_hcd_stop(dwc_otg_hcd);
  463. }
  464. /** HCD Suspend */
  465. int hcd_suspend(struct usb_hcd *hcd)
  466. {
  467. dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
  468. DWC_DEBUGPL(DBG_HCD, "HCD SUSPEND\n");
  469. dwc_otg_hcd_suspend(dwc_otg_hcd);
  470. return 0;
  471. }
  472. /** HCD resume */
  473. int hcd_resume(struct usb_hcd *hcd)
  474. {
  475. dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
  476. DWC_DEBUGPL(DBG_HCD, "HCD RESUME\n");
  477. dwc_otg_hcd_resume(dwc_otg_hcd);
  478. return 0;
  479. }
  480. /** Returns the current frame number. */
  481. static int get_frame_number(struct usb_hcd *hcd)
  482. {
  483. dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
  484. return dwc_otg_hcd_get_frame_number(dwc_otg_hcd);
  485. }
  486. #ifdef DEBUG
  487. static void dump_urb_info(struct urb *urb, char *fn_name)
  488. {
  489. DWC_PRINTF("%s, urb %p\n", fn_name, urb);
  490. DWC_PRINTF(" Device address: %d\n", usb_pipedevice(urb->pipe));
  491. DWC_PRINTF(" Endpoint: %d, %s\n", usb_pipeendpoint(urb->pipe),
  492. (usb_pipein(urb->pipe) ? "IN" : "OUT"));
  493. DWC_PRINTF(" Endpoint type: %s\n", ( {
  494. char *pipetype;
  495. switch (usb_pipetype(urb->pipe)) {
  496. case PIPE_CONTROL:
  497. pipetype = "CONTROL"; break; case PIPE_BULK:
  498. pipetype = "BULK"; break; case PIPE_INTERRUPT:
  499. pipetype = "INTERRUPT"; break; case PIPE_ISOCHRONOUS:
  500. pipetype = "ISOCHRONOUS"; break; default:
  501. pipetype = "UNKNOWN"; break;};
  502. pipetype;}
  503. )) ;
  504. DWC_PRINTF(" Speed: %s\n", ( {
  505. char *speed; switch (urb->dev->speed) {
  506. case USB_SPEED_HIGH:
  507. speed = "HIGH"; break; case USB_SPEED_FULL:
  508. speed = "FULL"; break; case USB_SPEED_LOW:
  509. speed = "LOW"; break; default:
  510. speed = "UNKNOWN"; break;};
  511. speed;}
  512. )) ;
  513. DWC_PRINTF(" Max packet size: %d\n",
  514. usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)));
  515. DWC_PRINTF(" Data buffer length: %d\n", urb->transfer_buffer_length);
  516. DWC_PRINTF(" Transfer buffer: %p, Transfer DMA: %p\n",
  517. urb->transfer_buffer, (void *)urb->transfer_dma);
  518. DWC_PRINTF(" Setup buffer: %p, Setup DMA: %p\n",
  519. urb->setup_packet, (void *)urb->setup_dma);
  520. DWC_PRINTF(" Interval: %d\n", urb->interval);
  521. if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
  522. int i;
  523. for (i = 0; i < urb->number_of_packets; i++) {
  524. DWC_PRINTF(" ISO Desc %d:\n", i);
  525. DWC_PRINTF(" offset: %d, length %d\n",
  526. urb->iso_frame_desc[i].offset,
  527. urb->iso_frame_desc[i].length);
  528. }
  529. }
  530. }
  531. #endif
  532. /** Starts processing a USB transfer request specified by a USB Request Block
  533. * (URB). mem_flags indicates the type of memory allocation to use while
  534. * processing this URB. */
  535. static int urb_enqueue(struct usb_hcd *hcd,
  536. #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
  537. struct usb_host_endpoint *ep,
  538. #endif
  539. struct urb *urb, gfp_t mem_flags)
  540. {
  541. int retval = 0;
  542. #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,28)
  543. struct usb_host_endpoint *ep = urb->ep;
  544. #endif
  545. dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
  546. dwc_otg_hcd_urb_t *dwc_otg_urb;
  547. int i;
  548. int alloc_bandwidth = 0;
  549. uint8_t ep_type = 0;
  550. uint32_t flags = 0;
  551. void *buf;
  552. #ifdef DEBUG
  553. if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) {
  554. dump_urb_info(urb, "urb_enqueue");
  555. }
  556. #endif
  557. #if 0
  558. retval = usb_hcd_link_urb_to_ep(hcd,urb);
  559. if (unlikely(retval)) {
  560. DWC_ERROR("DWC OTG HCD URB Enqueue failed linking urb. "
  561. "Error status %d\n", retval);
  562. return retval;
  563. }
  564. #endif
  565. if ((usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
  566. || (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) {
  567. if (!dwc_otg_hcd_is_bandwidth_allocated
  568. (dwc_otg_hcd, &ep->hcpriv)) {
  569. alloc_bandwidth = 1;
  570. }
  571. }
  572. switch (usb_pipetype(urb->pipe)) {
  573. case PIPE_CONTROL:
  574. ep_type = USB_ENDPOINT_XFER_CONTROL;
  575. break;
  576. case PIPE_ISOCHRONOUS:
  577. ep_type = USB_ENDPOINT_XFER_ISOC;
  578. break;
  579. case PIPE_BULK:
  580. ep_type = USB_ENDPOINT_XFER_BULK;
  581. break;
  582. case PIPE_INTERRUPT:
  583. ep_type = USB_ENDPOINT_XFER_INT;
  584. break;
  585. default:
  586. DWC_WARN("Wrong ep type\n");
  587. }
  588. dwc_otg_urb = dwc_otg_hcd_urb_alloc(dwc_otg_hcd,
  589. urb->number_of_packets,
  590. mem_flags == GFP_ATOMIC ? 1 : 0);
  591. dwc_otg_hcd_urb_set_pipeinfo(dwc_otg_urb, usb_pipedevice(urb->pipe),
  592. usb_pipeendpoint(urb->pipe), ep_type,
  593. usb_pipein(urb->pipe),
  594. usb_maxpacket(urb->dev, urb->pipe,
  595. !(usb_pipein(urb->pipe))));
  596. buf = urb->transfer_buffer;
  597. if (hcd->self.uses_dma) {
  598. /*
  599. * Calculate virtual address from physical address,
  600. * because some class driver may not fill transfer_buffer.
  601. * In Buffer DMA mode virual address is used,
  602. * when handling non DWORD aligned buffers.
  603. */
  604. buf = phys_to_virt(urb->transfer_dma);
  605. }
  606. if (!(urb->transfer_flags & URB_NO_INTERRUPT))
  607. flags |= URB_GIVEBACK_ASAP;
  608. if (urb->transfer_flags & URB_ZERO_PACKET)
  609. flags |= URB_SEND_ZERO_PACKET;
  610. dwc_otg_hcd_urb_set_params(dwc_otg_urb, urb, buf,
  611. urb->transfer_dma,
  612. urb->transfer_buffer_length,
  613. urb->setup_packet,
  614. urb->setup_dma, flags, urb->interval);
  615. for (i = 0; i < urb->number_of_packets; ++i) {
  616. dwc_otg_hcd_urb_set_iso_desc_params(dwc_otg_urb, i,
  617. urb->
  618. iso_frame_desc[i].offset,
  619. urb->
  620. iso_frame_desc[i].length);
  621. }
  622. urb->hcpriv = dwc_otg_urb;
  623. retval = dwc_otg_hcd_urb_enqueue(dwc_otg_hcd, dwc_otg_urb, &ep->hcpriv,
  624. mem_flags == GFP_ATOMIC ? 1 : 0);
  625. if (!retval) {
  626. if (alloc_bandwidth) {
  627. allocate_bus_bandwidth(hcd,
  628. dwc_otg_hcd_get_ep_bandwidth
  629. (dwc_otg_hcd, ep->hcpriv), urb);
  630. }
  631. } else {
  632. #if 0
  633. usb_hcd_unlink_urb_from_ep(hcd,urb);
  634. #endif
  635. if (retval == -DWC_E_NO_DEVICE) {
  636. retval = -ENODEV;
  637. }
  638. }
  639. return retval;
  640. }
  641. /** Aborts/cancels a USB transfer request. Always returns 0 to indicate
  642. * success. */
  643. #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
  644. static int urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
  645. #else
  646. static int urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  647. #endif
  648. {
  649. int retval = 0;
  650. dwc_irqflags_t flags;
  651. dwc_otg_hcd_t *dwc_otg_hcd;
  652. DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD URB Dequeue\n");
  653. dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
  654. #ifdef DEBUG
  655. if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) {
  656. dump_urb_info(urb, "urb_dequeue");
  657. }
  658. #endif
  659. DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags);
  660. #if 0
  661. retval = usb_hcd_check_unlink_urb(hcd, urb, status);
  662. if(unlikely(retval))
  663. goto EXIT;
  664. #endif
  665. if(urb->hcpriv == NULL){
  666. printk(KERN_ERR "###########urb = %p status=%d\n",urb,status);
  667. goto EXIT;
  668. }
  669. retval = dwc_otg_hcd_urb_dequeue(dwc_otg_hcd, urb->hcpriv);
  670. DWC_FREE(urb->hcpriv);
  671. urb->hcpriv = NULL;
  672. EXIT:
  673. DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, flags);
  674. if(retval) return retval;
  675. /* Higher layer software sets URB status. */
  676. #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28)
  677. usb_hcd_giveback_urb(hcd, urb);
  678. #else
  679. usb_hcd_giveback_urb(hcd, urb, status);
  680. #endif
  681. if (CHK_DEBUG_LEVEL(DBG_HCDV | DBG_HCD_URB)) {
  682. DWC_PRINTF("Called usb_hcd_giveback_urb()\n");
  683. DWC_PRINTF(" urb->status = %d\n", urb->status);
  684. }
  685. return 0;
  686. }
  687. /* Frees resources in the DWC_otg controller related to a given endpoint. Also
  688. * clears state in the HCD related to the endpoint. Any URBs for the endpoint
  689. * must already be dequeued. */
  690. static void endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  691. {
  692. dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
  693. DWC_DEBUGPL(DBG_HCD,
  694. "DWC OTG HCD EP DISABLE: _bEndpointAddress=0x%02x, "
  695. "endpoint=%d\n", ep->desc.bEndpointAddress,
  696. dwc_ep_addr_to_endpoint(ep->desc.bEndpointAddress));
  697. dwc_otg_hcd_endpoint_disable(dwc_otg_hcd, ep->hcpriv, 250);
  698. ep->hcpriv = NULL;
  699. }
  700. #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,30)
  701. /* Resets endpoint specific parameter values, in current version used to reset
  702. * the data toggle(as a WA). This function can be called from usb_clear_halt routine */
  703. static void endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
  704. {
  705. dwc_irqflags_t flags;
  706. struct usb_device *udev = NULL;
  707. int epnum = usb_endpoint_num(&ep->desc);
  708. int is_out = usb_endpoint_dir_out(&ep->desc);
  709. int is_control = usb_endpoint_xfer_control(&ep->desc);
  710. dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
  711. #ifdef LM_INTERFACE
  712. struct lm_device *_dev = dwc_otg_hcd->otg_dev->os_dep.lmdev;
  713. #elif defined(PCI_INTERFACE)
  714. struct pci_dev *_dev = dwc_otg_hcd->otg_dev->os_dep.pcidev;
  715. #endif
  716. if (_dev)
  717. udev = to_usb_device(&_dev->dev);
  718. else
  719. return;
  720. DWC_DEBUGPL(DBG_HCD, "DWC OTG HCD EP RESET: Endpoint Num=0x%02d\n", epnum);
  721. DWC_SPINLOCK_IRQSAVE(dwc_otg_hcd->lock, &flags);
  722. usb_settoggle(udev, epnum, is_out, 0);
  723. if (is_control)
  724. usb_settoggle(udev, epnum, !is_out, 0);
  725. if (ep->hcpriv) {
  726. dwc_otg_hcd_endpoint_reset(dwc_otg_hcd, ep->hcpriv);
  727. }
  728. DWC_SPINUNLOCK_IRQRESTORE(dwc_otg_hcd->lock, flags);
  729. }
  730. #endif
  731. /** Handles host mode interrupts for the DWC_otg controller. Returns IRQ_NONE if
  732. * there was no interrupt to handle. Returns IRQ_HANDLED if there was a valid
  733. * interrupt.
  734. *
  735. * This function is called by the USB core when an interrupt occurs */
  736. static irqreturn_t dwc_otg_hcd_irq(struct usb_hcd *hcd)
  737. {
  738. dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
  739. int32_t retval = dwc_otg_hcd_handle_intr(dwc_otg_hcd);
  740. if (retval != 0) {
  741. S3C2410X_CLEAR_EINTPEND();
  742. }
  743. return IRQ_RETVAL(retval);
  744. }
  745. /** Creates Status Change bitmap for the root hub and root port. The bitmap is
  746. * returned in buf. Bit 0 is the status change indicator for the root hub. Bit 1
  747. * is the status change indicator for the single root port. Returns 1 if either
  748. * change indicator is 1, otherwise returns 0. */
  749. int hub_status_data(struct usb_hcd *hcd, char *buf)
  750. {
  751. dwc_otg_hcd_t *dwc_otg_hcd = hcd_to_dwc_otg_hcd(hcd);
  752. buf[0] = 0;
  753. buf[0] |= (dwc_otg_hcd_is_status_changed(dwc_otg_hcd, 1)) << 1;
  754. return (buf[0] != 0);
  755. }
  756. /** Handles hub class-specific requests. */
  757. int hub_control(struct usb_hcd *hcd,
  758. u16 typeReq, u16 wValue, u16 wIndex, char *buf, u16 wLength)
  759. {
  760. int retval;
  761. retval = dwc_otg_hcd_hub_control(hcd_to_dwc_otg_hcd(hcd),
  762. typeReq, wValue, wIndex, buf, wLength);
  763. switch (retval) {
  764. case -DWC_E_INVALID:
  765. retval = -EINVAL;
  766. break;
  767. }
  768. return retval;
  769. }
  770. #endif /* DWC_DEVICE_ONLY */