vh264.c 49 KB

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  1. /*
  2. * AMLOGIC Audio/Video streaming port driver.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the named License,
  7. * or any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  17. *
  18. * Author: Chen Zhang <chen.zhang@amlogic.com>
  19. *
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/types.h>
  23. #include <linux/errno.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/timer.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/amports/amstream.h>
  28. #include <linux/amports/ptsserv.h>
  29. #include <linux/amports/canvas.h>
  30. #include <linux/amports/vframe.h>
  31. #include <linux/amports/vframe_provider.h>
  32. #include <linux/amports/vframe_receiver.h>
  33. #include <linux/workqueue.h>
  34. #include <linux/dma-mapping.h>
  35. #include <asm/atomic.h>
  36. #include <plat/io.h>
  37. #include <mach/am_regs.h>
  38. #include "vdec_reg.h"
  39. #include "amvdec.h"
  40. #include "vh264_mc.h"
  41. #define DRIVER_NAME "amvdec_h264"
  42. #define MODULE_NAME "amvdec_h264"
  43. #define HANDLE_H264_IRQ
  44. #define DEBUG_PTS
  45. #define DROP_B_FRAME_FOR_1080P_50_60FPS
  46. #ifdef CONFIG_ARCH_MESON6
  47. #define NV21
  48. #endif
  49. static DEFINE_MUTEX(vh264_mutex);
  50. /* 12M for L41 */
  51. #define MAX_DPB_BUFF_SIZE (12*1024*1024)
  52. #define AVIL_DPB_BUFF_SIZE 0x01ec2000
  53. #define DEF_BUF_START_ADDR 0x81000000
  54. #define MEM_HEADER_CPU_BASE (0x81110000 + buf_offset)
  55. #define MEM_DATA_CPU_BASE (0x81111000 + buf_offset)
  56. #define MEM_MMCO_CPU_BASE (0x81112000 + buf_offset)
  57. #define MEM_LIST_CPU_BASE (0x81113000 + buf_offset)
  58. #define MEM_SLICE_CPU_BASE (0x81114000 + buf_offset)
  59. #define MEM_SWAP_SIZE (0x5000*4)
  60. #define V_BUF_ADDR_START 0x8113e000
  61. #define PIC_SINGLE_FRAME 0
  62. #define PIC_TOP_BOT_TOP 1
  63. #define PIC_BOT_TOP_BOT 2
  64. #define PIC_DOUBLE_FRAME 3
  65. #define PIC_TRIPLE_FRAME 4
  66. #define PIC_TOP_BOT 5
  67. #define PIC_BOT_TOP 6
  68. #define PIC_INVALID 7
  69. #define EXTEND_SAR 0xff
  70. #define VF_POOL_SIZE 72
  71. #define VF_BUF_NUM 24
  72. #define PUT_INTERVAL (HZ/100)
  73. #define NO_DISP_WD_COUNT (3 * HZ / PUT_INTERVAL)
  74. #define STAT_TIMER_INIT 0x01
  75. #define STAT_MC_LOAD 0x02
  76. #define STAT_ISR_REG 0x04
  77. #define STAT_VF_HOOK 0x08
  78. #define STAT_TIMER_ARM 0x10
  79. #define STAT_VDEC_RUN 0x20
  80. #define INCPTR(p) ptr_atomic_wrap_inc(&p)
  81. typedef struct {
  82. unsigned int y_addr;
  83. unsigned int u_addr;
  84. unsigned int v_addr;
  85. int y_canvas_index;
  86. int u_canvas_index;
  87. int v_canvas_index;
  88. } buffer_spec_t;
  89. #define spec2canvas(x) \
  90. (((x)->v_canvas_index << 16) | \
  91. ((x)->u_canvas_index << 8) | \
  92. ((x)->y_canvas_index << 0))
  93. static vframe_t *vh264_vf_peek(void*);
  94. static vframe_t *vh264_vf_get(void*);
  95. static void vh264_vf_put(vframe_t *, void*);
  96. static int vh264_vf_states(vframe_states_t *states, void*);
  97. static int vh264_event_cb(int type, void *data, void *private_data);
  98. static void vh264_prot_init(void);
  99. static void vh264_local_init(void);
  100. static void vh264_put_timer_func(unsigned long arg);
  101. static void stream_switching_done(void);
  102. static const char vh264_dec_id[] = "vh264-dev";
  103. #define PROVIDER_NAME "decoder.h264"
  104. static const struct vframe_operations_s vh264_vf_provider = {
  105. .peek = vh264_vf_peek,
  106. .get = vh264_vf_get,
  107. .put = vh264_vf_put,
  108. .event_cb = vh264_event_cb,
  109. .vf_states = vh264_vf_states,
  110. };
  111. static struct vframe_provider_s vh264_vf_prov;
  112. static u32 frame_buffer_size;
  113. static u32 frame_width, frame_height, frame_dur, frame_prog;
  114. static u32 last_mb_width, last_mb_height;
  115. static struct vframe_s vfpool[VF_POOL_SIZE];
  116. static u32 vfpool_idx[VF_POOL_SIZE];
  117. static s32 vfbuf_use[VF_BUF_NUM];
  118. static s32 fill_ptr, get_ptr, putting_ptr, put_ptr;
  119. static unsigned char buffer_for_recycle[VF_BUF_NUM];
  120. static int buffer_for_recycle_rd, buffer_for_recycle_wr;
  121. static buffer_spec_t buffer_spec[VF_BUF_NUM];
  122. static struct timer_list recycle_timer;
  123. static u32 stat;
  124. static u32 buf_start, buf_size;
  125. static s32 buf_offset;
  126. static u32 pts_outside = 0;
  127. static u32 sync_outside = 0;
  128. static u32 vh264_ratio;
  129. static u32 vh264_rotation;
  130. static u32 seq_info;
  131. static u32 aspect_ratio_info;
  132. static u32 num_units_in_tick;
  133. static u32 time_scale;
  134. static u32 h264_ar;
  135. #ifdef DROP_B_FRAME_FOR_1080P_50_60FPS
  136. static u32 last_interlaced;
  137. #endif
  138. static u8 neg_poc_counter;
  139. static unsigned char h264_first_pts_ready;
  140. static u32 h264pts1, h264pts2;
  141. static u32 h264_pts_count, duration_from_pts_done;
  142. static u32 vh264_error_count;
  143. static u32 vh264_no_disp_count;
  144. #if 0
  145. static u32 vh264_no_disp_wd_count;
  146. #endif
  147. static u32 vh264_running;
  148. static s32 vh264_stream_switching;
  149. static struct vframe_s *p_last_vf;
  150. static s32 last_ptr;
  151. static u32 wait_buffer_counter;
  152. static uint error_recovery_mode = 2;
  153. static uint mb_total = 0, mb_width = 0, mb_height=0;
  154. #ifdef DEBUG_PTS
  155. static unsigned long pts_missed, pts_hit;
  156. #endif
  157. static atomic_t vh264_active = ATOMIC_INIT(0);
  158. static struct work_struct error_wd_work;
  159. static struct work_struct stream_switching_work;
  160. static struct dec_sysinfo vh264_amstream_dec_info;
  161. extern u32 trickmode_i;
  162. static DEFINE_SPINLOCK(lock);
  163. static int vh264_stop(void);
  164. static s32 vh264_init(void);
  165. void spec_set_canvas(buffer_spec_t *spec,
  166. unsigned width,
  167. unsigned height)
  168. {
  169. #ifdef NV21
  170. canvas_config(spec->y_canvas_index,
  171. spec->y_addr,
  172. width,
  173. height,
  174. CANVAS_ADDR_NOWRAP,
  175. CANVAS_BLKMODE_32X32);
  176. canvas_config(spec->u_canvas_index,
  177. spec->u_addr,
  178. width,
  179. height / 2,
  180. CANVAS_ADDR_NOWRAP,
  181. CANVAS_BLKMODE_32X32);
  182. #else
  183. canvas_config(spec->y_canvas_index,
  184. spec->y_addr,
  185. width,
  186. height,
  187. CANVAS_ADDR_NOWRAP,
  188. CANVAS_BLKMODE_32X32);
  189. canvas_config(spec->u_canvas_index,
  190. spec->u_addr,
  191. width / 2,
  192. height / 2,
  193. CANVAS_ADDR_NOWRAP,
  194. CANVAS_BLKMODE_32X32);
  195. canvas_config(spec->v_canvas_index,
  196. spec->v_addr,
  197. width / 2,
  198. height / 2,
  199. CANVAS_ADDR_NOWRAP,
  200. CANVAS_BLKMODE_32X32);
  201. #endif
  202. return;
  203. }
  204. static inline void ptr_atomic_wrap_inc(u32 *ptr)
  205. {
  206. u32 i = *ptr;
  207. i++;
  208. if (i >= VF_POOL_SIZE) {
  209. i = 0;
  210. }
  211. *ptr = i;
  212. }
  213. static vframe_t *vh264_vf_peek(void* op_arg)
  214. {
  215. if (get_ptr == fill_ptr) {
  216. return NULL;
  217. }
  218. return &vfpool[get_ptr];
  219. }
  220. static vframe_t *vh264_vf_get(void* op_arg)
  221. {
  222. vframe_t *vf;
  223. if (get_ptr == fill_ptr) {
  224. return NULL;
  225. }
  226. vf = &vfpool[get_ptr];
  227. if (vfpool_idx[get_ptr] == -1) {
  228. if (!vh264_stream_switching) {
  229. while (vfpool_idx[get_ptr] == -1) {
  230. /* discard the switching frame */
  231. INCPTR(get_ptr);
  232. if (likely(get_ptr == fill_ptr))
  233. return NULL;
  234. }
  235. vf = &vfpool[get_ptr];
  236. }
  237. }
  238. INCPTR(get_ptr);
  239. return vf;
  240. }
  241. static void vh264_vf_put(vframe_t *vf, void* op_arg)
  242. {
  243. INCPTR(putting_ptr);
  244. }
  245. static int vh264_event_cb(int type, void *data, void *private_data)
  246. {
  247. if(type & VFRAME_EVENT_RECEIVER_RESET){
  248. unsigned long flags;
  249. amvdec_stop();
  250. #ifndef CONFIG_POST_PROCESS_MANAGER
  251. vf_light_unreg_provider(&vh264_vf_provider);
  252. #endif
  253. spin_lock_irqsave(&lock, flags);
  254. vh264_local_init();
  255. vh264_prot_init();
  256. spin_unlock_irqrestore(&lock, flags);
  257. #ifndef CONFIG_POST_PROCESS_MANAGER
  258. vf_reg_provider(&vh264_vf_provider);
  259. #endif
  260. amvdec_start();
  261. }
  262. return 0;
  263. }
  264. static int vh264_vf_states(vframe_states_t *states, void* op_arg)
  265. {
  266. unsigned long flags;
  267. int i;
  268. spin_lock_irqsave(&lock, flags);
  269. states->vf_pool_size = VF_POOL_SIZE;
  270. i = put_ptr - fill_ptr;
  271. if (i < 0) i += VF_POOL_SIZE;
  272. states->buf_free_num = i;
  273. i = putting_ptr - put_ptr;
  274. if (i < 0) i += VF_POOL_SIZE;
  275. states->buf_recycle_num = i;
  276. i = fill_ptr - get_ptr;
  277. if (i < 0) i += VF_POOL_SIZE;
  278. states->buf_avail_num = i;
  279. spin_unlock_irqrestore(&lock, flags);
  280. return 0;
  281. }
  282. static void set_frame_info(vframe_t *vf)
  283. {
  284. vf->width = frame_width;
  285. vf->height = frame_height;
  286. vf->duration = frame_dur;
  287. vf->ratio_control = (min(h264_ar, (u32)DISP_RATIO_ASPECT_RATIO_MAX)) << DISP_RATIO_ASPECT_RATIO_BIT;
  288. vf->orientation = vh264_rotation;
  289. return;
  290. }
  291. #ifdef CONFIG_POST_PROCESS_MANAGER
  292. static void vh264_ppmgr_reset(void)
  293. {
  294. vf_notify_receiver(PROVIDER_NAME,VFRAME_EVENT_PROVIDER_RESET,NULL);
  295. vh264_local_init();
  296. //vf_notify_receiver(PROVIDER_NAME,VFRAME_EVENT_PROVIDER_START,NULL);
  297. printk("vh264dec: vf_ppmgr_reset\n");
  298. }
  299. #endif
  300. #ifdef HANDLE_H264_IRQ
  301. static irqreturn_t vh264_isr(int irq, void *dev_id)
  302. #else
  303. static void vh264_isr(void)
  304. #endif
  305. {
  306. unsigned int buffer_index;
  307. vframe_t *vf;
  308. unsigned int cpu_cmd;
  309. unsigned int pts, pts_valid = 0, pts_duration = 0;
  310. WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
  311. if (0 == (stat & STAT_VDEC_RUN)) {
  312. printk("decoder is not running\n");
  313. #ifdef HANDLE_H264_IRQ
  314. return IRQ_HANDLED;
  315. #else
  316. return;
  317. #endif
  318. }
  319. cpu_cmd = READ_VREG(AV_SCRATCH_0);
  320. #ifdef DROP_B_FRAME_FOR_1080P_50_60FPS
  321. if((frame_dur < 2000) &&
  322. (frame_width >= 1400) &&
  323. (frame_height >= 1000) &&
  324. (last_interlaced == 0)) {
  325. SET_VREG_MASK(AV_SCRATCH_F, 0x8);
  326. }
  327. #endif
  328. if ((cpu_cmd & 0xff) == 1) {
  329. int timing_info_present_flag, aspect_ratio_info_present_flag, aspect_ratio_idc;
  330. int max_dpb_size, actual_dpb_size, max_reference_size;
  331. int i, mb_mv_byte;
  332. unsigned addr;
  333. unsigned int post_canvas;
  334. if (vh264_running) {
  335. #ifdef CONFIG_POST_PROCESS_MANAGER
  336. vh264_ppmgr_reset();
  337. #else
  338. vf_light_unreg_provider(&vh264_vf_prov);
  339. vh264_local_init();
  340. vf_reg_provider(&vh264_vf_prov);
  341. #endif
  342. WRITE_VREG(AV_SCRATCH_7, 0);
  343. WRITE_VREG(AV_SCRATCH_8, 0);
  344. WRITE_VREG(AV_SCRATCH_9, 0);
  345. vh264_running = 0;
  346. }
  347. h264_first_pts_ready = 0;
  348. buffer_for_recycle_rd = 0;
  349. buffer_for_recycle_wr = 0;
  350. post_canvas = get_post_canvas();
  351. mb_width = READ_VREG(AV_SCRATCH_1);
  352. seq_info = READ_VREG(AV_SCRATCH_2);
  353. aspect_ratio_info = READ_VREG(AV_SCRATCH_3);
  354. num_units_in_tick = READ_VREG(AV_SCRATCH_4);
  355. time_scale = READ_VREG(AV_SCRATCH_5);
  356. mb_total = (mb_width >> 8) & 0xffff;
  357. max_reference_size = (mb_width >> 24) & 0x7f;
  358. mb_mv_byte = (mb_width & 0x80000000) ? 24 : 96;
  359. mb_width = mb_width & 0xff;
  360. mb_height = mb_total / mb_width;
  361. /* if width or height from outside is not equal to mb, then use mb */
  362. if (last_mb_width && (last_mb_width != mb_width)) {
  363. frame_width = 0;
  364. }
  365. if (last_mb_height && (last_mb_height != mb_height)) {
  366. frame_height = 0;
  367. }
  368. last_mb_width = mb_width;
  369. last_mb_height = mb_height;
  370. if (frame_width == 0 || frame_height == 0) {
  371. frame_width = mb_width << 4;
  372. frame_height = mb_height << 4;
  373. if (frame_height == 1088) {
  374. frame_height = 1080;
  375. }
  376. }
  377. mb_width = (mb_width + 3) & 0xfffffffc;
  378. mb_height = (mb_height + 3) & 0xfffffffc;
  379. mb_total = mb_width * mb_height;
  380. max_dpb_size = (frame_buffer_size - mb_total * 384 * 4 - mb_total * mb_mv_byte) / (mb_total * 384 + mb_total * mb_mv_byte);
  381. if (max_reference_size <= max_dpb_size) {
  382. max_dpb_size = MAX_DPB_BUFF_SIZE / (mb_total * 384);
  383. if (max_dpb_size > 16) {
  384. max_dpb_size = 16;
  385. }
  386. if (max_reference_size < max_dpb_size) {
  387. max_reference_size = max_dpb_size + 1;
  388. } else {
  389. max_dpb_size = max_reference_size;
  390. max_reference_size++;
  391. }
  392. } else {
  393. max_dpb_size = max_reference_size;
  394. max_reference_size++;
  395. }
  396. if (mb_total * 384 * (max_dpb_size + 3) + mb_total * mb_mv_byte * max_reference_size > frame_buffer_size) {
  397. max_dpb_size = (frame_buffer_size - mb_total * 384 * 3 - mb_total * mb_mv_byte) / (mb_total * 384 + mb_total * mb_mv_byte);
  398. max_reference_size = max_dpb_size + 1;
  399. }
  400. actual_dpb_size = (frame_buffer_size - mb_total * mb_mv_byte * max_reference_size) / (mb_total * 384);
  401. if (actual_dpb_size > 24) {
  402. actual_dpb_size = 24;
  403. }
  404. if (max_dpb_size > 5) {
  405. if (actual_dpb_size < max_dpb_size + 3) {
  406. actual_dpb_size = max_dpb_size + 3;
  407. max_reference_size = (frame_buffer_size - mb_total * 384 * actual_dpb_size) / (mb_total * mb_mv_byte);
  408. }
  409. } else {
  410. if (actual_dpb_size < max_dpb_size + 4) {
  411. actual_dpb_size = max_dpb_size + 4;
  412. max_reference_size = (frame_buffer_size - mb_total * 384 * actual_dpb_size) / (mb_total * mb_mv_byte);
  413. }
  414. }
  415. if (!(READ_VREG(AV_SCRATCH_F) & 0x1)) {
  416. addr = buf_start;
  417. if (actual_dpb_size <= 21) {
  418. for (i = 0 ; i < actual_dpb_size ; i++) {
  419. buffer_spec[i].y_addr = addr;
  420. addr += mb_total << 8;
  421. #ifdef NV21
  422. buffer_spec[i].u_addr = addr;
  423. buffer_spec[i].v_addr = addr;
  424. addr += mb_total << 7;
  425. #else
  426. buffer_spec[i].u_addr = addr;
  427. addr += mb_total << 6;
  428. buffer_spec[i].v_addr = addr;
  429. addr += mb_total << 6;
  430. #endif
  431. vfbuf_use[i] = 0;
  432. #ifdef NV21
  433. buffer_spec[i].y_canvas_index = 128 + i * 2;
  434. buffer_spec[i].u_canvas_index = 128 + i * 2 + 1;
  435. buffer_spec[i].v_canvas_index = 128 + i * 2 + 1;
  436. canvas_config(128 + i * 2, buffer_spec[i].y_addr, mb_width << 4, mb_height << 4,
  437. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  438. canvas_config(128 + i * 2 + 1, buffer_spec[i].u_addr, mb_width << 4, mb_height << 3,
  439. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  440. WRITE_VREG(ANC0_CANVAS_ADDR + i, spec2canvas(&buffer_spec[i]));
  441. #else
  442. buffer_spec[i].y_canvas_index = 128 + i * 3;
  443. buffer_spec[i].u_canvas_index = 128 + i * 3 + 1;
  444. buffer_spec[i].v_canvas_index = 128 + i * 3 + 2;
  445. canvas_config(128 + i * 3, buffer_spec[i].y_addr, mb_width << 4, mb_height << 4,
  446. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  447. canvas_config(128 + i * 3 + 1, buffer_spec[i].u_addr, mb_width << 3, mb_height << 3,
  448. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  449. canvas_config(128 + i * 3 + 2, buffer_spec[i].v_addr, mb_width << 3, mb_height << 3,
  450. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  451. WRITE_VREG(ANC0_CANVAS_ADDR + i, spec2canvas(&buffer_spec[i]));
  452. #endif
  453. }
  454. } else {
  455. for (i = 0 ; i < 21 ; i++) {
  456. #ifdef NV21
  457. buffer_spec[i].y_addr = addr;
  458. addr += mb_total << 8;
  459. buffer_spec[i].u_addr = addr;
  460. buffer_spec[i].v_addr = addr;
  461. addr += mb_total << 7;
  462. vfbuf_use[i] = 0;
  463. buffer_spec[i].y_canvas_index = 128 + i * 2;
  464. buffer_spec[i].u_canvas_index = 128 + i * 2 + 1;
  465. buffer_spec[i].v_canvas_index = 128 + i * 2 + 1;
  466. canvas_config(128 + i * 2, buffer_spec[i].y_addr, mb_width << 4, mb_height << 4,
  467. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  468. canvas_config(128 + i * 2 + 1, buffer_spec[i].u_addr, mb_width << 4, mb_height << 3,
  469. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  470. WRITE_VREG(ANC0_CANVAS_ADDR + i, spec2canvas(&buffer_spec[i]));
  471. #else
  472. buffer_spec[i].y_addr = addr;
  473. addr += mb_total << 8;
  474. buffer_spec[i].u_addr = addr;
  475. addr += mb_total << 6;
  476. buffer_spec[i].v_addr = addr;
  477. addr += mb_total << 6;
  478. vfbuf_use[i] = 0;
  479. buffer_spec[i].y_canvas_index = 128 + i * 3;
  480. buffer_spec[i].u_canvas_index = 128 + i * 3 + 1;
  481. buffer_spec[i].v_canvas_index = 128 + i * 3 + 2;
  482. canvas_config(128 + i * 3, buffer_spec[i].y_addr, mb_width << 4, mb_height << 4,
  483. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  484. canvas_config(128 + i * 3 + 1, buffer_spec[i].u_addr, mb_width << 3, mb_height << 3,
  485. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  486. canvas_config(128 + i * 3 + 2, buffer_spec[i].v_addr, mb_width << 3, mb_height << 3,
  487. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  488. WRITE_VREG(ANC0_CANVAS_ADDR + i, spec2canvas(&buffer_spec[i]));
  489. #endif
  490. }
  491. for (i = 21 ; i < actual_dpb_size ; i++) {
  492. #ifdef NV21
  493. buffer_spec[i].y_canvas_index = 2 * (i - 21) + 0;
  494. buffer_spec[i].y_addr = addr;
  495. addr += mb_total << 8;
  496. buffer_spec[i].u_canvas_index = 2 * (i - 21) + 1;
  497. buffer_spec[i].v_canvas_index = 2 * (i - 21) + 1;
  498. buffer_spec[i].u_addr = addr;
  499. addr += mb_total << 7;
  500. vfbuf_use[i] = 0;
  501. spec_set_canvas(&buffer_spec[i], mb_width << 4, mb_height << 4);
  502. WRITE_VREG(ANC0_CANVAS_ADDR + i, spec2canvas(&buffer_spec[i]));
  503. #else
  504. buffer_spec[i].y_canvas_index = 3 * (i - 21) + 3;
  505. buffer_spec[i].y_addr = addr;
  506. addr += mb_total << 8;
  507. buffer_spec[i].u_canvas_index = 3 * (i - 21) + 4;
  508. buffer_spec[i].u_addr = addr;
  509. addr += mb_total << 6;
  510. buffer_spec[i].v_canvas_index = 3 * (i - 21) + 5;
  511. buffer_spec[i].v_addr = addr;
  512. addr += mb_total << 6;
  513. vfbuf_use[i] = 0;
  514. spec_set_canvas(&buffer_spec[i], mb_width << 4, mb_height << 4);
  515. WRITE_VREG(ANC0_CANVAS_ADDR + i, spec2canvas(&buffer_spec[i]));
  516. #endif
  517. }
  518. }
  519. } else {
  520. addr = buf_start + mb_total * 384 * actual_dpb_size;
  521. }
  522. timing_info_present_flag = seq_info & 0x2;
  523. aspect_ratio_info_present_flag = seq_info & 0x1;
  524. aspect_ratio_idc = (seq_info >> 16) & 0xff;
  525. if (timing_info_present_flag) {
  526. if ((num_units_in_tick * 120) >= time_scale && (!sync_outside)) {
  527. frame_dur = div_u64(96000ULL * 2 * num_units_in_tick, time_scale);
  528. }
  529. }
  530. if (aspect_ratio_info_present_flag) {
  531. if (aspect_ratio_idc == EXTEND_SAR) {
  532. printk("v264dec: aspect_ratio_idc = EXTEND_SAR, aspect_ratio_info = 0x%x\n", aspect_ratio_info);
  533. h264_ar = 0x100 * (aspect_ratio_info >> 16) * frame_height / ((aspect_ratio_info & 0xffff) * frame_width);
  534. } else {
  535. printk("v264dec: aspect_ratio_idc = %d\n", aspect_ratio_idc);
  536. switch (aspect_ratio_idc) {
  537. case 1:
  538. h264_ar = 0x100 * frame_height / frame_width;
  539. break;
  540. case 2:
  541. h264_ar = 0x100 * frame_height * 11 / (frame_width * 12);
  542. break;
  543. case 3:
  544. h264_ar = 0x100 * frame_height * 11 / (frame_width * 10);
  545. break;
  546. case 4:
  547. h264_ar = 0x100 * frame_height * 11 / (frame_width * 16);
  548. break;
  549. case 5:
  550. h264_ar = 0x100 * frame_height * 33 / (frame_width * 40);
  551. break;
  552. case 6:
  553. h264_ar = 0x100 * frame_height * 11 / (frame_width * 24);
  554. break;
  555. case 7:
  556. h264_ar = 0x100 * frame_height * 11 / (frame_width * 20);
  557. break;
  558. case 8:
  559. h264_ar = 0x100 * frame_height * 11 / (frame_width * 32);
  560. break;
  561. case 9:
  562. h264_ar = 0x100 * frame_height * 33 / (frame_width * 80);
  563. break;
  564. case 10:
  565. h264_ar = 0x100 * frame_height * 11 / (frame_width * 18);
  566. break;
  567. case 11:
  568. h264_ar = 0x100 * frame_height * 11 / (frame_width * 15);
  569. break;
  570. case 12:
  571. h264_ar = 0x100 * frame_height * 33 / (frame_width * 64);
  572. break;
  573. case 13:
  574. h264_ar = 0x100 * frame_height * 99 / (frame_width * 160);
  575. break;
  576. case 14:
  577. h264_ar = 0x100 * frame_height * 3 / (frame_width * 4);
  578. break;
  579. case 15:
  580. h264_ar = 0x100 * frame_height * 2 / (frame_width * 3);
  581. break;
  582. case 16:
  583. h264_ar = 0x100 * frame_height * 1 / (frame_width * 2);
  584. break;
  585. default:
  586. if (vh264_ratio>>16) {
  587. h264_ar = (frame_height * (vh264_ratio&0xffff) *0x100 + ((vh264_ratio>>16) * frame_width/2))/((vh264_ratio>>16) * frame_width);
  588. } else {
  589. h264_ar = frame_height * 0x100 / frame_width;
  590. }
  591. break;
  592. }
  593. }
  594. } else {
  595. printk("v264dec: aspect_ratio not available from source\n");
  596. if (vh264_ratio>>16) {
  597. /* high 16 bit is width, low 16 bit is height */
  598. h264_ar = ((vh264_ratio&0xffff) * frame_height* 0x100 + (vh264_ratio>>16)*frame_width/2) /( (vh264_ratio>>16) * frame_width);
  599. } else {
  600. h264_ar = frame_height * 0x100 / frame_width;
  601. }
  602. }
  603. WRITE_VREG(AV_SCRATCH_1, addr);
  604. //WRITE_VREG(AV_SCRATCH_2, (unsigned)vpts_map);
  605. WRITE_VREG(AV_SCRATCH_3, post_canvas); // should be modified later
  606. addr += mb_total * mb_mv_byte * max_reference_size;
  607. WRITE_VREG(AV_SCRATCH_4, addr);
  608. WRITE_VREG(AV_SCRATCH_0, (max_reference_size << 24) | (actual_dpb_size << 16) | (max_dpb_size << 8));
  609. } else if ((cpu_cmd & 0xff) == 2) {
  610. int frame_mb_only, pic_struct_present, pic_struct, prog_frame, poc_sel, idr_flag, neg_poc;
  611. int i, status, num_frame, b_offset;
  612. int current_error_count;
  613. vh264_running = 1;
  614. vh264_no_disp_count = 0;
  615. num_frame = (cpu_cmd >> 8) & 0xff;
  616. frame_mb_only = seq_info & 0x8000;
  617. pic_struct_present = seq_info & 0x10;
  618. current_error_count = READ_VREG(AV_SCRATCH_D);
  619. if (vh264_error_count != current_error_count) {
  620. //printk("decoder error happened, count %d\n", current_error_count);
  621. vh264_error_count = current_error_count;
  622. }
  623. for (i = 0 ; i < num_frame ; i++) {
  624. status = READ_VREG(AV_SCRATCH_1 + i);
  625. buffer_index = status & 0x1f;
  626. if ((p_last_vf != NULL) && (vfpool_idx[last_ptr] == buffer_index)) {
  627. continue;
  628. }
  629. if (buffer_index >= VF_BUF_NUM) {
  630. buffer_for_recycle[buffer_for_recycle_wr++] = vfpool_idx[put_ptr] + 1;
  631. if (buffer_for_recycle_wr == VF_BUF_NUM) {
  632. buffer_for_recycle_wr = 0;
  633. }
  634. continue;
  635. }
  636. pic_struct = (status >> 5) & 0x7;
  637. prog_frame = status & 0x100;
  638. poc_sel = status & 0x200;
  639. idr_flag = status & 0x400;
  640. neg_poc = status & 0x800;
  641. b_offset = (status >> 16) & 0xffff;
  642. #ifdef DROP_B_FRAME_FOR_1080P_50_60FPS
  643. last_interlaced = prog_frame ? 0 : 1;
  644. #endif
  645. vf = &vfpool[fill_ptr];
  646. vfpool_idx[fill_ptr] = buffer_index;
  647. vf->ratio_control = 0;
  648. set_frame_info(vf);
  649. switch (i) {
  650. case 0:
  651. b_offset |= (READ_VREG(AV_SCRATCH_A) & 0xffff) << 16;
  652. break;
  653. case 1:
  654. b_offset |= READ_VREG(AV_SCRATCH_A) & 0xffff0000;
  655. break;
  656. case 2:
  657. b_offset |= (READ_VREG(AV_SCRATCH_B) & 0xffff) << 16;
  658. break;
  659. case 3:
  660. b_offset |= READ_VREG(AV_SCRATCH_B) & 0xffff0000;
  661. break;
  662. case 4:
  663. b_offset |= (READ_VREG(AV_SCRATCH_C) & 0xffff) << 16;
  664. break;
  665. case 5:
  666. b_offset |= READ_VREG(AV_SCRATCH_C) & 0xffff0000;
  667. break;
  668. default:
  669. break;
  670. }
  671. if (pts_lookup_offset(PTS_TYPE_VIDEO, b_offset, &pts, 0) == 0) {
  672. pts_valid = 1;
  673. #ifdef DEBUG_PTS
  674. pts_hit++;
  675. #endif
  676. } else {
  677. pts_valid = 0;
  678. #ifdef DEBUG_PTS
  679. pts_missed++;
  680. #endif
  681. }
  682. if (sync_outside == 0) {
  683. if (h264_first_pts_ready == 0) {
  684. if (pts_valid == 0) {
  685. buffer_for_recycle[buffer_for_recycle_wr++] = vfpool_idx[put_ptr] + 1;
  686. if (buffer_for_recycle_wr == VF_BUF_NUM) {
  687. buffer_for_recycle_wr = 0;
  688. }
  689. continue;
  690. }
  691. h264pts1 = pts;
  692. h264_pts_count = 0;
  693. h264_first_pts_ready = 1;
  694. } else {
  695. if (pts_valid && (pts > h264pts1)) {
  696. if (duration_from_pts_done == 0) {
  697. h264pts2 = pts;
  698. pts_duration = ((h264pts2 - h264pts1) / h264_pts_count) * 16 / 15;
  699. duration_from_pts_done = 1;
  700. if ((pts_duration != frame_dur) && (!pts_outside)) {
  701. frame_dur = pts_duration;
  702. }
  703. }
  704. }
  705. }
  706. h264_pts_count++;
  707. } else {
  708. if (idr_flag && pts_valid) {
  709. pts += neg_poc_counter * (frame_dur - (frame_dur >> 4));
  710. } else {
  711. pts = 0;
  712. }
  713. if (neg_poc) {
  714. neg_poc_counter++;
  715. } else {
  716. neg_poc_counter = 0;
  717. }
  718. }
  719. if (frame_mb_only || prog_frame || (pic_struct_present && pic_struct <= PIC_TRIPLE_FRAME)) {
  720. if (pic_struct_present) {
  721. if (pic_struct == PIC_TOP_BOT_TOP || pic_struct == PIC_BOT_TOP_BOT) {
  722. vf->duration += vf->duration >> 1;
  723. } else if (pic_struct == PIC_DOUBLE_FRAME) {
  724. vf->duration += vf->duration;
  725. } else if (pic_struct == PIC_TRIPLE_FRAME) {
  726. vf->duration += vf->duration << 1;
  727. }
  728. }
  729. #ifdef NV21
  730. vf->type = VIDTYPE_PROGRESSIVE | VIDTYPE_VIU_FIELD | VIDTYPE_VIU_NV21;
  731. #else
  732. vf->type = VIDTYPE_PROGRESSIVE | VIDTYPE_VIU_FIELD;
  733. #endif
  734. vf->duration_pulldown = 0;
  735. vf->pts = (pts_valid) ? pts : 0;
  736. vf->canvas0Addr = vf->canvas1Addr = spec2canvas(&buffer_spec[buffer_index]);
  737. vfbuf_use[buffer_index]++;
  738. p_last_vf = vf;
  739. last_ptr = fill_ptr;
  740. INCPTR(fill_ptr);
  741. vf_notify_receiver(PROVIDER_NAME,VFRAME_EVENT_PROVIDER_VFRAME_READY,NULL);
  742. } else {
  743. if (pic_struct_present && pic_struct == PIC_TOP_BOT) {
  744. vf->type = VIDTYPE_INTERLACE_TOP;
  745. } else if (pic_struct_present && pic_struct == PIC_BOT_TOP) {
  746. vf->type = VIDTYPE_INTERLACE_BOTTOM;
  747. } else {
  748. vf->type = poc_sel ? VIDTYPE_INTERLACE_BOTTOM : VIDTYPE_INTERLACE_TOP;
  749. }
  750. #ifdef NV21
  751. vf->type |= VIDTYPE_VIU_NV21;
  752. #endif
  753. vf->type |= VIDTYPE_INTERLACE_FIRST;
  754. vf->duration >>= 1;
  755. vf->duration_pulldown = 0;
  756. vf->pts = (pts_valid) ? pts : 0;
  757. vf->canvas0Addr = vf->canvas1Addr = spec2canvas(&buffer_spec[buffer_index]);
  758. vfbuf_use[buffer_index]++;
  759. INCPTR(fill_ptr);
  760. vf = &vfpool[fill_ptr];
  761. vfpool_idx[fill_ptr] = buffer_index;
  762. vf->ratio_control = 0;
  763. set_frame_info(vf);
  764. if (pic_struct_present && pic_struct == PIC_TOP_BOT) {
  765. vf->type = VIDTYPE_INTERLACE_BOTTOM;
  766. } else if (pic_struct_present && pic_struct == PIC_BOT_TOP) {
  767. vf->type = VIDTYPE_INTERLACE_TOP;
  768. } else {
  769. vf->type = poc_sel ? VIDTYPE_INTERLACE_TOP : VIDTYPE_INTERLACE_BOTTOM;
  770. }
  771. #ifdef NV21
  772. vf->type |= VIDTYPE_VIU_NV21;
  773. #endif
  774. vf->duration >>= 1;
  775. vf->duration_pulldown = 0;
  776. vf->pts = 0;
  777. vf->canvas0Addr = vf->canvas1Addr = spec2canvas(&buffer_spec[buffer_index]);
  778. vfbuf_use[buffer_index]++;
  779. p_last_vf = vf;
  780. last_ptr = fill_ptr;
  781. INCPTR(fill_ptr);
  782. vf_notify_receiver(PROVIDER_NAME,VFRAME_EVENT_PROVIDER_VFRAME_READY,NULL);
  783. }
  784. }
  785. WRITE_VREG(AV_SCRATCH_0, 0);
  786. } else if ((cpu_cmd & 0xff) == 3) {
  787. int i;
  788. vh264_running = 1;
  789. // schedule stream switching delay work
  790. for (i = 0; i <VF_BUF_NUM; i++) {
  791. if (vfbuf_use[i]) {
  792. vh264_stream_switching = 1;
  793. schedule_work(&stream_switching_work);
  794. break;
  795. }
  796. }
  797. //do not clear AV_SCRATCH_0 to make ucode pending on finish of the command
  798. //until stream_switching_done is called.
  799. //WRITE_MPEG_REG(AV_SCRATCH_0, 0);
  800. } else if ((cpu_cmd & 0xff) == 4) {
  801. vh264_running = 1;
  802. // reserved for slice group
  803. WRITE_VREG(AV_SCRATCH_0, 0);
  804. } else if ((cpu_cmd & 0xff) == 5) {
  805. vh264_running = 1;
  806. // reserved for slice group
  807. WRITE_VREG(AV_SCRATCH_0, 0);
  808. } else if ((cpu_cmd & 0xff) == 6) {
  809. vh264_running = 0;
  810. // this is fatal error, need restart
  811. printk("fatal error happend\n");
  812. schedule_work(&error_wd_work);
  813. }
  814. #ifdef HANDLE_H264_IRQ
  815. return IRQ_HANDLED;
  816. #else
  817. return;
  818. #endif
  819. }
  820. static void vh264_put_timer_func(unsigned long arg)
  821. {
  822. struct timer_list *timer = (struct timer_list *)arg;
  823. unsigned int wait_buffer_status;
  824. unsigned int wait_i_pass_frames;
  825. unsigned int reg_val;
  826. receviver_start_e state = RECEIVER_INACTIVE ;
  827. if (vf_get_receiver(PROVIDER_NAME)){
  828. state = vf_notify_receiver(PROVIDER_NAME,VFRAME_EVENT_PROVIDER_QUREY_STATE,NULL);
  829. if((state == RECEIVER_STATE_NULL)||(state == RECEIVER_STATE_NONE)){
  830. /* receiver has no event_cb or receiver's event_cb does not process this event */
  831. state = RECEIVER_INACTIVE ;
  832. }
  833. }else{
  834. state = RECEIVER_INACTIVE ;
  835. }
  836. #ifndef HANDLE_H264_IRQ
  837. vh264_isr();
  838. #endif
  839. reg_val = READ_VREG(AV_SCRATCH_9);
  840. wait_buffer_status = reg_val & (1 << 31);
  841. wait_i_pass_frames = reg_val & 0xff;
  842. if (wait_buffer_status) {
  843. if ((get_ptr == fill_ptr)
  844. && (putting_ptr == put_ptr)
  845. && (buffer_for_recycle_rd == buffer_for_recycle_wr)
  846. &&(state == RECEIVER_INACTIVE)) {
  847. printk("$$$$$$decoder is waiting for buffer\n");
  848. if (++wait_buffer_counter > 2) {
  849. amvdec_stop();
  850. #ifdef CONFIG_POST_PROCESS_MANAGER
  851. vh264_ppmgr_reset();
  852. #else
  853. vf_light_unreg_provider(&vh264_vf_prov);
  854. vh264_local_init();
  855. vf_reg_provider(&vh264_vf_prov);
  856. #endif
  857. vh264_prot_init();
  858. amvdec_start();
  859. }
  860. }
  861. } else if (wait_i_pass_frames > 10) {
  862. printk("i passed frames > 10\n");
  863. amvdec_stop();
  864. #ifdef CONFIG_POST_PROCESS_MANAGER
  865. vh264_ppmgr_reset();
  866. #else
  867. vf_light_unreg_provider(&vh264_vf_prov);
  868. vh264_local_init();
  869. vf_reg_provider(&vh264_vf_prov);
  870. #endif
  871. vh264_prot_init();
  872. amvdec_start();
  873. }
  874. #if 0
  875. if (!wait_buffer_status) {
  876. if (vh264_no_disp_count++ > NO_DISP_WD_COUNT) {
  877. printk("$$$decoder did not send frame out\n");
  878. amvdec_stop();
  879. #ifdef CONFIG_POST_PROCESS_MANAGER
  880. vh264_ppmgr_reset();
  881. #else
  882. vf_light_unreg_provider(PROVIDER_NAME);
  883. vh264_local_init();
  884. vf_reg_provider(vh264_vf_prov);
  885. #endif
  886. vh264_prot_init();
  887. amvdec_start();
  888. vh264_no_disp_count = 0;
  889. vh264_no_disp_wd_count++;
  890. }
  891. }
  892. #endif
  893. if (putting_ptr != put_ptr) {
  894. u32 index = vfpool_idx[put_ptr];
  895. if (index >= VF_BUF_NUM) {
  896. printk("index %d\n", index);
  897. }
  898. if (index != -1) {
  899. if (--vfbuf_use[index] == 0) {
  900. if (!vh264_stream_switching) {
  901. buffer_for_recycle[buffer_for_recycle_wr++] = index + 1;
  902. if (buffer_for_recycle_wr == VF_BUF_NUM) {
  903. buffer_for_recycle_wr = 0;
  904. }
  905. } else {
  906. int i;
  907. for (i=0; i<VF_BUF_NUM; i++) {
  908. if (vfbuf_use[i] != 0)
  909. break;
  910. }
  911. if (i == VF_BUF_NUM) {
  912. stream_switching_done();
  913. }
  914. }
  915. }
  916. }
  917. INCPTR(put_ptr);
  918. }
  919. if (buffer_for_recycle_rd != buffer_for_recycle_wr) {
  920. if (READ_VREG(AV_SCRATCH_7) == 0) {
  921. WRITE_VREG(AV_SCRATCH_7, buffer_for_recycle[buffer_for_recycle_rd]);
  922. if (++buffer_for_recycle_rd == VF_BUF_NUM) {
  923. buffer_for_recycle_rd = 0;
  924. }
  925. } else if (READ_VREG(AV_SCRATCH_8) == 0) {
  926. WRITE_VREG(AV_SCRATCH_8, buffer_for_recycle[buffer_for_recycle_rd]);
  927. if (++buffer_for_recycle_rd == VF_BUF_NUM) {
  928. buffer_for_recycle_rd = 0;
  929. }
  930. }
  931. }
  932. timer->expires = jiffies + PUT_INTERVAL;
  933. add_timer(timer);
  934. }
  935. int vh264_dec_status(struct vdec_status *vstatus)
  936. {
  937. vstatus->width = frame_width;
  938. vstatus->height = frame_height;
  939. if (frame_dur != 0) {
  940. vstatus->fps = 96000 / frame_dur;
  941. } else {
  942. vstatus->fps = -1;
  943. }
  944. vstatus->error_count = READ_VREG(AV_SCRATCH_D);
  945. vstatus->status = stat;
  946. return 0;
  947. }
  948. int vh264_set_trickmode(unsigned long trickmode)
  949. {
  950. if (trickmode == TRICKMODE_I) {
  951. WRITE_VREG(AV_SCRATCH_F, (READ_VREG(AV_SCRATCH_F) & 0xfffffffc) | 2);
  952. trickmode_i = 1;
  953. } else if (trickmode == TRICKMODE_NONE) {
  954. WRITE_VREG(AV_SCRATCH_F, READ_VREG(AV_SCRATCH_F) & 0xfffffffc);
  955. trickmode_i = 0;
  956. }
  957. return 0;
  958. }
  959. static void vh264_prot_init(void)
  960. {
  961. while (READ_VREG(DCAC_DMA_CTRL) & 0x8000) {
  962. ;
  963. }
  964. while (READ_VREG(LMEM_DMA_CTRL) & 0x8000) {
  965. ; // reg address is 0x350
  966. }
  967. #ifdef CONFIG_ARCH_MESON6
  968. WRITE_VREG(DOS_SW_RESET0, (1<<7) | (1<<6) | (1<<4));
  969. WRITE_VREG(DOS_SW_RESET0, 0);
  970. READ_VREG(DOS_SW_RESET0);
  971. READ_VREG(DOS_SW_RESET0);
  972. READ_VREG(DOS_SW_RESET0);
  973. WRITE_VREG(DOS_SW_RESET0, (1<<7) | (1<<6) | (1<<4));
  974. WRITE_VREG(DOS_SW_RESET0, 0);
  975. WRITE_VREG(DOS_SW_RESET0, (1<<9) | (1<<8));
  976. WRITE_VREG(DOS_SW_RESET0, 0);
  977. READ_VREG(DOS_SW_RESET0);
  978. READ_VREG(DOS_SW_RESET0);
  979. READ_VREG(DOS_SW_RESET0);
  980. #else
  981. WRITE_MPEG_REG(RESET0_REGISTER, RESET_IQIDCT | RESET_MC | RESET_VLD_PART);
  982. READ_MPEG_REG(RESET0_REGISTER);
  983. WRITE_MPEG_REG(RESET0_REGISTER, RESET_IQIDCT | RESET_MC | RESET_VLD_PART);
  984. WRITE_MPEG_REG(RESET2_REGISTER, RESET_PIC_DC | RESET_DBLK);
  985. #endif
  986. WRITE_VREG(POWER_CTL_VLD, READ_VREG(POWER_CTL_VLD) | (0 << 10) | (1 << 9) | (1 << 6));
  987. /* disable PSCALE for hardware sharing */
  988. WRITE_VREG(PSCALE_CTRL, 0);
  989. WRITE_VREG(AV_SCRATCH_0, 0);
  990. WRITE_VREG(AV_SCRATCH_1, buf_offset);
  991. WRITE_VREG(AV_SCRATCH_7, 0);
  992. WRITE_VREG(AV_SCRATCH_8, 0);
  993. WRITE_VREG(AV_SCRATCH_9, 0);
  994. WRITE_VREG(AV_SCRATCH_F, (READ_VREG(AV_SCRATCH_F) & 0xffffffc3) | ((error_recovery_mode & 0x3) << 4));
  995. /* clear mailbox interrupt */
  996. WRITE_VREG(ASSIST_MBOX1_CLR_REG, 1);
  997. /* enable mailbox interrupt */
  998. WRITE_VREG(ASSIST_MBOX1_MASK, 1);
  999. #ifdef NV21
  1000. SET_VREG_MASK(MDEC_PIC_DC_CTRL, 1<<17);
  1001. #endif
  1002. }
  1003. static void vh264_local_init(void)
  1004. {
  1005. int i;
  1006. vh264_ratio = vh264_amstream_dec_info.ratio;
  1007. //vh264_ratio = 0x100;
  1008. vh264_rotation = (((u32)vh264_amstream_dec_info.param) >> 16) & 0xffff;
  1009. fill_ptr = get_ptr = put_ptr = putting_ptr = 0;
  1010. frame_buffer_size = AVIL_DPB_BUFF_SIZE;
  1011. frame_prog = 0;
  1012. frame_width = vh264_amstream_dec_info.width;
  1013. frame_height = vh264_amstream_dec_info.height;
  1014. frame_dur = vh264_amstream_dec_info.rate;
  1015. pts_outside = ((u32)vh264_amstream_dec_info.param) & 0x01;
  1016. sync_outside = ((u32)vh264_amstream_dec_info.param & 0x02) >> 1;
  1017. buffer_for_recycle_rd = 0;
  1018. buffer_for_recycle_wr = 0;
  1019. if (!vh264_running) {
  1020. last_mb_width = 0;
  1021. last_mb_height = 0;
  1022. }
  1023. for (i = 0; i < VF_BUF_NUM; i++) {
  1024. vfbuf_use[i] = 0;
  1025. }
  1026. for (i = 0; i < VF_POOL_SIZE; i++) {
  1027. vfpool_idx[i] = VF_BUF_NUM;
  1028. vfpool[i].bufWidth = 1920;
  1029. }
  1030. #ifdef DROP_B_FRAME_FOR_1080P_50_60FPS
  1031. last_interlaced = 1;
  1032. #endif
  1033. neg_poc_counter = 0;
  1034. h264_first_pts_ready = 0;
  1035. h264pts1 = 0;
  1036. h264pts2 = 0;
  1037. h264_pts_count = 0;
  1038. duration_from_pts_done = 0;
  1039. vh264_error_count = READ_VREG(AV_SCRATCH_D);
  1040. p_last_vf = NULL;
  1041. last_ptr = VF_POOL_SIZE - 1;
  1042. wait_buffer_counter = 0;
  1043. vh264_no_disp_count = 0;
  1044. #ifdef DEBUG_PTS
  1045. pts_missed = 0;
  1046. pts_hit = 0;
  1047. #endif
  1048. return;
  1049. }
  1050. static s32 vh264_init(void)
  1051. {
  1052. void __iomem *p = ioremap_nocache(MEM_HEADER_CPU_BASE, MEM_SWAP_SIZE);
  1053. if (!p) {
  1054. printk("\nvh264_init: Cannot remap ucode swapping memory\n");
  1055. return -ENOMEM;
  1056. }
  1057. printk("\nvh264_init\n");
  1058. init_timer(&recycle_timer);
  1059. stat |= STAT_TIMER_INIT;
  1060. vh264_local_init();
  1061. amvdec_enable();
  1062. if (amvdec_loadmc(vh264_mc) < 0) {
  1063. amvdec_disable();
  1064. return -EBUSY;
  1065. }
  1066. memcpy(p,
  1067. vh264_header_mc, sizeof(vh264_header_mc));
  1068. memcpy((void *)((ulong)p + 0x1000),
  1069. vh264_data_mc, sizeof(vh264_data_mc));
  1070. memcpy((void *)((ulong)p + 0x2000),
  1071. vh264_mmco_mc, sizeof(vh264_mmco_mc));
  1072. memcpy((void *)((ulong)p + 0x3000),
  1073. vh264_list_mc, sizeof(vh264_list_mc));
  1074. memcpy((void *)((ulong)p + 0x4000),
  1075. vh264_slice_mc, sizeof(vh264_slice_mc));
  1076. iounmap(p);
  1077. stat |= STAT_MC_LOAD;
  1078. /* enable AMRISC side protocol */
  1079. vh264_prot_init();
  1080. #ifdef HANDLE_H264_IRQ
  1081. if (request_irq(INT_MAILBOX_1A, vh264_isr,
  1082. IRQF_SHARED, "vh264-irq", (void *)vh264_dec_id)) {
  1083. printk("vh264 irq register error.\n");
  1084. amvdec_disable();
  1085. return -ENOENT;
  1086. }
  1087. #endif
  1088. stat |= STAT_ISR_REG;
  1089. #ifdef CONFIG_POST_PROCESS_MANAGER
  1090. vf_provider_init(&vh264_vf_prov, PROVIDER_NAME, &vh264_vf_provider, NULL);
  1091. vf_reg_provider(&vh264_vf_prov);
  1092. vf_notify_receiver(PROVIDER_NAME,VFRAME_EVENT_PROVIDER_START,NULL);
  1093. #else
  1094. vf_provider_init(&vh264_vf_prov, PROVIDER_NAME, &vh264_vf_provider, NULL);
  1095. vf_reg_provider(&vh264_vf_prov);
  1096. #endif
  1097. stat |= STAT_VF_HOOK;
  1098. recycle_timer.data = (ulong) & recycle_timer;
  1099. recycle_timer.function = vh264_put_timer_func;
  1100. recycle_timer.expires = jiffies + PUT_INTERVAL;
  1101. add_timer(&recycle_timer);
  1102. stat |= STAT_TIMER_ARM;
  1103. vh264_running = 0;
  1104. vh264_stream_switching = 0;
  1105. amvdec_start();
  1106. stat |= STAT_VDEC_RUN;
  1107. set_vdec_func(&vh264_dec_status);
  1108. set_trickmode_func(&vh264_set_trickmode);
  1109. return 0;
  1110. }
  1111. static int vh264_stop(void)
  1112. {
  1113. if (stat & STAT_VDEC_RUN) {
  1114. amvdec_stop();
  1115. stat &= ~STAT_VDEC_RUN;
  1116. }
  1117. if (stat & STAT_ISR_REG) {
  1118. WRITE_VREG(ASSIST_MBOX1_MASK, 0);
  1119. free_irq(INT_MAILBOX_1A,
  1120. (void *)vh264_dec_id);
  1121. stat &= ~STAT_ISR_REG;
  1122. }
  1123. if (stat & STAT_TIMER_ARM) {
  1124. del_timer_sync(&recycle_timer);
  1125. stat &= ~STAT_TIMER_ARM;
  1126. }
  1127. if (stat & STAT_VF_HOOK) {
  1128. ulong flags;
  1129. spin_lock_irqsave(&lock, flags);
  1130. fill_ptr = get_ptr = put_ptr = putting_ptr = 0;
  1131. spin_unlock_irqrestore(&lock, flags);
  1132. vf_unreg_provider(&vh264_vf_prov);
  1133. stat &= ~STAT_VF_HOOK;
  1134. }
  1135. amvdec_disable();
  1136. return 0;
  1137. }
  1138. static void error_do_work(struct work_struct *work)
  1139. {
  1140. mutex_lock(&vh264_mutex);
  1141. /*
  1142. * we need to lock vh264_stop/vh264_init.
  1143. * because we will call amvdec_h264_remove on this step;
  1144. * then we may call more than once on free_irq/deltimer/..and some other.
  1145. */
  1146. if (atomic_read(&vh264_active)) {
  1147. vh264_stop();
  1148. vh264_init();
  1149. }
  1150. mutex_unlock(&vh264_mutex);
  1151. }
  1152. static void stream_switching_done(void)
  1153. {
  1154. unsigned long flags;
  1155. spin_lock_irqsave(&lock, flags);
  1156. vh264_stream_switching = 0;
  1157. spin_unlock_irqrestore(&lock, flags);
  1158. WRITE_VREG(AV_SCRATCH_0, 0);
  1159. }
  1160. static int canvas_dup(u8 *dst, ulong src_paddr, ulong size)
  1161. {
  1162. void __iomem *p = ioremap_wc(src_paddr, size);
  1163. if (p) {
  1164. memcpy(dst, p, size);
  1165. iounmap(p);
  1166. return 1;
  1167. }
  1168. return 0;
  1169. }
  1170. static void stream_switching_do(struct work_struct *work)
  1171. {
  1172. vframe_t *vf_prev, *vf_curr;
  1173. unsigned int buffer_index;
  1174. bool do_copy = true;
  1175. int mb_total_num, mb_width_num, mb_height_num;
  1176. mutex_lock(&vh264_mutex);
  1177. if (atomic_read(&vh264_active)) {
  1178. unsigned long flags;
  1179. ulong videoKeepBuf[3], videoKeepBufPhys[3];
  1180. get_video_keep_buffer(videoKeepBuf, videoKeepBufPhys);
  1181. if (!videoKeepBuf[0] || !videoKeepBuf[1] || !videoKeepBuf[2]) {
  1182. do_copy = false;
  1183. }
  1184. spin_lock_irqsave(&lock, flags);
  1185. /* lock to make sure last_ptr is valid when vh264_stream_switching is 1 */
  1186. if (unlikely(!vh264_stream_switching)) {
  1187. /* a fast path when last frame of previous session is already recycled */
  1188. spin_unlock_irqrestore(&lock, flags);
  1189. mutex_unlock(&vh264_mutex);
  1190. return;
  1191. }
  1192. buffer_index = vfpool_idx[last_ptr];
  1193. mb_total_num = mb_total;
  1194. mb_width_num = mb_width;
  1195. mb_height_num = mb_height;
  1196. spin_unlock_irqrestore(&lock, flags);
  1197. /* construct a clone of the frame from last frame */
  1198. if (do_copy) {
  1199. /* construct a clone of the frame from last frame */
  1200. #ifdef NV21
  1201. canvas_dup((u8 *)videoKeepBuf[0], buffer_spec[buffer_index].y_addr, mb_total_num<<8);
  1202. canvas_dup((u8 *)videoKeepBuf[1], buffer_spec[buffer_index].u_addr, mb_total_num<<7);
  1203. canvas_config(0, videoKeepBufPhys[0], mb_width_num << 4, mb_height_num << 4,
  1204. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  1205. canvas_config(1, videoKeepBufPhys[1], mb_width_num << 4, mb_height_num << 3,
  1206. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  1207. #else
  1208. canvas_dup((u8 *)videoKeepBuf[0], buffer_spec[buffer_index].y_addr, mb_total_num<<8);
  1209. canvas_dup((u8 *)videoKeepBuf[1], buffer_spec[buffer_index].u_addr, mb_total_num<<6);
  1210. canvas_dup((u8 *)videoKeepBuf[2], buffer_spec[buffer_index].v_addr, mb_total_num<<6);
  1211. canvas_config(0, videoKeepBufPhys[0], mb_width_num << 4, mb_height_num << 4,
  1212. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  1213. canvas_config(1, videoKeepBufPhys[1], mb_width_num << 3, mb_height_num << 3,
  1214. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  1215. canvas_config(2, videoKeepBufPhys[2], mb_width_num << 3, mb_height_num << 3,
  1216. CANVAS_ADDR_NOWRAP, CANVAS_BLKMODE_32X32);
  1217. #endif
  1218. }
  1219. /* lock again to make sure the insertion happens when vh264_stream_switching is true */
  1220. spin_lock_irqsave(&lock, flags);
  1221. if (unlikely(!vh264_stream_switching)) {
  1222. spin_unlock_irqrestore(&lock, flags);
  1223. mutex_unlock(&vh264_mutex);
  1224. return;
  1225. }
  1226. vf_prev = &vfpool[last_ptr];
  1227. vf_curr = &vfpool[fill_ptr];
  1228. *vf_curr = *vf_prev;
  1229. vf_curr->pts = 0;
  1230. vf_curr->duration = 1;
  1231. if (do_copy) {
  1232. vf_curr->canvas0Addr = vf_curr->canvas1Addr = 0x020100;
  1233. }
  1234. vfpool_idx[fill_ptr] = -1;
  1235. INCPTR(fill_ptr);
  1236. spin_unlock_irqrestore(&lock, flags);
  1237. }
  1238. mutex_unlock(&vh264_mutex);
  1239. }
  1240. static int amvdec_h264_probe(struct platform_device *pdev)
  1241. {
  1242. struct resource *mem;
  1243. mutex_lock(&vh264_mutex);
  1244. printk("amvdec_h264 probe start.\n");
  1245. if (!(mem = platform_get_resource(pdev, IORESOURCE_MEM, 0))) {
  1246. printk("\namvdec_h264 memory resource undefined.\n");
  1247. mutex_unlock(&vh264_mutex);
  1248. return -EFAULT;
  1249. }
  1250. buf_size = mem->end - mem->start + 1;
  1251. buf_offset = mem->start - DEF_BUF_START_ADDR;
  1252. buf_start = V_BUF_ADDR_START + buf_offset;
  1253. memcpy(&vh264_amstream_dec_info, (void *)mem[1].start, sizeof(vh264_amstream_dec_info));
  1254. if (vh264_init() < 0) {
  1255. printk("\namvdec_h264 init failed.\n");
  1256. mutex_unlock(&vh264_mutex);
  1257. return -ENODEV;
  1258. }
  1259. INIT_WORK(&error_wd_work, error_do_work);
  1260. INIT_WORK(&stream_switching_work, stream_switching_do);
  1261. atomic_set(&vh264_active, 1);
  1262. printk("amvdec_h264 probe end.\n");
  1263. mutex_unlock(&vh264_mutex);
  1264. return 0;
  1265. }
  1266. static int amvdec_h264_remove(struct platform_device *pdev)
  1267. {
  1268. mutex_lock(&vh264_mutex);
  1269. vh264_stop();
  1270. atomic_set(&vh264_active, 0);
  1271. #ifdef DEBUG_PTS
  1272. printk("pts missed %ld, pts hit %ld, pts_outside %d, duration %d, sync_outside %d\n",
  1273. pts_missed, pts_hit, pts_outside, frame_dur, sync_outside);
  1274. #endif
  1275. mutex_unlock(&vh264_mutex);
  1276. return 0;
  1277. }
  1278. /****************************************/
  1279. static struct platform_driver amvdec_h264_driver = {
  1280. .probe = amvdec_h264_probe,
  1281. .remove = amvdec_h264_remove,
  1282. #ifdef CONFIG_PM
  1283. .suspend = amvdec_suspend,
  1284. .resume = amvdec_resume,
  1285. #endif
  1286. .driver = {
  1287. .name = DRIVER_NAME,
  1288. }
  1289. };
  1290. static struct codec_profile_t amvdec_h264_profile = {
  1291. .name = "h264",
  1292. .profile = ""
  1293. };
  1294. static int __init amvdec_h264_driver_init_module(void)
  1295. {
  1296. printk("amvdec_h264 module init\n");
  1297. if (platform_driver_register(&amvdec_h264_driver)) {
  1298. printk("failed to register amvdec_h264 driver\n");
  1299. return -ENODEV;
  1300. }
  1301. vcodec_profile_register(&amvdec_h264_profile);
  1302. return 0;
  1303. }
  1304. static void __exit amvdec_h264_driver_remove_module(void)
  1305. {
  1306. printk("amvdec_h264 module remove.\n");
  1307. platform_driver_unregister(&amvdec_h264_driver);
  1308. }
  1309. /****************************************/
  1310. module_param(stat, uint, 0664);
  1311. MODULE_PARM_DESC(stat, "\n amvdec_h264 stat \n");
  1312. module_param(error_recovery_mode, uint, 0664);
  1313. MODULE_PARM_DESC(error_recovery_mode, "\n amvdec_h264 error_recovery_mode \n");
  1314. module_param(sync_outside, uint, 0664);
  1315. MODULE_PARM_DESC(sync_outside, "\n amvdec_h264 sync_outside \n");
  1316. module_init(amvdec_h264_driver_init_module);
  1317. module_exit(amvdec_h264_driver_remove_module);
  1318. MODULE_DESCRIPTION("AMLOGIC H264 Video Decoder Driver");
  1319. MODULE_LICENSE("GPL");
  1320. MODULE_AUTHOR("Chen Zhang <chen.zhang@amlogic.com>");