tlb_uv.c 48 KB

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  1. /*
  2. * SGI UltraViolet TLB flush routines.
  3. *
  4. * (c) 2008-2011 Cliff Wickman <cpw@sgi.com>, SGI.
  5. *
  6. * This code is released under the GNU General Public License version 2 or
  7. * later.
  8. */
  9. #include <linux/seq_file.h>
  10. #include <linux/proc_fs.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/kernel.h>
  13. #include <linux/slab.h>
  14. #include <linux/delay.h>
  15. #include <asm/mmu_context.h>
  16. #include <asm/uv/uv.h>
  17. #include <asm/uv/uv_mmrs.h>
  18. #include <asm/uv/uv_hub.h>
  19. #include <asm/uv/uv_bau.h>
  20. #include <asm/apic.h>
  21. #include <asm/idle.h>
  22. #include <asm/tsc.h>
  23. #include <asm/irq_vectors.h>
  24. #include <asm/timer.h>
  25. /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  26. static int timeout_base_ns[] = {
  27. 20,
  28. 160,
  29. 1280,
  30. 10240,
  31. 81920,
  32. 655360,
  33. 5242880,
  34. 167772160
  35. };
  36. static int timeout_us;
  37. static int nobau;
  38. static int baudisabled;
  39. static spinlock_t disable_lock;
  40. static cycles_t congested_cycles;
  41. /* tunables: */
  42. static int max_concurr = MAX_BAU_CONCURRENT;
  43. static int max_concurr_const = MAX_BAU_CONCURRENT;
  44. static int plugged_delay = PLUGGED_DELAY;
  45. static int plugsb4reset = PLUGSB4RESET;
  46. static int timeoutsb4reset = TIMEOUTSB4RESET;
  47. static int ipi_reset_limit = IPI_RESET_LIMIT;
  48. static int complete_threshold = COMPLETE_THRESHOLD;
  49. static int congested_respns_us = CONGESTED_RESPONSE_US;
  50. static int congested_reps = CONGESTED_REPS;
  51. static int congested_period = CONGESTED_PERIOD;
  52. static struct tunables tunables[] = {
  53. {&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
  54. {&plugged_delay, PLUGGED_DELAY},
  55. {&plugsb4reset, PLUGSB4RESET},
  56. {&timeoutsb4reset, TIMEOUTSB4RESET},
  57. {&ipi_reset_limit, IPI_RESET_LIMIT},
  58. {&complete_threshold, COMPLETE_THRESHOLD},
  59. {&congested_respns_us, CONGESTED_RESPONSE_US},
  60. {&congested_reps, CONGESTED_REPS},
  61. {&congested_period, CONGESTED_PERIOD}
  62. };
  63. static struct dentry *tunables_dir;
  64. static struct dentry *tunables_file;
  65. /* these correspond to the statistics printed by ptc_seq_show() */
  66. static char *stat_description[] = {
  67. "sent: number of shootdown messages sent",
  68. "stime: time spent sending messages",
  69. "numuvhubs: number of hubs targeted with shootdown",
  70. "numuvhubs16: number times 16 or more hubs targeted",
  71. "numuvhubs8: number times 8 or more hubs targeted",
  72. "numuvhubs4: number times 4 or more hubs targeted",
  73. "numuvhubs2: number times 2 or more hubs targeted",
  74. "numuvhubs1: number times 1 hub targeted",
  75. "numcpus: number of cpus targeted with shootdown",
  76. "dto: number of destination timeouts",
  77. "retries: destination timeout retries sent",
  78. "rok: : destination timeouts successfully retried",
  79. "resetp: ipi-style resource resets for plugs",
  80. "resett: ipi-style resource resets for timeouts",
  81. "giveup: fall-backs to ipi-style shootdowns",
  82. "sto: number of source timeouts",
  83. "bz: number of stay-busy's",
  84. "throt: number times spun in throttle",
  85. "swack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
  86. "recv: shootdown messages received",
  87. "rtime: time spent processing messages",
  88. "all: shootdown all-tlb messages",
  89. "one: shootdown one-tlb messages",
  90. "mult: interrupts that found multiple messages",
  91. "none: interrupts that found no messages",
  92. "retry: number of retry messages processed",
  93. "canc: number messages canceled by retries",
  94. "nocan: number retries that found nothing to cancel",
  95. "reset: number of ipi-style reset requests processed",
  96. "rcan: number messages canceled by reset requests",
  97. "disable: number times use of the BAU was disabled",
  98. "enable: number times use of the BAU was re-enabled"
  99. };
  100. static int __init
  101. setup_nobau(char *arg)
  102. {
  103. nobau = 1;
  104. return 0;
  105. }
  106. early_param("nobau", setup_nobau);
  107. /* base pnode in this partition */
  108. static int uv_base_pnode __read_mostly;
  109. static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
  110. static DEFINE_PER_CPU(struct bau_control, bau_control);
  111. static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
  112. /*
  113. * Determine the first node on a uvhub. 'Nodes' are used for kernel
  114. * memory allocation.
  115. */
  116. static int __init uvhub_to_first_node(int uvhub)
  117. {
  118. int node, b;
  119. for_each_online_node(node) {
  120. b = uv_node_to_blade_id(node);
  121. if (uvhub == b)
  122. return node;
  123. }
  124. return -1;
  125. }
  126. /*
  127. * Determine the apicid of the first cpu on a uvhub.
  128. */
  129. static int __init uvhub_to_first_apicid(int uvhub)
  130. {
  131. int cpu;
  132. for_each_present_cpu(cpu)
  133. if (uvhub == uv_cpu_to_blade_id(cpu))
  134. return per_cpu(x86_cpu_to_apicid, cpu);
  135. return -1;
  136. }
  137. /*
  138. * Free a software acknowledge hardware resource by clearing its Pending
  139. * bit. This will return a reply to the sender.
  140. * If the message has timed out, a reply has already been sent by the
  141. * hardware but the resource has not been released. In that case our
  142. * clear of the Timeout bit (as well) will free the resource. No reply will
  143. * be sent (the hardware will only do one reply per message).
  144. */
  145. static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp)
  146. {
  147. unsigned long dw;
  148. struct bau_pq_entry *msg;
  149. msg = mdp->msg;
  150. if (!msg->canceled) {
  151. dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
  152. write_mmr_sw_ack(dw);
  153. }
  154. msg->replied_to = 1;
  155. msg->swack_vec = 0;
  156. }
  157. /*
  158. * Process the receipt of a RETRY message
  159. */
  160. static void bau_process_retry_msg(struct msg_desc *mdp,
  161. struct bau_control *bcp)
  162. {
  163. int i;
  164. int cancel_count = 0;
  165. unsigned long msg_res;
  166. unsigned long mmr = 0;
  167. struct bau_pq_entry *msg = mdp->msg;
  168. struct bau_pq_entry *msg2;
  169. struct ptc_stats *stat = bcp->statp;
  170. stat->d_retries++;
  171. /*
  172. * cancel any message from msg+1 to the retry itself
  173. */
  174. for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
  175. if (msg2 > mdp->queue_last)
  176. msg2 = mdp->queue_first;
  177. if (msg2 == msg)
  178. break;
  179. /* same conditions for cancellation as do_reset */
  180. if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
  181. (msg2->swack_vec) && ((msg2->swack_vec &
  182. msg->swack_vec) == 0) &&
  183. (msg2->sending_cpu == msg->sending_cpu) &&
  184. (msg2->msg_type != MSG_NOOP)) {
  185. mmr = read_mmr_sw_ack();
  186. msg_res = msg2->swack_vec;
  187. /*
  188. * This is a message retry; clear the resources held
  189. * by the previous message only if they timed out.
  190. * If it has not timed out we have an unexpected
  191. * situation to report.
  192. */
  193. if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
  194. unsigned long mr;
  195. /*
  196. * is the resource timed out?
  197. * make everyone ignore the cancelled message.
  198. */
  199. msg2->canceled = 1;
  200. stat->d_canceled++;
  201. cancel_count++;
  202. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  203. write_mmr_sw_ack(mr);
  204. }
  205. }
  206. }
  207. if (!cancel_count)
  208. stat->d_nocanceled++;
  209. }
  210. /*
  211. * Do all the things a cpu should do for a TLB shootdown message.
  212. * Other cpu's may come here at the same time for this message.
  213. */
  214. static void bau_process_message(struct msg_desc *mdp,
  215. struct bau_control *bcp)
  216. {
  217. short socket_ack_count = 0;
  218. short *sp;
  219. struct atomic_short *asp;
  220. struct ptc_stats *stat = bcp->statp;
  221. struct bau_pq_entry *msg = mdp->msg;
  222. struct bau_control *smaster = bcp->socket_master;
  223. /*
  224. * This must be a normal message, or retry of a normal message
  225. */
  226. if (msg->address == TLB_FLUSH_ALL) {
  227. local_flush_tlb();
  228. stat->d_alltlb++;
  229. } else {
  230. __flush_tlb_one(msg->address);
  231. stat->d_onetlb++;
  232. }
  233. stat->d_requestee++;
  234. /*
  235. * One cpu on each uvhub has the additional job on a RETRY
  236. * of releasing the resource held by the message that is
  237. * being retried. That message is identified by sending
  238. * cpu number.
  239. */
  240. if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
  241. bau_process_retry_msg(mdp, bcp);
  242. /*
  243. * This is a swack message, so we have to reply to it.
  244. * Count each responding cpu on the socket. This avoids
  245. * pinging the count's cache line back and forth between
  246. * the sockets.
  247. */
  248. sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
  249. asp = (struct atomic_short *)sp;
  250. socket_ack_count = atom_asr(1, asp);
  251. if (socket_ack_count == bcp->cpus_in_socket) {
  252. int msg_ack_count;
  253. /*
  254. * Both sockets dump their completed count total into
  255. * the message's count.
  256. */
  257. smaster->socket_acknowledge_count[mdp->msg_slot] = 0;
  258. asp = (struct atomic_short *)&msg->acknowledge_count;
  259. msg_ack_count = atom_asr(socket_ack_count, asp);
  260. if (msg_ack_count == bcp->cpus_in_uvhub) {
  261. /*
  262. * All cpus in uvhub saw it; reply
  263. */
  264. reply_to_message(mdp, bcp);
  265. }
  266. }
  267. return;
  268. }
  269. /*
  270. * Determine the first cpu on a uvhub.
  271. */
  272. static int uvhub_to_first_cpu(int uvhub)
  273. {
  274. int cpu;
  275. for_each_present_cpu(cpu)
  276. if (uvhub == uv_cpu_to_blade_id(cpu))
  277. return cpu;
  278. return -1;
  279. }
  280. /*
  281. * Last resort when we get a large number of destination timeouts is
  282. * to clear resources held by a given cpu.
  283. * Do this with IPI so that all messages in the BAU message queue
  284. * can be identified by their nonzero swack_vec field.
  285. *
  286. * This is entered for a single cpu on the uvhub.
  287. * The sender want's this uvhub to free a specific message's
  288. * swack resources.
  289. */
  290. static void do_reset(void *ptr)
  291. {
  292. int i;
  293. struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
  294. struct reset_args *rap = (struct reset_args *)ptr;
  295. struct bau_pq_entry *msg;
  296. struct ptc_stats *stat = bcp->statp;
  297. stat->d_resets++;
  298. /*
  299. * We're looking for the given sender, and
  300. * will free its swack resource.
  301. * If all cpu's finally responded after the timeout, its
  302. * message 'replied_to' was set.
  303. */
  304. for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
  305. unsigned long msg_res;
  306. /* do_reset: same conditions for cancellation as
  307. bau_process_retry_msg() */
  308. if ((msg->replied_to == 0) &&
  309. (msg->canceled == 0) &&
  310. (msg->sending_cpu == rap->sender) &&
  311. (msg->swack_vec) &&
  312. (msg->msg_type != MSG_NOOP)) {
  313. unsigned long mmr;
  314. unsigned long mr;
  315. /*
  316. * make everyone else ignore this message
  317. */
  318. msg->canceled = 1;
  319. /*
  320. * only reset the resource if it is still pending
  321. */
  322. mmr = read_mmr_sw_ack();
  323. msg_res = msg->swack_vec;
  324. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  325. if (mmr & msg_res) {
  326. stat->d_rcanceled++;
  327. write_mmr_sw_ack(mr);
  328. }
  329. }
  330. }
  331. return;
  332. }
  333. /*
  334. * Use IPI to get all target uvhubs to release resources held by
  335. * a given sending cpu number.
  336. */
  337. static void reset_with_ipi(struct bau_targ_hubmask *distribution, int sender)
  338. {
  339. int uvhub;
  340. int maskbits;
  341. cpumask_t mask;
  342. struct reset_args reset_args;
  343. reset_args.sender = sender;
  344. cpus_clear(mask);
  345. /* find a single cpu for each uvhub in this distribution mask */
  346. maskbits = sizeof(struct bau_targ_hubmask) * BITSPERBYTE;
  347. for (uvhub = 0; uvhub < maskbits; uvhub++) {
  348. int cpu;
  349. if (!bau_uvhub_isset(uvhub, distribution))
  350. continue;
  351. /* find a cpu for this uvhub */
  352. cpu = uvhub_to_first_cpu(uvhub);
  353. cpu_set(cpu, mask);
  354. }
  355. /* IPI all cpus; preemption is already disabled */
  356. smp_call_function_many(&mask, do_reset, (void *)&reset_args, 1);
  357. return;
  358. }
  359. static inline unsigned long cycles_2_us(unsigned long long cyc)
  360. {
  361. unsigned long long ns;
  362. unsigned long us;
  363. int cpu = smp_processor_id();
  364. ns = (cyc * per_cpu(cyc2ns, cpu)) >> CYC2NS_SCALE_FACTOR;
  365. us = ns / 1000;
  366. return us;
  367. }
  368. /*
  369. * wait for all cpus on this hub to finish their sends and go quiet
  370. * leaves uvhub_quiesce set so that no new broadcasts are started by
  371. * bau_flush_send_and_wait()
  372. */
  373. static inline void quiesce_local_uvhub(struct bau_control *hmaster)
  374. {
  375. atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  376. }
  377. /*
  378. * mark this quiet-requestor as done
  379. */
  380. static inline void end_uvhub_quiesce(struct bau_control *hmaster)
  381. {
  382. atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  383. }
  384. static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
  385. {
  386. unsigned long descriptor_status;
  387. descriptor_status = uv_read_local_mmr(mmr_offset);
  388. descriptor_status >>= right_shift;
  389. descriptor_status &= UV_ACT_STATUS_MASK;
  390. return descriptor_status;
  391. }
  392. /*
  393. * Wait for completion of a broadcast software ack message
  394. * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
  395. */
  396. static int uv1_wait_completion(struct bau_desc *bau_desc,
  397. unsigned long mmr_offset, int right_shift,
  398. struct bau_control *bcp, long try)
  399. {
  400. unsigned long descriptor_status;
  401. cycles_t ttm;
  402. struct ptc_stats *stat = bcp->statp;
  403. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  404. /* spin on the status MMR, waiting for it to go idle */
  405. while ((descriptor_status != DS_IDLE)) {
  406. /*
  407. * Our software ack messages may be blocked because
  408. * there are no swack resources available. As long
  409. * as none of them has timed out hardware will NACK
  410. * our message and its state will stay IDLE.
  411. */
  412. if (descriptor_status == DS_SOURCE_TIMEOUT) {
  413. stat->s_stimeout++;
  414. return FLUSH_GIVEUP;
  415. } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
  416. stat->s_dtimeout++;
  417. ttm = get_cycles();
  418. /*
  419. * Our retries may be blocked by all destination
  420. * swack resources being consumed, and a timeout
  421. * pending. In that case hardware returns the
  422. * ERROR that looks like a destination timeout.
  423. */
  424. if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
  425. bcp->conseccompletes = 0;
  426. return FLUSH_RETRY_PLUGGED;
  427. }
  428. bcp->conseccompletes = 0;
  429. return FLUSH_RETRY_TIMEOUT;
  430. } else {
  431. /*
  432. * descriptor_status is still BUSY
  433. */
  434. cpu_relax();
  435. }
  436. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  437. }
  438. bcp->conseccompletes++;
  439. return FLUSH_COMPLETE;
  440. }
  441. /*
  442. * UV2 has an extra bit of status in the ACTIVATION_STATUS_2 register.
  443. */
  444. static unsigned long uv2_read_status(unsigned long offset, int rshft, int cpu)
  445. {
  446. unsigned long descriptor_status;
  447. unsigned long descriptor_status2;
  448. descriptor_status = ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK);
  449. descriptor_status2 = (read_mmr_uv2_status() >> cpu) & 0x1UL;
  450. descriptor_status = (descriptor_status << 1) | descriptor_status2;
  451. return descriptor_status;
  452. }
  453. static int uv2_wait_completion(struct bau_desc *bau_desc,
  454. unsigned long mmr_offset, int right_shift,
  455. struct bau_control *bcp, long try)
  456. {
  457. unsigned long descriptor_stat;
  458. cycles_t ttm;
  459. int cpu = bcp->uvhub_cpu;
  460. struct ptc_stats *stat = bcp->statp;
  461. descriptor_stat = uv2_read_status(mmr_offset, right_shift, cpu);
  462. /* spin on the status MMR, waiting for it to go idle */
  463. while (descriptor_stat != UV2H_DESC_IDLE) {
  464. /*
  465. * Our software ack messages may be blocked because
  466. * there are no swack resources available. As long
  467. * as none of them has timed out hardware will NACK
  468. * our message and its state will stay IDLE.
  469. */
  470. if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT) ||
  471. (descriptor_stat == UV2H_DESC_DEST_STRONG_NACK) ||
  472. (descriptor_stat == UV2H_DESC_DEST_PUT_ERR)) {
  473. stat->s_stimeout++;
  474. return FLUSH_GIVEUP;
  475. } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
  476. stat->s_dtimeout++;
  477. ttm = get_cycles();
  478. /*
  479. * Our retries may be blocked by all destination
  480. * swack resources being consumed, and a timeout
  481. * pending. In that case hardware returns the
  482. * ERROR that looks like a destination timeout.
  483. */
  484. if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
  485. bcp->conseccompletes = 0;
  486. return FLUSH_RETRY_PLUGGED;
  487. }
  488. bcp->conseccompletes = 0;
  489. return FLUSH_RETRY_TIMEOUT;
  490. } else {
  491. /*
  492. * descriptor_stat is still BUSY
  493. */
  494. cpu_relax();
  495. }
  496. descriptor_stat = uv2_read_status(mmr_offset, right_shift, cpu);
  497. }
  498. bcp->conseccompletes++;
  499. return FLUSH_COMPLETE;
  500. }
  501. /*
  502. * There are 2 status registers; each and array[32] of 2 bits. Set up for
  503. * which register to read and position in that register based on cpu in
  504. * current hub.
  505. */
  506. static int wait_completion(struct bau_desc *bau_desc,
  507. struct bau_control *bcp, long try)
  508. {
  509. int right_shift;
  510. unsigned long mmr_offset;
  511. int cpu = bcp->uvhub_cpu;
  512. if (cpu < UV_CPUS_PER_AS) {
  513. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  514. right_shift = cpu * UV_ACT_STATUS_SIZE;
  515. } else {
  516. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
  517. right_shift = ((cpu - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
  518. }
  519. if (is_uv1_hub())
  520. return uv1_wait_completion(bau_desc, mmr_offset, right_shift,
  521. bcp, try);
  522. else
  523. return uv2_wait_completion(bau_desc, mmr_offset, right_shift,
  524. bcp, try);
  525. }
  526. static inline cycles_t sec_2_cycles(unsigned long sec)
  527. {
  528. unsigned long ns;
  529. cycles_t cyc;
  530. ns = sec * 1000000000;
  531. cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
  532. return cyc;
  533. }
  534. /*
  535. * Our retries are blocked by all destination sw ack resources being
  536. * in use, and a timeout is pending. In that case hardware immediately
  537. * returns the ERROR that looks like a destination timeout.
  538. */
  539. static void destination_plugged(struct bau_desc *bau_desc,
  540. struct bau_control *bcp,
  541. struct bau_control *hmaster, struct ptc_stats *stat)
  542. {
  543. udelay(bcp->plugged_delay);
  544. bcp->plugged_tries++;
  545. if (bcp->plugged_tries >= bcp->plugsb4reset) {
  546. bcp->plugged_tries = 0;
  547. quiesce_local_uvhub(hmaster);
  548. spin_lock(&hmaster->queue_lock);
  549. reset_with_ipi(&bau_desc->distribution, bcp->cpu);
  550. spin_unlock(&hmaster->queue_lock);
  551. end_uvhub_quiesce(hmaster);
  552. bcp->ipi_attempts++;
  553. stat->s_resets_plug++;
  554. }
  555. }
  556. static void destination_timeout(struct bau_desc *bau_desc,
  557. struct bau_control *bcp, struct bau_control *hmaster,
  558. struct ptc_stats *stat)
  559. {
  560. hmaster->max_concurr = 1;
  561. bcp->timeout_tries++;
  562. if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
  563. bcp->timeout_tries = 0;
  564. quiesce_local_uvhub(hmaster);
  565. spin_lock(&hmaster->queue_lock);
  566. reset_with_ipi(&bau_desc->distribution, bcp->cpu);
  567. spin_unlock(&hmaster->queue_lock);
  568. end_uvhub_quiesce(hmaster);
  569. bcp->ipi_attempts++;
  570. stat->s_resets_timeout++;
  571. }
  572. }
  573. /*
  574. * Completions are taking a very long time due to a congested numalink
  575. * network.
  576. */
  577. static void disable_for_congestion(struct bau_control *bcp,
  578. struct ptc_stats *stat)
  579. {
  580. /* let only one cpu do this disabling */
  581. spin_lock(&disable_lock);
  582. if (!baudisabled && bcp->period_requests &&
  583. ((bcp->period_time / bcp->period_requests) > congested_cycles)) {
  584. int tcpu;
  585. struct bau_control *tbcp;
  586. /* it becomes this cpu's job to turn on the use of the
  587. BAU again */
  588. baudisabled = 1;
  589. bcp->set_bau_off = 1;
  590. bcp->set_bau_on_time = get_cycles();
  591. bcp->set_bau_on_time += sec_2_cycles(bcp->cong_period);
  592. stat->s_bau_disabled++;
  593. for_each_present_cpu(tcpu) {
  594. tbcp = &per_cpu(bau_control, tcpu);
  595. tbcp->baudisabled = 1;
  596. }
  597. }
  598. spin_unlock(&disable_lock);
  599. }
  600. static void count_max_concurr(int stat, struct bau_control *bcp,
  601. struct bau_control *hmaster)
  602. {
  603. bcp->plugged_tries = 0;
  604. bcp->timeout_tries = 0;
  605. if (stat != FLUSH_COMPLETE)
  606. return;
  607. if (bcp->conseccompletes <= bcp->complete_threshold)
  608. return;
  609. if (hmaster->max_concurr >= hmaster->max_concurr_const)
  610. return;
  611. hmaster->max_concurr++;
  612. }
  613. static void record_send_stats(cycles_t time1, cycles_t time2,
  614. struct bau_control *bcp, struct ptc_stats *stat,
  615. int completion_status, int try)
  616. {
  617. cycles_t elapsed;
  618. if (time2 > time1) {
  619. elapsed = time2 - time1;
  620. stat->s_time += elapsed;
  621. if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
  622. bcp->period_requests++;
  623. bcp->period_time += elapsed;
  624. if ((elapsed > congested_cycles) &&
  625. (bcp->period_requests > bcp->cong_reps))
  626. disable_for_congestion(bcp, stat);
  627. }
  628. } else
  629. stat->s_requestor--;
  630. if (completion_status == FLUSH_COMPLETE && try > 1)
  631. stat->s_retriesok++;
  632. else if (completion_status == FLUSH_GIVEUP)
  633. stat->s_giveup++;
  634. }
  635. /*
  636. * Because of a uv1 hardware bug only a limited number of concurrent
  637. * requests can be made.
  638. */
  639. static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
  640. {
  641. spinlock_t *lock = &hmaster->uvhub_lock;
  642. atomic_t *v;
  643. v = &hmaster->active_descriptor_count;
  644. if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
  645. stat->s_throttles++;
  646. do {
  647. cpu_relax();
  648. } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
  649. }
  650. }
  651. /*
  652. * Handle the completion status of a message send.
  653. */
  654. static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
  655. struct bau_control *bcp, struct bau_control *hmaster,
  656. struct ptc_stats *stat)
  657. {
  658. if (completion_status == FLUSH_RETRY_PLUGGED)
  659. destination_plugged(bau_desc, bcp, hmaster, stat);
  660. else if (completion_status == FLUSH_RETRY_TIMEOUT)
  661. destination_timeout(bau_desc, bcp, hmaster, stat);
  662. }
  663. /*
  664. * Send a broadcast and wait for it to complete.
  665. *
  666. * The flush_mask contains the cpus the broadcast is to be sent to including
  667. * cpus that are on the local uvhub.
  668. *
  669. * Returns 0 if all flushing represented in the mask was done.
  670. * Returns 1 if it gives up entirely and the original cpu mask is to be
  671. * returned to the kernel.
  672. */
  673. int uv_flush_send_and_wait(struct bau_desc *bau_desc,
  674. struct cpumask *flush_mask, struct bau_control *bcp)
  675. {
  676. int seq_number = 0;
  677. int completion_stat = 0;
  678. long try = 0;
  679. unsigned long index;
  680. cycles_t time1;
  681. cycles_t time2;
  682. struct ptc_stats *stat = bcp->statp;
  683. struct bau_control *hmaster = bcp->uvhub_master;
  684. if (is_uv1_hub())
  685. uv1_throttle(hmaster, stat);
  686. while (hmaster->uvhub_quiesce)
  687. cpu_relax();
  688. time1 = get_cycles();
  689. do {
  690. if (try == 0) {
  691. bau_desc->header.msg_type = MSG_REGULAR;
  692. seq_number = bcp->message_number++;
  693. } else {
  694. bau_desc->header.msg_type = MSG_RETRY;
  695. stat->s_retry_messages++;
  696. }
  697. bau_desc->header.sequence = seq_number;
  698. index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
  699. bcp->send_message = get_cycles();
  700. write_mmr_activation(index);
  701. try++;
  702. completion_stat = wait_completion(bau_desc, bcp, try);
  703. handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
  704. if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
  705. bcp->ipi_attempts = 0;
  706. completion_stat = FLUSH_GIVEUP;
  707. break;
  708. }
  709. cpu_relax();
  710. } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
  711. (completion_stat == FLUSH_RETRY_TIMEOUT));
  712. time2 = get_cycles();
  713. count_max_concurr(completion_stat, bcp, hmaster);
  714. while (hmaster->uvhub_quiesce)
  715. cpu_relax();
  716. atomic_dec(&hmaster->active_descriptor_count);
  717. record_send_stats(time1, time2, bcp, stat, completion_stat, try);
  718. if (completion_stat == FLUSH_GIVEUP)
  719. return 1;
  720. return 0;
  721. }
  722. /*
  723. * The BAU is disabled. When the disabled time period has expired, the cpu
  724. * that disabled it must re-enable it.
  725. * Return 0 if it is re-enabled for all cpus.
  726. */
  727. static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
  728. {
  729. int tcpu;
  730. struct bau_control *tbcp;
  731. if (bcp->set_bau_off) {
  732. if (get_cycles() >= bcp->set_bau_on_time) {
  733. stat->s_bau_reenabled++;
  734. baudisabled = 0;
  735. for_each_present_cpu(tcpu) {
  736. tbcp = &per_cpu(bau_control, tcpu);
  737. tbcp->baudisabled = 0;
  738. tbcp->period_requests = 0;
  739. tbcp->period_time = 0;
  740. }
  741. return 0;
  742. }
  743. }
  744. return -1;
  745. }
  746. static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
  747. int remotes, struct bau_desc *bau_desc)
  748. {
  749. stat->s_requestor++;
  750. stat->s_ntargcpu += remotes + locals;
  751. stat->s_ntargremotes += remotes;
  752. stat->s_ntarglocals += locals;
  753. /* uvhub statistics */
  754. hubs = bau_uvhub_weight(&bau_desc->distribution);
  755. if (locals) {
  756. stat->s_ntarglocaluvhub++;
  757. stat->s_ntargremoteuvhub += (hubs - 1);
  758. } else
  759. stat->s_ntargremoteuvhub += hubs;
  760. stat->s_ntarguvhub += hubs;
  761. if (hubs >= 16)
  762. stat->s_ntarguvhub16++;
  763. else if (hubs >= 8)
  764. stat->s_ntarguvhub8++;
  765. else if (hubs >= 4)
  766. stat->s_ntarguvhub4++;
  767. else if (hubs >= 2)
  768. stat->s_ntarguvhub2++;
  769. else
  770. stat->s_ntarguvhub1++;
  771. }
  772. /*
  773. * Translate a cpu mask to the uvhub distribution mask in the BAU
  774. * activation descriptor.
  775. */
  776. static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
  777. struct bau_desc *bau_desc, int *localsp, int *remotesp)
  778. {
  779. int cpu;
  780. int pnode;
  781. int cnt = 0;
  782. struct hub_and_pnode *hpp;
  783. for_each_cpu(cpu, flush_mask) {
  784. /*
  785. * The distribution vector is a bit map of pnodes, relative
  786. * to the partition base pnode (and the partition base nasid
  787. * in the header).
  788. * Translate cpu to pnode and hub using a local memory array.
  789. */
  790. hpp = &bcp->socket_master->thp[cpu];
  791. pnode = hpp->pnode - bcp->partition_base_pnode;
  792. bau_uvhub_set(pnode, &bau_desc->distribution);
  793. cnt++;
  794. if (hpp->uvhub == bcp->uvhub)
  795. (*localsp)++;
  796. else
  797. (*remotesp)++;
  798. }
  799. if (!cnt)
  800. return 1;
  801. return 0;
  802. }
  803. /*
  804. * globally purge translation cache of a virtual address or all TLB's
  805. * @cpumask: mask of all cpu's in which the address is to be removed
  806. * @mm: mm_struct containing virtual address range
  807. * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
  808. * @cpu: the current cpu
  809. *
  810. * This is the entry point for initiating any UV global TLB shootdown.
  811. *
  812. * Purges the translation caches of all specified processors of the given
  813. * virtual address, or purges all TLB's on specified processors.
  814. *
  815. * The caller has derived the cpumask from the mm_struct. This function
  816. * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
  817. *
  818. * The cpumask is converted into a uvhubmask of the uvhubs containing
  819. * those cpus.
  820. *
  821. * Note that this function should be called with preemption disabled.
  822. *
  823. * Returns NULL if all remote flushing was done.
  824. * Returns pointer to cpumask if some remote flushing remains to be
  825. * done. The returned pointer is valid till preemption is re-enabled.
  826. */
  827. const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
  828. struct mm_struct *mm, unsigned long va,
  829. unsigned int cpu)
  830. {
  831. int locals = 0;
  832. int remotes = 0;
  833. int hubs = 0;
  834. struct bau_desc *bau_desc;
  835. struct cpumask *flush_mask;
  836. struct ptc_stats *stat;
  837. struct bau_control *bcp;
  838. /* kernel was booted 'nobau' */
  839. if (nobau)
  840. return cpumask;
  841. bcp = &per_cpu(bau_control, cpu);
  842. stat = bcp->statp;
  843. /* bau was disabled due to slow response */
  844. if (bcp->baudisabled) {
  845. if (check_enable(bcp, stat))
  846. return cpumask;
  847. }
  848. /*
  849. * Each sending cpu has a per-cpu mask which it fills from the caller's
  850. * cpu mask. All cpus are converted to uvhubs and copied to the
  851. * activation descriptor.
  852. */
  853. flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
  854. /* don't actually do a shootdown of the local cpu */
  855. cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
  856. if (cpu_isset(cpu, *cpumask))
  857. stat->s_ntargself++;
  858. bau_desc = bcp->descriptor_base;
  859. bau_desc += ITEMS_PER_DESC * bcp->uvhub_cpu;
  860. bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
  861. if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
  862. return NULL;
  863. record_send_statistics(stat, locals, hubs, remotes, bau_desc);
  864. bau_desc->payload.address = va;
  865. bau_desc->payload.sending_cpu = cpu;
  866. /*
  867. * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
  868. * or 1 if it gave up and the original cpumask should be returned.
  869. */
  870. if (!uv_flush_send_and_wait(bau_desc, flush_mask, bcp))
  871. return NULL;
  872. else
  873. return cpumask;
  874. }
  875. /*
  876. * The BAU message interrupt comes here. (registered by set_intr_gate)
  877. * See entry_64.S
  878. *
  879. * We received a broadcast assist message.
  880. *
  881. * Interrupts are disabled; this interrupt could represent
  882. * the receipt of several messages.
  883. *
  884. * All cores/threads on this hub get this interrupt.
  885. * The last one to see it does the software ack.
  886. * (the resource will not be freed until noninterruptable cpus see this
  887. * interrupt; hardware may timeout the s/w ack and reply ERROR)
  888. */
  889. void uv_bau_message_interrupt(struct pt_regs *regs)
  890. {
  891. int count = 0;
  892. cycles_t time_start;
  893. struct bau_pq_entry *msg;
  894. struct bau_control *bcp;
  895. struct ptc_stats *stat;
  896. struct msg_desc msgdesc;
  897. time_start = get_cycles();
  898. bcp = &per_cpu(bau_control, smp_processor_id());
  899. stat = bcp->statp;
  900. msgdesc.queue_first = bcp->queue_first;
  901. msgdesc.queue_last = bcp->queue_last;
  902. msg = bcp->bau_msg_head;
  903. while (msg->swack_vec) {
  904. count++;
  905. msgdesc.msg_slot = msg - msgdesc.queue_first;
  906. msgdesc.swack_slot = ffs(msg->swack_vec) - 1;
  907. msgdesc.msg = msg;
  908. bau_process_message(&msgdesc, bcp);
  909. msg++;
  910. if (msg > msgdesc.queue_last)
  911. msg = msgdesc.queue_first;
  912. bcp->bau_msg_head = msg;
  913. }
  914. stat->d_time += (get_cycles() - time_start);
  915. if (!count)
  916. stat->d_nomsg++;
  917. else if (count > 1)
  918. stat->d_multmsg++;
  919. ack_APIC_irq();
  920. }
  921. /*
  922. * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
  923. * shootdown message timeouts enabled. The timeout does not cause
  924. * an interrupt, but causes an error message to be returned to
  925. * the sender.
  926. */
  927. static void __init enable_timeouts(void)
  928. {
  929. int uvhub;
  930. int nuvhubs;
  931. int pnode;
  932. unsigned long mmr_image;
  933. nuvhubs = uv_num_possible_blades();
  934. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  935. if (!uv_blade_nr_possible_cpus(uvhub))
  936. continue;
  937. pnode = uv_blade_to_pnode(uvhub);
  938. mmr_image = read_mmr_misc_control(pnode);
  939. /*
  940. * Set the timeout period and then lock it in, in three
  941. * steps; captures and locks in the period.
  942. *
  943. * To program the period, the SOFT_ACK_MODE must be off.
  944. */
  945. mmr_image &= ~(1L << SOFTACK_MSHIFT);
  946. write_mmr_misc_control(pnode, mmr_image);
  947. /*
  948. * Set the 4-bit period.
  949. */
  950. mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
  951. mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
  952. write_mmr_misc_control(pnode, mmr_image);
  953. /*
  954. * UV1:
  955. * Subsequent reversals of the timebase bit (3) cause an
  956. * immediate timeout of one or all INTD resources as
  957. * indicated in bits 2:0 (7 causes all of them to timeout).
  958. */
  959. mmr_image |= (1L << SOFTACK_MSHIFT);
  960. if (is_uv2_hub()) {
  961. mmr_image |= (1L << UV2_LEG_SHFT);
  962. mmr_image |= (1L << UV2_EXT_SHFT);
  963. }
  964. write_mmr_misc_control(pnode, mmr_image);
  965. }
  966. }
  967. static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
  968. {
  969. if (*offset < num_possible_cpus())
  970. return offset;
  971. return NULL;
  972. }
  973. static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
  974. {
  975. (*offset)++;
  976. if (*offset < num_possible_cpus())
  977. return offset;
  978. return NULL;
  979. }
  980. static void ptc_seq_stop(struct seq_file *file, void *data)
  981. {
  982. }
  983. static inline unsigned long long usec_2_cycles(unsigned long microsec)
  984. {
  985. unsigned long ns;
  986. unsigned long long cyc;
  987. ns = microsec * 1000;
  988. cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
  989. return cyc;
  990. }
  991. /*
  992. * Display the statistics thru /proc/sgi_uv/ptc_statistics
  993. * 'data' points to the cpu number
  994. * Note: see the descriptions in stat_description[].
  995. */
  996. static int ptc_seq_show(struct seq_file *file, void *data)
  997. {
  998. struct ptc_stats *stat;
  999. int cpu;
  1000. cpu = *(loff_t *)data;
  1001. if (!cpu) {
  1002. seq_printf(file,
  1003. "# cpu sent stime self locals remotes ncpus localhub ");
  1004. seq_printf(file,
  1005. "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
  1006. seq_printf(file,
  1007. "numuvhubs4 numuvhubs2 numuvhubs1 dto retries rok ");
  1008. seq_printf(file,
  1009. "resetp resett giveup sto bz throt swack recv rtime ");
  1010. seq_printf(file,
  1011. "all one mult none retry canc nocan reset rcan ");
  1012. seq_printf(file,
  1013. "disable enable\n");
  1014. }
  1015. if (cpu < num_possible_cpus() && cpu_online(cpu)) {
  1016. stat = &per_cpu(ptcstats, cpu);
  1017. /* source side statistics */
  1018. seq_printf(file,
  1019. "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1020. cpu, stat->s_requestor, cycles_2_us(stat->s_time),
  1021. stat->s_ntargself, stat->s_ntarglocals,
  1022. stat->s_ntargremotes, stat->s_ntargcpu,
  1023. stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
  1024. stat->s_ntarguvhub, stat->s_ntarguvhub16);
  1025. seq_printf(file, "%ld %ld %ld %ld %ld ",
  1026. stat->s_ntarguvhub8, stat->s_ntarguvhub4,
  1027. stat->s_ntarguvhub2, stat->s_ntarguvhub1,
  1028. stat->s_dtimeout);
  1029. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
  1030. stat->s_retry_messages, stat->s_retriesok,
  1031. stat->s_resets_plug, stat->s_resets_timeout,
  1032. stat->s_giveup, stat->s_stimeout,
  1033. stat->s_busy, stat->s_throttles);
  1034. /* destination side statistics */
  1035. seq_printf(file,
  1036. "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1037. read_gmmr_sw_ack(uv_cpu_to_pnode(cpu)),
  1038. stat->d_requestee, cycles_2_us(stat->d_time),
  1039. stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
  1040. stat->d_nomsg, stat->d_retries, stat->d_canceled,
  1041. stat->d_nocanceled, stat->d_resets,
  1042. stat->d_rcanceled);
  1043. seq_printf(file, "%ld %ld\n",
  1044. stat->s_bau_disabled, stat->s_bau_reenabled);
  1045. }
  1046. return 0;
  1047. }
  1048. /*
  1049. * Display the tunables thru debugfs
  1050. */
  1051. static ssize_t tunables_read(struct file *file, char __user *userbuf,
  1052. size_t count, loff_t *ppos)
  1053. {
  1054. char *buf;
  1055. int ret;
  1056. buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d\n",
  1057. "max_concur plugged_delay plugsb4reset",
  1058. "timeoutsb4reset ipi_reset_limit complete_threshold",
  1059. "congested_response_us congested_reps congested_period",
  1060. max_concurr, plugged_delay, plugsb4reset,
  1061. timeoutsb4reset, ipi_reset_limit, complete_threshold,
  1062. congested_respns_us, congested_reps, congested_period);
  1063. if (!buf)
  1064. return -ENOMEM;
  1065. ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
  1066. kfree(buf);
  1067. return ret;
  1068. }
  1069. /*
  1070. * handle a write to /proc/sgi_uv/ptc_statistics
  1071. * -1: reset the statistics
  1072. * 0: display meaning of the statistics
  1073. */
  1074. static ssize_t ptc_proc_write(struct file *file, const char __user *user,
  1075. size_t count, loff_t *data)
  1076. {
  1077. int cpu;
  1078. int i;
  1079. int elements;
  1080. long input_arg;
  1081. char optstr[64];
  1082. struct ptc_stats *stat;
  1083. if (count == 0 || count > sizeof(optstr))
  1084. return -EINVAL;
  1085. if (copy_from_user(optstr, user, count))
  1086. return -EFAULT;
  1087. optstr[count - 1] = '\0';
  1088. if (strict_strtol(optstr, 10, &input_arg) < 0) {
  1089. printk(KERN_DEBUG "%s is invalid\n", optstr);
  1090. return -EINVAL;
  1091. }
  1092. if (input_arg == 0) {
  1093. elements = sizeof(stat_description)/sizeof(*stat_description);
  1094. printk(KERN_DEBUG "# cpu: cpu number\n");
  1095. printk(KERN_DEBUG "Sender statistics:\n");
  1096. for (i = 0; i < elements; i++)
  1097. printk(KERN_DEBUG "%s\n", stat_description[i]);
  1098. } else if (input_arg == -1) {
  1099. for_each_present_cpu(cpu) {
  1100. stat = &per_cpu(ptcstats, cpu);
  1101. memset(stat, 0, sizeof(struct ptc_stats));
  1102. }
  1103. }
  1104. return count;
  1105. }
  1106. static int local_atoi(const char *name)
  1107. {
  1108. int val = 0;
  1109. for (;; name++) {
  1110. switch (*name) {
  1111. case '0' ... '9':
  1112. val = 10*val+(*name-'0');
  1113. break;
  1114. default:
  1115. return val;
  1116. }
  1117. }
  1118. }
  1119. /*
  1120. * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
  1121. * Zero values reset them to defaults.
  1122. */
  1123. static int parse_tunables_write(struct bau_control *bcp, char *instr,
  1124. int count)
  1125. {
  1126. char *p;
  1127. char *q;
  1128. int cnt = 0;
  1129. int val;
  1130. int e = sizeof(tunables) / sizeof(*tunables);
  1131. p = instr + strspn(instr, WHITESPACE);
  1132. q = p;
  1133. for (; *p; p = q + strspn(q, WHITESPACE)) {
  1134. q = p + strcspn(p, WHITESPACE);
  1135. cnt++;
  1136. if (q == p)
  1137. break;
  1138. }
  1139. if (cnt != e) {
  1140. printk(KERN_INFO "bau tunable error: should be %d values\n", e);
  1141. return -EINVAL;
  1142. }
  1143. p = instr + strspn(instr, WHITESPACE);
  1144. q = p;
  1145. for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
  1146. q = p + strcspn(p, WHITESPACE);
  1147. val = local_atoi(p);
  1148. switch (cnt) {
  1149. case 0:
  1150. if (val == 0) {
  1151. max_concurr = MAX_BAU_CONCURRENT;
  1152. max_concurr_const = MAX_BAU_CONCURRENT;
  1153. continue;
  1154. }
  1155. if (val < 1 || val > bcp->cpus_in_uvhub) {
  1156. printk(KERN_DEBUG
  1157. "Error: BAU max concurrent %d is invalid\n",
  1158. val);
  1159. return -EINVAL;
  1160. }
  1161. max_concurr = val;
  1162. max_concurr_const = val;
  1163. continue;
  1164. default:
  1165. if (val == 0)
  1166. *tunables[cnt].tunp = tunables[cnt].deflt;
  1167. else
  1168. *tunables[cnt].tunp = val;
  1169. continue;
  1170. }
  1171. if (q == p)
  1172. break;
  1173. }
  1174. return 0;
  1175. }
  1176. /*
  1177. * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
  1178. */
  1179. static ssize_t tunables_write(struct file *file, const char __user *user,
  1180. size_t count, loff_t *data)
  1181. {
  1182. int cpu;
  1183. int ret;
  1184. char instr[100];
  1185. struct bau_control *bcp;
  1186. if (count == 0 || count > sizeof(instr)-1)
  1187. return -EINVAL;
  1188. if (copy_from_user(instr, user, count))
  1189. return -EFAULT;
  1190. instr[count] = '\0';
  1191. bcp = &per_cpu(bau_control, smp_processor_id());
  1192. ret = parse_tunables_write(bcp, instr, count);
  1193. if (ret)
  1194. return ret;
  1195. for_each_present_cpu(cpu) {
  1196. bcp = &per_cpu(bau_control, cpu);
  1197. bcp->max_concurr = max_concurr;
  1198. bcp->max_concurr_const = max_concurr;
  1199. bcp->plugged_delay = plugged_delay;
  1200. bcp->plugsb4reset = plugsb4reset;
  1201. bcp->timeoutsb4reset = timeoutsb4reset;
  1202. bcp->ipi_reset_limit = ipi_reset_limit;
  1203. bcp->complete_threshold = complete_threshold;
  1204. bcp->cong_response_us = congested_respns_us;
  1205. bcp->cong_reps = congested_reps;
  1206. bcp->cong_period = congested_period;
  1207. }
  1208. return count;
  1209. }
  1210. static const struct seq_operations uv_ptc_seq_ops = {
  1211. .start = ptc_seq_start,
  1212. .next = ptc_seq_next,
  1213. .stop = ptc_seq_stop,
  1214. .show = ptc_seq_show
  1215. };
  1216. static int ptc_proc_open(struct inode *inode, struct file *file)
  1217. {
  1218. return seq_open(file, &uv_ptc_seq_ops);
  1219. }
  1220. static int tunables_open(struct inode *inode, struct file *file)
  1221. {
  1222. return 0;
  1223. }
  1224. static const struct file_operations proc_uv_ptc_operations = {
  1225. .open = ptc_proc_open,
  1226. .read = seq_read,
  1227. .write = ptc_proc_write,
  1228. .llseek = seq_lseek,
  1229. .release = seq_release,
  1230. };
  1231. static const struct file_operations tunables_fops = {
  1232. .open = tunables_open,
  1233. .read = tunables_read,
  1234. .write = tunables_write,
  1235. .llseek = default_llseek,
  1236. };
  1237. static int __init uv_ptc_init(void)
  1238. {
  1239. struct proc_dir_entry *proc_uv_ptc;
  1240. if (!is_uv_system())
  1241. return 0;
  1242. proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
  1243. &proc_uv_ptc_operations);
  1244. if (!proc_uv_ptc) {
  1245. printk(KERN_ERR "unable to create %s proc entry\n",
  1246. UV_PTC_BASENAME);
  1247. return -EINVAL;
  1248. }
  1249. tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
  1250. if (!tunables_dir) {
  1251. printk(KERN_ERR "unable to create debugfs directory %s\n",
  1252. UV_BAU_TUNABLES_DIR);
  1253. return -EINVAL;
  1254. }
  1255. tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
  1256. tunables_dir, NULL, &tunables_fops);
  1257. if (!tunables_file) {
  1258. printk(KERN_ERR "unable to create debugfs file %s\n",
  1259. UV_BAU_TUNABLES_FILE);
  1260. return -EINVAL;
  1261. }
  1262. return 0;
  1263. }
  1264. /*
  1265. * Initialize the sending side's sending buffers.
  1266. */
  1267. static void activation_descriptor_init(int node, int pnode, int base_pnode)
  1268. {
  1269. int i;
  1270. int cpu;
  1271. unsigned long gpa;
  1272. unsigned long m;
  1273. unsigned long n;
  1274. size_t dsize;
  1275. struct bau_desc *bau_desc;
  1276. struct bau_desc *bd2;
  1277. struct bau_control *bcp;
  1278. /*
  1279. * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
  1280. * per cpu; and one per cpu on the uvhub (ADP_SZ)
  1281. */
  1282. dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
  1283. bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
  1284. BUG_ON(!bau_desc);
  1285. gpa = uv_gpa(bau_desc);
  1286. n = uv_gpa_to_gnode(gpa);
  1287. m = uv_gpa_to_offset(gpa);
  1288. /* the 14-bit pnode */
  1289. write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
  1290. /*
  1291. * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
  1292. * cpu even though we only use the first one; one descriptor can
  1293. * describe a broadcast to 256 uv hubs.
  1294. */
  1295. for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
  1296. memset(bd2, 0, sizeof(struct bau_desc));
  1297. bd2->header.swack_flag = 1;
  1298. /*
  1299. * The base_dest_nasid set in the message header is the nasid
  1300. * of the first uvhub in the partition. The bit map will
  1301. * indicate destination pnode numbers relative to that base.
  1302. * They may not be consecutive if nasid striding is being used.
  1303. */
  1304. bd2->header.base_dest_nasid = UV_PNODE_TO_NASID(base_pnode);
  1305. bd2->header.dest_subnodeid = UV_LB_SUBNODEID;
  1306. bd2->header.command = UV_NET_ENDPOINT_INTD;
  1307. bd2->header.int_both = 1;
  1308. /*
  1309. * all others need to be set to zero:
  1310. * fairness chaining multilevel count replied_to
  1311. */
  1312. }
  1313. for_each_present_cpu(cpu) {
  1314. if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
  1315. continue;
  1316. bcp = &per_cpu(bau_control, cpu);
  1317. bcp->descriptor_base = bau_desc;
  1318. }
  1319. }
  1320. /*
  1321. * initialize the destination side's receiving buffers
  1322. * entered for each uvhub in the partition
  1323. * - node is first node (kernel memory notion) on the uvhub
  1324. * - pnode is the uvhub's physical identifier
  1325. */
  1326. static void pq_init(int node, int pnode)
  1327. {
  1328. int cpu;
  1329. size_t plsize;
  1330. char *cp;
  1331. void *vp;
  1332. unsigned long pn;
  1333. unsigned long first;
  1334. unsigned long pn_first;
  1335. unsigned long last;
  1336. struct bau_pq_entry *pqp;
  1337. struct bau_control *bcp;
  1338. plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
  1339. vp = kmalloc_node(plsize, GFP_KERNEL, node);
  1340. pqp = (struct bau_pq_entry *)vp;
  1341. BUG_ON(!pqp);
  1342. cp = (char *)pqp + 31;
  1343. pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
  1344. for_each_present_cpu(cpu) {
  1345. if (pnode != uv_cpu_to_pnode(cpu))
  1346. continue;
  1347. /* for every cpu on this pnode: */
  1348. bcp = &per_cpu(bau_control, cpu);
  1349. bcp->queue_first = pqp;
  1350. bcp->bau_msg_head = pqp;
  1351. bcp->queue_last = pqp + (DEST_Q_SIZE - 1);
  1352. }
  1353. /*
  1354. * need the gnode of where the memory was really allocated
  1355. */
  1356. pn = uv_gpa_to_gnode(uv_gpa(pqp));
  1357. first = uv_physnodeaddr(pqp);
  1358. pn_first = ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | first;
  1359. last = uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1));
  1360. write_mmr_payload_first(pnode, pn_first);
  1361. write_mmr_payload_tail(pnode, first);
  1362. write_mmr_payload_last(pnode, last);
  1363. /* in effect, all msg_type's are set to MSG_NOOP */
  1364. memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
  1365. }
  1366. /*
  1367. * Initialization of each UV hub's structures
  1368. */
  1369. static void __init init_uvhub(int uvhub, int vector, int base_pnode)
  1370. {
  1371. int node;
  1372. int pnode;
  1373. unsigned long apicid;
  1374. node = uvhub_to_first_node(uvhub);
  1375. pnode = uv_blade_to_pnode(uvhub);
  1376. activation_descriptor_init(node, pnode, base_pnode);
  1377. pq_init(node, pnode);
  1378. /*
  1379. * The below initialization can't be in firmware because the
  1380. * messaging IRQ will be determined by the OS.
  1381. */
  1382. apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
  1383. write_mmr_data_config(pnode, ((apicid << 32) | vector));
  1384. }
  1385. /*
  1386. * We will set BAU_MISC_CONTROL with a timeout period.
  1387. * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
  1388. * So the destination timeout period has to be calculated from them.
  1389. */
  1390. static int calculate_destination_timeout(void)
  1391. {
  1392. unsigned long mmr_image;
  1393. int mult1;
  1394. int mult2;
  1395. int index;
  1396. int base;
  1397. int ret;
  1398. unsigned long ts_ns;
  1399. if (is_uv1_hub()) {
  1400. mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
  1401. mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
  1402. index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
  1403. mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
  1404. mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
  1405. base = timeout_base_ns[index];
  1406. ts_ns = base * mult1 * mult2;
  1407. ret = ts_ns / 1000;
  1408. } else {
  1409. /* 4 bits 0/1 for 10/80us base, 3 bits of multiplier */
  1410. mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
  1411. mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
  1412. if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
  1413. base = 80;
  1414. else
  1415. base = 10;
  1416. mult1 = mmr_image & UV2_ACK_MASK;
  1417. ret = mult1 * base;
  1418. }
  1419. return ret;
  1420. }
  1421. static void __init init_per_cpu_tunables(void)
  1422. {
  1423. int cpu;
  1424. struct bau_control *bcp;
  1425. for_each_present_cpu(cpu) {
  1426. bcp = &per_cpu(bau_control, cpu);
  1427. bcp->baudisabled = 0;
  1428. bcp->statp = &per_cpu(ptcstats, cpu);
  1429. /* time interval to catch a hardware stay-busy bug */
  1430. bcp->timeout_interval = usec_2_cycles(2*timeout_us);
  1431. bcp->max_concurr = max_concurr;
  1432. bcp->max_concurr_const = max_concurr;
  1433. bcp->plugged_delay = plugged_delay;
  1434. bcp->plugsb4reset = plugsb4reset;
  1435. bcp->timeoutsb4reset = timeoutsb4reset;
  1436. bcp->ipi_reset_limit = ipi_reset_limit;
  1437. bcp->complete_threshold = complete_threshold;
  1438. bcp->cong_response_us = congested_respns_us;
  1439. bcp->cong_reps = congested_reps;
  1440. bcp->cong_period = congested_period;
  1441. }
  1442. }
  1443. /*
  1444. * Scan all cpus to collect blade and socket summaries.
  1445. */
  1446. static int __init get_cpu_topology(int base_pnode,
  1447. struct uvhub_desc *uvhub_descs,
  1448. unsigned char *uvhub_mask)
  1449. {
  1450. int cpu;
  1451. int pnode;
  1452. int uvhub;
  1453. int socket;
  1454. struct bau_control *bcp;
  1455. struct uvhub_desc *bdp;
  1456. struct socket_desc *sdp;
  1457. for_each_present_cpu(cpu) {
  1458. bcp = &per_cpu(bau_control, cpu);
  1459. memset(bcp, 0, sizeof(struct bau_control));
  1460. pnode = uv_cpu_hub_info(cpu)->pnode;
  1461. if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
  1462. printk(KERN_EMERG
  1463. "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
  1464. cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
  1465. return 1;
  1466. }
  1467. bcp->osnode = cpu_to_node(cpu);
  1468. bcp->partition_base_pnode = base_pnode;
  1469. uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1470. *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
  1471. bdp = &uvhub_descs[uvhub];
  1472. bdp->num_cpus++;
  1473. bdp->uvhub = uvhub;
  1474. bdp->pnode = pnode;
  1475. /* kludge: 'assuming' one node per socket, and assuming that
  1476. disabling a socket just leaves a gap in node numbers */
  1477. socket = bcp->osnode & 1;
  1478. bdp->socket_mask |= (1 << socket);
  1479. sdp = &bdp->socket[socket];
  1480. sdp->cpu_number[sdp->num_cpus] = cpu;
  1481. sdp->num_cpus++;
  1482. if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
  1483. printk(KERN_EMERG "%d cpus per socket invalid\n",
  1484. sdp->num_cpus);
  1485. return 1;
  1486. }
  1487. }
  1488. return 0;
  1489. }
  1490. /*
  1491. * Each socket is to get a local array of pnodes/hubs.
  1492. */
  1493. static void make_per_cpu_thp(struct bau_control *smaster)
  1494. {
  1495. int cpu;
  1496. size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
  1497. smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
  1498. memset(smaster->thp, 0, hpsz);
  1499. for_each_present_cpu(cpu) {
  1500. smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
  1501. smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1502. }
  1503. }
  1504. /*
  1505. * Initialize all the per_cpu information for the cpu's on a given socket,
  1506. * given what has been gathered into the socket_desc struct.
  1507. * And reports the chosen hub and socket masters back to the caller.
  1508. */
  1509. static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
  1510. struct bau_control **smasterp,
  1511. struct bau_control **hmasterp)
  1512. {
  1513. int i;
  1514. int cpu;
  1515. struct bau_control *bcp;
  1516. for (i = 0; i < sdp->num_cpus; i++) {
  1517. cpu = sdp->cpu_number[i];
  1518. bcp = &per_cpu(bau_control, cpu);
  1519. bcp->cpu = cpu;
  1520. if (i == 0) {
  1521. *smasterp = bcp;
  1522. if (!(*hmasterp))
  1523. *hmasterp = bcp;
  1524. }
  1525. bcp->cpus_in_uvhub = bdp->num_cpus;
  1526. bcp->cpus_in_socket = sdp->num_cpus;
  1527. bcp->socket_master = *smasterp;
  1528. bcp->uvhub = bdp->uvhub;
  1529. bcp->uvhub_master = *hmasterp;
  1530. bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->blade_processor_id;
  1531. if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
  1532. printk(KERN_EMERG "%d cpus per uvhub invalid\n",
  1533. bcp->uvhub_cpu);
  1534. return 1;
  1535. }
  1536. }
  1537. return 0;
  1538. }
  1539. /*
  1540. * Summarize the blade and socket topology into the per_cpu structures.
  1541. */
  1542. static int __init summarize_uvhub_sockets(int nuvhubs,
  1543. struct uvhub_desc *uvhub_descs,
  1544. unsigned char *uvhub_mask)
  1545. {
  1546. int socket;
  1547. int uvhub;
  1548. unsigned short socket_mask;
  1549. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1550. struct uvhub_desc *bdp;
  1551. struct bau_control *smaster = NULL;
  1552. struct bau_control *hmaster = NULL;
  1553. if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
  1554. continue;
  1555. bdp = &uvhub_descs[uvhub];
  1556. socket_mask = bdp->socket_mask;
  1557. socket = 0;
  1558. while (socket_mask) {
  1559. struct socket_desc *sdp;
  1560. if ((socket_mask & 1)) {
  1561. sdp = &bdp->socket[socket];
  1562. if (scan_sock(sdp, bdp, &smaster, &hmaster))
  1563. return 1;
  1564. }
  1565. socket++;
  1566. socket_mask = (socket_mask >> 1);
  1567. make_per_cpu_thp(smaster);
  1568. }
  1569. }
  1570. return 0;
  1571. }
  1572. /*
  1573. * initialize the bau_control structure for each cpu
  1574. */
  1575. static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
  1576. {
  1577. unsigned char *uvhub_mask;
  1578. void *vp;
  1579. struct uvhub_desc *uvhub_descs;
  1580. timeout_us = calculate_destination_timeout();
  1581. vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
  1582. uvhub_descs = (struct uvhub_desc *)vp;
  1583. memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
  1584. uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
  1585. if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
  1586. return 1;
  1587. if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
  1588. return 1;
  1589. kfree(uvhub_descs);
  1590. kfree(uvhub_mask);
  1591. init_per_cpu_tunables();
  1592. return 0;
  1593. }
  1594. /*
  1595. * Initialization of BAU-related structures
  1596. */
  1597. static int __init uv_bau_init(void)
  1598. {
  1599. int uvhub;
  1600. int pnode;
  1601. int nuvhubs;
  1602. int cur_cpu;
  1603. int cpus;
  1604. int vector;
  1605. cpumask_var_t *mask;
  1606. if (!is_uv_system())
  1607. return 0;
  1608. if (nobau)
  1609. return 0;
  1610. for_each_possible_cpu(cur_cpu) {
  1611. mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
  1612. zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
  1613. }
  1614. nuvhubs = uv_num_possible_blades();
  1615. spin_lock_init(&disable_lock);
  1616. congested_cycles = usec_2_cycles(congested_respns_us);
  1617. uv_base_pnode = 0x7fffffff;
  1618. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1619. cpus = uv_blade_nr_possible_cpus(uvhub);
  1620. if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
  1621. uv_base_pnode = uv_blade_to_pnode(uvhub);
  1622. }
  1623. enable_timeouts();
  1624. if (init_per_cpu(nuvhubs, uv_base_pnode)) {
  1625. nobau = 1;
  1626. return 0;
  1627. }
  1628. vector = UV_BAU_MESSAGE;
  1629. for_each_possible_blade(uvhub)
  1630. if (uv_blade_nr_possible_cpus(uvhub))
  1631. init_uvhub(uvhub, vector, uv_base_pnode);
  1632. alloc_intr_gate(vector, uv_bau_message_intr1);
  1633. for_each_possible_blade(uvhub) {
  1634. if (uv_blade_nr_possible_cpus(uvhub)) {
  1635. unsigned long val;
  1636. unsigned long mmr;
  1637. pnode = uv_blade_to_pnode(uvhub);
  1638. /* INIT the bau */
  1639. val = 1L << 63;
  1640. write_gmmr_activation(pnode, val);
  1641. mmr = 1; /* should be 1 to broadcast to both sockets */
  1642. write_mmr_data_broadcast(pnode, mmr);
  1643. }
  1644. }
  1645. return 0;
  1646. }
  1647. core_initcall(uv_bau_init);
  1648. fs_initcall(uv_ptc_init);