aesni-intel_glue.c 39 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/crypto.h>
  24. #include <linux/err.h>
  25. #include <crypto/algapi.h>
  26. #include <crypto/aes.h>
  27. #include <crypto/cryptd.h>
  28. #include <crypto/ctr.h>
  29. #include <asm/i387.h>
  30. #include <asm/aes.h>
  31. #include <crypto/scatterwalk.h>
  32. #include <crypto/internal/aead.h>
  33. #include <linux/workqueue.h>
  34. #include <linux/spinlock.h>
  35. #if defined(CONFIG_CRYPTO_CTR) || defined(CONFIG_CRYPTO_CTR_MODULE)
  36. #define HAS_CTR
  37. #endif
  38. #if defined(CONFIG_CRYPTO_LRW) || defined(CONFIG_CRYPTO_LRW_MODULE)
  39. #define HAS_LRW
  40. #endif
  41. #if defined(CONFIG_CRYPTO_PCBC) || defined(CONFIG_CRYPTO_PCBC_MODULE)
  42. #define HAS_PCBC
  43. #endif
  44. #if defined(CONFIG_CRYPTO_XTS) || defined(CONFIG_CRYPTO_XTS_MODULE)
  45. #define HAS_XTS
  46. #endif
  47. struct async_aes_ctx {
  48. struct cryptd_ablkcipher *cryptd_tfm;
  49. };
  50. /* This data is stored at the end of the crypto_tfm struct.
  51. * It's a type of per "session" data storage location.
  52. * This needs to be 16 byte aligned.
  53. */
  54. struct aesni_rfc4106_gcm_ctx {
  55. u8 hash_subkey[16];
  56. struct crypto_aes_ctx aes_key_expanded;
  57. u8 nonce[4];
  58. struct cryptd_aead *cryptd_tfm;
  59. };
  60. struct aesni_gcm_set_hash_subkey_result {
  61. int err;
  62. struct completion completion;
  63. };
  64. struct aesni_hash_subkey_req_data {
  65. u8 iv[16];
  66. struct aesni_gcm_set_hash_subkey_result result;
  67. struct scatterlist sg;
  68. };
  69. #define AESNI_ALIGN (16)
  70. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE-1))
  71. #define RFC4106_HASH_SUBKEY_SIZE 16
  72. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  73. unsigned int key_len);
  74. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  75. const u8 *in);
  76. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  77. const u8 *in);
  78. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  79. const u8 *in, unsigned int len);
  80. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  81. const u8 *in, unsigned int len);
  82. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  83. const u8 *in, unsigned int len, u8 *iv);
  84. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  85. const u8 *in, unsigned int len, u8 *iv);
  86. int crypto_fpu_init(void);
  87. void crypto_fpu_exit(void);
  88. #ifdef CONFIG_X86_64
  89. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  90. const u8 *in, unsigned int len, u8 *iv);
  91. /* asmlinkage void aesni_gcm_enc()
  92. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  93. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  94. * const u8 *in, Plaintext input
  95. * unsigned long plaintext_len, Length of data in bytes for encryption.
  96. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  97. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  98. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  99. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  100. * const u8 *aad, Additional Authentication Data (AAD)
  101. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this
  102. * is going to be 8 or 12 bytes
  103. * u8 *auth_tag, Authenticated Tag output.
  104. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  105. * Valid values are 16 (most likely), 12 or 8.
  106. */
  107. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  108. const u8 *in, unsigned long plaintext_len, u8 *iv,
  109. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  110. u8 *auth_tag, unsigned long auth_tag_len);
  111. /* asmlinkage void aesni_gcm_dec()
  112. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  113. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  114. * const u8 *in, Ciphertext input
  115. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  116. * u8 *iv, Pre-counter block j0: 4 byte salt (from Security Association)
  117. * concatenated with 8 byte Initialisation Vector (from IPSec ESP
  118. * Payload) concatenated with 0x00000001. 16-byte aligned pointer.
  119. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  120. * const u8 *aad, Additional Authentication Data (AAD)
  121. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  122. * to be 8 or 12 bytes
  123. * u8 *auth_tag, Authenticated Tag output.
  124. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  125. * Valid values are 16 (most likely), 12 or 8.
  126. */
  127. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  128. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  129. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  130. u8 *auth_tag, unsigned long auth_tag_len);
  131. static inline struct
  132. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  133. {
  134. return
  135. (struct aesni_rfc4106_gcm_ctx *)
  136. PTR_ALIGN((u8 *)
  137. crypto_tfm_ctx(crypto_aead_tfm(tfm)), AESNI_ALIGN);
  138. }
  139. #endif
  140. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  141. {
  142. unsigned long addr = (unsigned long)raw_ctx;
  143. unsigned long align = AESNI_ALIGN;
  144. if (align <= crypto_tfm_ctx_alignment())
  145. align = 1;
  146. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  147. }
  148. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  149. const u8 *in_key, unsigned int key_len)
  150. {
  151. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  152. u32 *flags = &tfm->crt_flags;
  153. int err;
  154. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  155. key_len != AES_KEYSIZE_256) {
  156. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  157. return -EINVAL;
  158. }
  159. if (!irq_fpu_usable())
  160. err = crypto_aes_expand_key(ctx, in_key, key_len);
  161. else {
  162. kernel_fpu_begin();
  163. err = aesni_set_key(ctx, in_key, key_len);
  164. kernel_fpu_end();
  165. }
  166. return err;
  167. }
  168. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  169. unsigned int key_len)
  170. {
  171. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  172. }
  173. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  174. {
  175. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  176. if (!irq_fpu_usable())
  177. crypto_aes_encrypt_x86(ctx, dst, src);
  178. else {
  179. kernel_fpu_begin();
  180. aesni_enc(ctx, dst, src);
  181. kernel_fpu_end();
  182. }
  183. }
  184. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  185. {
  186. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  187. if (!irq_fpu_usable())
  188. crypto_aes_decrypt_x86(ctx, dst, src);
  189. else {
  190. kernel_fpu_begin();
  191. aesni_dec(ctx, dst, src);
  192. kernel_fpu_end();
  193. }
  194. }
  195. static struct crypto_alg aesni_alg = {
  196. .cra_name = "aes",
  197. .cra_driver_name = "aes-aesni",
  198. .cra_priority = 300,
  199. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  200. .cra_blocksize = AES_BLOCK_SIZE,
  201. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  202. .cra_alignmask = 0,
  203. .cra_module = THIS_MODULE,
  204. .cra_list = LIST_HEAD_INIT(aesni_alg.cra_list),
  205. .cra_u = {
  206. .cipher = {
  207. .cia_min_keysize = AES_MIN_KEY_SIZE,
  208. .cia_max_keysize = AES_MAX_KEY_SIZE,
  209. .cia_setkey = aes_set_key,
  210. .cia_encrypt = aes_encrypt,
  211. .cia_decrypt = aes_decrypt
  212. }
  213. }
  214. };
  215. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  216. {
  217. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  218. aesni_enc(ctx, dst, src);
  219. }
  220. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  221. {
  222. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  223. aesni_dec(ctx, dst, src);
  224. }
  225. static struct crypto_alg __aesni_alg = {
  226. .cra_name = "__aes-aesni",
  227. .cra_driver_name = "__driver-aes-aesni",
  228. .cra_priority = 0,
  229. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  230. .cra_blocksize = AES_BLOCK_SIZE,
  231. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  232. .cra_alignmask = 0,
  233. .cra_module = THIS_MODULE,
  234. .cra_list = LIST_HEAD_INIT(__aesni_alg.cra_list),
  235. .cra_u = {
  236. .cipher = {
  237. .cia_min_keysize = AES_MIN_KEY_SIZE,
  238. .cia_max_keysize = AES_MAX_KEY_SIZE,
  239. .cia_setkey = aes_set_key,
  240. .cia_encrypt = __aes_encrypt,
  241. .cia_decrypt = __aes_decrypt
  242. }
  243. }
  244. };
  245. static int ecb_encrypt(struct blkcipher_desc *desc,
  246. struct scatterlist *dst, struct scatterlist *src,
  247. unsigned int nbytes)
  248. {
  249. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  250. struct blkcipher_walk walk;
  251. int err;
  252. blkcipher_walk_init(&walk, dst, src, nbytes);
  253. err = blkcipher_walk_virt(desc, &walk);
  254. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  255. kernel_fpu_begin();
  256. while ((nbytes = walk.nbytes)) {
  257. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  258. nbytes & AES_BLOCK_MASK);
  259. nbytes &= AES_BLOCK_SIZE - 1;
  260. err = blkcipher_walk_done(desc, &walk, nbytes);
  261. }
  262. kernel_fpu_end();
  263. return err;
  264. }
  265. static int ecb_decrypt(struct blkcipher_desc *desc,
  266. struct scatterlist *dst, struct scatterlist *src,
  267. unsigned int nbytes)
  268. {
  269. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  270. struct blkcipher_walk walk;
  271. int err;
  272. blkcipher_walk_init(&walk, dst, src, nbytes);
  273. err = blkcipher_walk_virt(desc, &walk);
  274. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  275. kernel_fpu_begin();
  276. while ((nbytes = walk.nbytes)) {
  277. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  278. nbytes & AES_BLOCK_MASK);
  279. nbytes &= AES_BLOCK_SIZE - 1;
  280. err = blkcipher_walk_done(desc, &walk, nbytes);
  281. }
  282. kernel_fpu_end();
  283. return err;
  284. }
  285. static struct crypto_alg blk_ecb_alg = {
  286. .cra_name = "__ecb-aes-aesni",
  287. .cra_driver_name = "__driver-ecb-aes-aesni",
  288. .cra_priority = 0,
  289. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  290. .cra_blocksize = AES_BLOCK_SIZE,
  291. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  292. .cra_alignmask = 0,
  293. .cra_type = &crypto_blkcipher_type,
  294. .cra_module = THIS_MODULE,
  295. .cra_list = LIST_HEAD_INIT(blk_ecb_alg.cra_list),
  296. .cra_u = {
  297. .blkcipher = {
  298. .min_keysize = AES_MIN_KEY_SIZE,
  299. .max_keysize = AES_MAX_KEY_SIZE,
  300. .setkey = aes_set_key,
  301. .encrypt = ecb_encrypt,
  302. .decrypt = ecb_decrypt,
  303. },
  304. },
  305. };
  306. static int cbc_encrypt(struct blkcipher_desc *desc,
  307. struct scatterlist *dst, struct scatterlist *src,
  308. unsigned int nbytes)
  309. {
  310. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  311. struct blkcipher_walk walk;
  312. int err;
  313. blkcipher_walk_init(&walk, dst, src, nbytes);
  314. err = blkcipher_walk_virt(desc, &walk);
  315. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  316. kernel_fpu_begin();
  317. while ((nbytes = walk.nbytes)) {
  318. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  319. nbytes & AES_BLOCK_MASK, walk.iv);
  320. nbytes &= AES_BLOCK_SIZE - 1;
  321. err = blkcipher_walk_done(desc, &walk, nbytes);
  322. }
  323. kernel_fpu_end();
  324. return err;
  325. }
  326. static int cbc_decrypt(struct blkcipher_desc *desc,
  327. struct scatterlist *dst, struct scatterlist *src,
  328. unsigned int nbytes)
  329. {
  330. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  331. struct blkcipher_walk walk;
  332. int err;
  333. blkcipher_walk_init(&walk, dst, src, nbytes);
  334. err = blkcipher_walk_virt(desc, &walk);
  335. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  336. kernel_fpu_begin();
  337. while ((nbytes = walk.nbytes)) {
  338. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  339. nbytes & AES_BLOCK_MASK, walk.iv);
  340. nbytes &= AES_BLOCK_SIZE - 1;
  341. err = blkcipher_walk_done(desc, &walk, nbytes);
  342. }
  343. kernel_fpu_end();
  344. return err;
  345. }
  346. static struct crypto_alg blk_cbc_alg = {
  347. .cra_name = "__cbc-aes-aesni",
  348. .cra_driver_name = "__driver-cbc-aes-aesni",
  349. .cra_priority = 0,
  350. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  351. .cra_blocksize = AES_BLOCK_SIZE,
  352. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  353. .cra_alignmask = 0,
  354. .cra_type = &crypto_blkcipher_type,
  355. .cra_module = THIS_MODULE,
  356. .cra_list = LIST_HEAD_INIT(blk_cbc_alg.cra_list),
  357. .cra_u = {
  358. .blkcipher = {
  359. .min_keysize = AES_MIN_KEY_SIZE,
  360. .max_keysize = AES_MAX_KEY_SIZE,
  361. .setkey = aes_set_key,
  362. .encrypt = cbc_encrypt,
  363. .decrypt = cbc_decrypt,
  364. },
  365. },
  366. };
  367. #ifdef CONFIG_X86_64
  368. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  369. struct blkcipher_walk *walk)
  370. {
  371. u8 *ctrblk = walk->iv;
  372. u8 keystream[AES_BLOCK_SIZE];
  373. u8 *src = walk->src.virt.addr;
  374. u8 *dst = walk->dst.virt.addr;
  375. unsigned int nbytes = walk->nbytes;
  376. aesni_enc(ctx, keystream, ctrblk);
  377. crypto_xor(keystream, src, nbytes);
  378. memcpy(dst, keystream, nbytes);
  379. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  380. }
  381. static int ctr_crypt(struct blkcipher_desc *desc,
  382. struct scatterlist *dst, struct scatterlist *src,
  383. unsigned int nbytes)
  384. {
  385. struct crypto_aes_ctx *ctx = aes_ctx(crypto_blkcipher_ctx(desc->tfm));
  386. struct blkcipher_walk walk;
  387. int err;
  388. blkcipher_walk_init(&walk, dst, src, nbytes);
  389. err = blkcipher_walk_virt_block(desc, &walk, AES_BLOCK_SIZE);
  390. desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
  391. kernel_fpu_begin();
  392. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  393. aesni_ctr_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  394. nbytes & AES_BLOCK_MASK, walk.iv);
  395. nbytes &= AES_BLOCK_SIZE - 1;
  396. err = blkcipher_walk_done(desc, &walk, nbytes);
  397. }
  398. if (walk.nbytes) {
  399. ctr_crypt_final(ctx, &walk);
  400. err = blkcipher_walk_done(desc, &walk, 0);
  401. }
  402. kernel_fpu_end();
  403. return err;
  404. }
  405. static struct crypto_alg blk_ctr_alg = {
  406. .cra_name = "__ctr-aes-aesni",
  407. .cra_driver_name = "__driver-ctr-aes-aesni",
  408. .cra_priority = 0,
  409. .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER,
  410. .cra_blocksize = 1,
  411. .cra_ctxsize = sizeof(struct crypto_aes_ctx)+AESNI_ALIGN-1,
  412. .cra_alignmask = 0,
  413. .cra_type = &crypto_blkcipher_type,
  414. .cra_module = THIS_MODULE,
  415. .cra_list = LIST_HEAD_INIT(blk_ctr_alg.cra_list),
  416. .cra_u = {
  417. .blkcipher = {
  418. .min_keysize = AES_MIN_KEY_SIZE,
  419. .max_keysize = AES_MAX_KEY_SIZE,
  420. .ivsize = AES_BLOCK_SIZE,
  421. .setkey = aes_set_key,
  422. .encrypt = ctr_crypt,
  423. .decrypt = ctr_crypt,
  424. },
  425. },
  426. };
  427. #endif
  428. static int ablk_set_key(struct crypto_ablkcipher *tfm, const u8 *key,
  429. unsigned int key_len)
  430. {
  431. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  432. struct crypto_ablkcipher *child = &ctx->cryptd_tfm->base;
  433. int err;
  434. crypto_ablkcipher_clear_flags(child, CRYPTO_TFM_REQ_MASK);
  435. crypto_ablkcipher_set_flags(child, crypto_ablkcipher_get_flags(tfm)
  436. & CRYPTO_TFM_REQ_MASK);
  437. err = crypto_ablkcipher_setkey(child, key, key_len);
  438. crypto_ablkcipher_set_flags(tfm, crypto_ablkcipher_get_flags(child)
  439. & CRYPTO_TFM_RES_MASK);
  440. return err;
  441. }
  442. static int ablk_encrypt(struct ablkcipher_request *req)
  443. {
  444. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  445. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  446. if (!irq_fpu_usable()) {
  447. struct ablkcipher_request *cryptd_req =
  448. ablkcipher_request_ctx(req);
  449. memcpy(cryptd_req, req, sizeof(*req));
  450. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  451. return crypto_ablkcipher_encrypt(cryptd_req);
  452. } else {
  453. struct blkcipher_desc desc;
  454. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  455. desc.info = req->info;
  456. desc.flags = 0;
  457. return crypto_blkcipher_crt(desc.tfm)->encrypt(
  458. &desc, req->dst, req->src, req->nbytes);
  459. }
  460. }
  461. static int ablk_decrypt(struct ablkcipher_request *req)
  462. {
  463. struct crypto_ablkcipher *tfm = crypto_ablkcipher_reqtfm(req);
  464. struct async_aes_ctx *ctx = crypto_ablkcipher_ctx(tfm);
  465. if (!irq_fpu_usable()) {
  466. struct ablkcipher_request *cryptd_req =
  467. ablkcipher_request_ctx(req);
  468. memcpy(cryptd_req, req, sizeof(*req));
  469. ablkcipher_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  470. return crypto_ablkcipher_decrypt(cryptd_req);
  471. } else {
  472. struct blkcipher_desc desc;
  473. desc.tfm = cryptd_ablkcipher_child(ctx->cryptd_tfm);
  474. desc.info = req->info;
  475. desc.flags = 0;
  476. return crypto_blkcipher_crt(desc.tfm)->decrypt(
  477. &desc, req->dst, req->src, req->nbytes);
  478. }
  479. }
  480. static void ablk_exit(struct crypto_tfm *tfm)
  481. {
  482. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  483. cryptd_free_ablkcipher(ctx->cryptd_tfm);
  484. }
  485. static void ablk_init_common(struct crypto_tfm *tfm,
  486. struct cryptd_ablkcipher *cryptd_tfm)
  487. {
  488. struct async_aes_ctx *ctx = crypto_tfm_ctx(tfm);
  489. ctx->cryptd_tfm = cryptd_tfm;
  490. tfm->crt_ablkcipher.reqsize = sizeof(struct ablkcipher_request) +
  491. crypto_ablkcipher_reqsize(&cryptd_tfm->base);
  492. }
  493. static int ablk_ecb_init(struct crypto_tfm *tfm)
  494. {
  495. struct cryptd_ablkcipher *cryptd_tfm;
  496. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ecb-aes-aesni", 0, 0);
  497. if (IS_ERR(cryptd_tfm))
  498. return PTR_ERR(cryptd_tfm);
  499. ablk_init_common(tfm, cryptd_tfm);
  500. return 0;
  501. }
  502. static struct crypto_alg ablk_ecb_alg = {
  503. .cra_name = "ecb(aes)",
  504. .cra_driver_name = "ecb-aes-aesni",
  505. .cra_priority = 400,
  506. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  507. .cra_blocksize = AES_BLOCK_SIZE,
  508. .cra_ctxsize = sizeof(struct async_aes_ctx),
  509. .cra_alignmask = 0,
  510. .cra_type = &crypto_ablkcipher_type,
  511. .cra_module = THIS_MODULE,
  512. .cra_list = LIST_HEAD_INIT(ablk_ecb_alg.cra_list),
  513. .cra_init = ablk_ecb_init,
  514. .cra_exit = ablk_exit,
  515. .cra_u = {
  516. .ablkcipher = {
  517. .min_keysize = AES_MIN_KEY_SIZE,
  518. .max_keysize = AES_MAX_KEY_SIZE,
  519. .setkey = ablk_set_key,
  520. .encrypt = ablk_encrypt,
  521. .decrypt = ablk_decrypt,
  522. },
  523. },
  524. };
  525. static int ablk_cbc_init(struct crypto_tfm *tfm)
  526. {
  527. struct cryptd_ablkcipher *cryptd_tfm;
  528. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-cbc-aes-aesni", 0, 0);
  529. if (IS_ERR(cryptd_tfm))
  530. return PTR_ERR(cryptd_tfm);
  531. ablk_init_common(tfm, cryptd_tfm);
  532. return 0;
  533. }
  534. static struct crypto_alg ablk_cbc_alg = {
  535. .cra_name = "cbc(aes)",
  536. .cra_driver_name = "cbc-aes-aesni",
  537. .cra_priority = 400,
  538. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  539. .cra_blocksize = AES_BLOCK_SIZE,
  540. .cra_ctxsize = sizeof(struct async_aes_ctx),
  541. .cra_alignmask = 0,
  542. .cra_type = &crypto_ablkcipher_type,
  543. .cra_module = THIS_MODULE,
  544. .cra_list = LIST_HEAD_INIT(ablk_cbc_alg.cra_list),
  545. .cra_init = ablk_cbc_init,
  546. .cra_exit = ablk_exit,
  547. .cra_u = {
  548. .ablkcipher = {
  549. .min_keysize = AES_MIN_KEY_SIZE,
  550. .max_keysize = AES_MAX_KEY_SIZE,
  551. .ivsize = AES_BLOCK_SIZE,
  552. .setkey = ablk_set_key,
  553. .encrypt = ablk_encrypt,
  554. .decrypt = ablk_decrypt,
  555. },
  556. },
  557. };
  558. #ifdef CONFIG_X86_64
  559. static int ablk_ctr_init(struct crypto_tfm *tfm)
  560. {
  561. struct cryptd_ablkcipher *cryptd_tfm;
  562. cryptd_tfm = cryptd_alloc_ablkcipher("__driver-ctr-aes-aesni", 0, 0);
  563. if (IS_ERR(cryptd_tfm))
  564. return PTR_ERR(cryptd_tfm);
  565. ablk_init_common(tfm, cryptd_tfm);
  566. return 0;
  567. }
  568. static struct crypto_alg ablk_ctr_alg = {
  569. .cra_name = "ctr(aes)",
  570. .cra_driver_name = "ctr-aes-aesni",
  571. .cra_priority = 400,
  572. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  573. .cra_blocksize = 1,
  574. .cra_ctxsize = sizeof(struct async_aes_ctx),
  575. .cra_alignmask = 0,
  576. .cra_type = &crypto_ablkcipher_type,
  577. .cra_module = THIS_MODULE,
  578. .cra_list = LIST_HEAD_INIT(ablk_ctr_alg.cra_list),
  579. .cra_init = ablk_ctr_init,
  580. .cra_exit = ablk_exit,
  581. .cra_u = {
  582. .ablkcipher = {
  583. .min_keysize = AES_MIN_KEY_SIZE,
  584. .max_keysize = AES_MAX_KEY_SIZE,
  585. .ivsize = AES_BLOCK_SIZE,
  586. .setkey = ablk_set_key,
  587. .encrypt = ablk_encrypt,
  588. .decrypt = ablk_encrypt,
  589. .geniv = "chainiv",
  590. },
  591. },
  592. };
  593. #ifdef HAS_CTR
  594. static int ablk_rfc3686_ctr_init(struct crypto_tfm *tfm)
  595. {
  596. struct cryptd_ablkcipher *cryptd_tfm;
  597. cryptd_tfm = cryptd_alloc_ablkcipher(
  598. "rfc3686(__driver-ctr-aes-aesni)", 0, 0);
  599. if (IS_ERR(cryptd_tfm))
  600. return PTR_ERR(cryptd_tfm);
  601. ablk_init_common(tfm, cryptd_tfm);
  602. return 0;
  603. }
  604. static struct crypto_alg ablk_rfc3686_ctr_alg = {
  605. .cra_name = "rfc3686(ctr(aes))",
  606. .cra_driver_name = "rfc3686-ctr-aes-aesni",
  607. .cra_priority = 400,
  608. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  609. .cra_blocksize = 1,
  610. .cra_ctxsize = sizeof(struct async_aes_ctx),
  611. .cra_alignmask = 0,
  612. .cra_type = &crypto_ablkcipher_type,
  613. .cra_module = THIS_MODULE,
  614. .cra_list = LIST_HEAD_INIT(ablk_rfc3686_ctr_alg.cra_list),
  615. .cra_init = ablk_rfc3686_ctr_init,
  616. .cra_exit = ablk_exit,
  617. .cra_u = {
  618. .ablkcipher = {
  619. .min_keysize = AES_MIN_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
  620. .max_keysize = AES_MAX_KEY_SIZE+CTR_RFC3686_NONCE_SIZE,
  621. .ivsize = CTR_RFC3686_IV_SIZE,
  622. .setkey = ablk_set_key,
  623. .encrypt = ablk_encrypt,
  624. .decrypt = ablk_decrypt,
  625. .geniv = "seqiv",
  626. },
  627. },
  628. };
  629. #endif
  630. #endif
  631. #ifdef HAS_LRW
  632. static int ablk_lrw_init(struct crypto_tfm *tfm)
  633. {
  634. struct cryptd_ablkcipher *cryptd_tfm;
  635. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(lrw(__driver-aes-aesni))",
  636. 0, 0);
  637. if (IS_ERR(cryptd_tfm))
  638. return PTR_ERR(cryptd_tfm);
  639. ablk_init_common(tfm, cryptd_tfm);
  640. return 0;
  641. }
  642. static struct crypto_alg ablk_lrw_alg = {
  643. .cra_name = "lrw(aes)",
  644. .cra_driver_name = "lrw-aes-aesni",
  645. .cra_priority = 400,
  646. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  647. .cra_blocksize = AES_BLOCK_SIZE,
  648. .cra_ctxsize = sizeof(struct async_aes_ctx),
  649. .cra_alignmask = 0,
  650. .cra_type = &crypto_ablkcipher_type,
  651. .cra_module = THIS_MODULE,
  652. .cra_list = LIST_HEAD_INIT(ablk_lrw_alg.cra_list),
  653. .cra_init = ablk_lrw_init,
  654. .cra_exit = ablk_exit,
  655. .cra_u = {
  656. .ablkcipher = {
  657. .min_keysize = AES_MIN_KEY_SIZE + AES_BLOCK_SIZE,
  658. .max_keysize = AES_MAX_KEY_SIZE + AES_BLOCK_SIZE,
  659. .ivsize = AES_BLOCK_SIZE,
  660. .setkey = ablk_set_key,
  661. .encrypt = ablk_encrypt,
  662. .decrypt = ablk_decrypt,
  663. },
  664. },
  665. };
  666. #endif
  667. #ifdef HAS_PCBC
  668. static int ablk_pcbc_init(struct crypto_tfm *tfm)
  669. {
  670. struct cryptd_ablkcipher *cryptd_tfm;
  671. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(pcbc(__driver-aes-aesni))",
  672. 0, 0);
  673. if (IS_ERR(cryptd_tfm))
  674. return PTR_ERR(cryptd_tfm);
  675. ablk_init_common(tfm, cryptd_tfm);
  676. return 0;
  677. }
  678. static struct crypto_alg ablk_pcbc_alg = {
  679. .cra_name = "pcbc(aes)",
  680. .cra_driver_name = "pcbc-aes-aesni",
  681. .cra_priority = 400,
  682. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  683. .cra_blocksize = AES_BLOCK_SIZE,
  684. .cra_ctxsize = sizeof(struct async_aes_ctx),
  685. .cra_alignmask = 0,
  686. .cra_type = &crypto_ablkcipher_type,
  687. .cra_module = THIS_MODULE,
  688. .cra_list = LIST_HEAD_INIT(ablk_pcbc_alg.cra_list),
  689. .cra_init = ablk_pcbc_init,
  690. .cra_exit = ablk_exit,
  691. .cra_u = {
  692. .ablkcipher = {
  693. .min_keysize = AES_MIN_KEY_SIZE,
  694. .max_keysize = AES_MAX_KEY_SIZE,
  695. .ivsize = AES_BLOCK_SIZE,
  696. .setkey = ablk_set_key,
  697. .encrypt = ablk_encrypt,
  698. .decrypt = ablk_decrypt,
  699. },
  700. },
  701. };
  702. #endif
  703. #ifdef HAS_XTS
  704. static int ablk_xts_init(struct crypto_tfm *tfm)
  705. {
  706. struct cryptd_ablkcipher *cryptd_tfm;
  707. cryptd_tfm = cryptd_alloc_ablkcipher("fpu(xts(__driver-aes-aesni))",
  708. 0, 0);
  709. if (IS_ERR(cryptd_tfm))
  710. return PTR_ERR(cryptd_tfm);
  711. ablk_init_common(tfm, cryptd_tfm);
  712. return 0;
  713. }
  714. static struct crypto_alg ablk_xts_alg = {
  715. .cra_name = "xts(aes)",
  716. .cra_driver_name = "xts-aes-aesni",
  717. .cra_priority = 400,
  718. .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
  719. .cra_blocksize = AES_BLOCK_SIZE,
  720. .cra_ctxsize = sizeof(struct async_aes_ctx),
  721. .cra_alignmask = 0,
  722. .cra_type = &crypto_ablkcipher_type,
  723. .cra_module = THIS_MODULE,
  724. .cra_list = LIST_HEAD_INIT(ablk_xts_alg.cra_list),
  725. .cra_init = ablk_xts_init,
  726. .cra_exit = ablk_exit,
  727. .cra_u = {
  728. .ablkcipher = {
  729. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  730. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  731. .ivsize = AES_BLOCK_SIZE,
  732. .setkey = ablk_set_key,
  733. .encrypt = ablk_encrypt,
  734. .decrypt = ablk_decrypt,
  735. },
  736. },
  737. };
  738. #endif
  739. #ifdef CONFIG_X86_64
  740. static int rfc4106_init(struct crypto_tfm *tfm)
  741. {
  742. struct cryptd_aead *cryptd_tfm;
  743. struct aesni_rfc4106_gcm_ctx *ctx = (struct aesni_rfc4106_gcm_ctx *)
  744. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  745. struct crypto_aead *cryptd_child;
  746. struct aesni_rfc4106_gcm_ctx *child_ctx;
  747. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni", 0, 0);
  748. if (IS_ERR(cryptd_tfm))
  749. return PTR_ERR(cryptd_tfm);
  750. cryptd_child = cryptd_aead_child(cryptd_tfm);
  751. child_ctx = aesni_rfc4106_gcm_ctx_get(cryptd_child);
  752. memcpy(child_ctx, ctx, sizeof(*ctx));
  753. ctx->cryptd_tfm = cryptd_tfm;
  754. tfm->crt_aead.reqsize = sizeof(struct aead_request)
  755. + crypto_aead_reqsize(&cryptd_tfm->base);
  756. return 0;
  757. }
  758. static void rfc4106_exit(struct crypto_tfm *tfm)
  759. {
  760. struct aesni_rfc4106_gcm_ctx *ctx =
  761. (struct aesni_rfc4106_gcm_ctx *)
  762. PTR_ALIGN((u8 *)crypto_tfm_ctx(tfm), AESNI_ALIGN);
  763. if (!IS_ERR(ctx->cryptd_tfm))
  764. cryptd_free_aead(ctx->cryptd_tfm);
  765. return;
  766. }
  767. static void
  768. rfc4106_set_hash_subkey_done(struct crypto_async_request *req, int err)
  769. {
  770. struct aesni_gcm_set_hash_subkey_result *result = req->data;
  771. if (err == -EINPROGRESS)
  772. return;
  773. result->err = err;
  774. complete(&result->completion);
  775. }
  776. static int
  777. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  778. {
  779. struct crypto_ablkcipher *ctr_tfm;
  780. struct ablkcipher_request *req;
  781. int ret = -EINVAL;
  782. struct aesni_hash_subkey_req_data *req_data;
  783. ctr_tfm = crypto_alloc_ablkcipher("ctr(aes)", 0, 0);
  784. if (IS_ERR(ctr_tfm))
  785. return PTR_ERR(ctr_tfm);
  786. crypto_ablkcipher_clear_flags(ctr_tfm, ~0);
  787. ret = crypto_ablkcipher_setkey(ctr_tfm, key, key_len);
  788. if (ret)
  789. goto out_free_ablkcipher;
  790. ret = -ENOMEM;
  791. req = ablkcipher_request_alloc(ctr_tfm, GFP_KERNEL);
  792. if (!req)
  793. goto out_free_ablkcipher;
  794. req_data = kmalloc(sizeof(*req_data), GFP_KERNEL);
  795. if (!req_data)
  796. goto out_free_request;
  797. memset(req_data->iv, 0, sizeof(req_data->iv));
  798. /* Clear the data in the hash sub key container to zero.*/
  799. /* We want to cipher all zeros to create the hash sub key. */
  800. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  801. init_completion(&req_data->result.completion);
  802. sg_init_one(&req_data->sg, hash_subkey, RFC4106_HASH_SUBKEY_SIZE);
  803. ablkcipher_request_set_tfm(req, ctr_tfm);
  804. ablkcipher_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP |
  805. CRYPTO_TFM_REQ_MAY_BACKLOG,
  806. rfc4106_set_hash_subkey_done,
  807. &req_data->result);
  808. ablkcipher_request_set_crypt(req, &req_data->sg,
  809. &req_data->sg, RFC4106_HASH_SUBKEY_SIZE, req_data->iv);
  810. ret = crypto_ablkcipher_encrypt(req);
  811. if (ret == -EINPROGRESS || ret == -EBUSY) {
  812. ret = wait_for_completion_interruptible
  813. (&req_data->result.completion);
  814. if (!ret)
  815. ret = req_data->result.err;
  816. }
  817. kfree(req_data);
  818. out_free_request:
  819. ablkcipher_request_free(req);
  820. out_free_ablkcipher:
  821. crypto_free_ablkcipher(ctr_tfm);
  822. return ret;
  823. }
  824. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  825. unsigned int key_len)
  826. {
  827. int ret = 0;
  828. struct crypto_tfm *tfm = crypto_aead_tfm(parent);
  829. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  830. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  831. struct aesni_rfc4106_gcm_ctx *child_ctx =
  832. aesni_rfc4106_gcm_ctx_get(cryptd_child);
  833. u8 *new_key_mem = NULL;
  834. if (key_len < 4) {
  835. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  836. return -EINVAL;
  837. }
  838. /*Account for 4 byte nonce at the end.*/
  839. key_len -= 4;
  840. if (key_len != AES_KEYSIZE_128) {
  841. crypto_tfm_set_flags(tfm, CRYPTO_TFM_RES_BAD_KEY_LEN);
  842. return -EINVAL;
  843. }
  844. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  845. /*This must be on a 16 byte boundary!*/
  846. if ((unsigned long)(&(ctx->aes_key_expanded.key_enc[0])) % AESNI_ALIGN)
  847. return -EINVAL;
  848. if ((unsigned long)key % AESNI_ALIGN) {
  849. /*key is not aligned: use an auxuliar aligned pointer*/
  850. new_key_mem = kmalloc(key_len+AESNI_ALIGN, GFP_KERNEL);
  851. if (!new_key_mem)
  852. return -ENOMEM;
  853. new_key_mem = PTR_ALIGN(new_key_mem, AESNI_ALIGN);
  854. memcpy(new_key_mem, key, key_len);
  855. key = new_key_mem;
  856. }
  857. if (!irq_fpu_usable())
  858. ret = crypto_aes_expand_key(&(ctx->aes_key_expanded),
  859. key, key_len);
  860. else {
  861. kernel_fpu_begin();
  862. ret = aesni_set_key(&(ctx->aes_key_expanded), key, key_len);
  863. kernel_fpu_end();
  864. }
  865. /*This must be on a 16 byte boundary!*/
  866. if ((unsigned long)(&(ctx->hash_subkey[0])) % AESNI_ALIGN) {
  867. ret = -EINVAL;
  868. goto exit;
  869. }
  870. ret = rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  871. memcpy(child_ctx, ctx, sizeof(*ctx));
  872. exit:
  873. kfree(new_key_mem);
  874. return ret;
  875. }
  876. /* This is the Integrity Check Value (aka the authentication tag length and can
  877. * be 8, 12 or 16 bytes long. */
  878. static int rfc4106_set_authsize(struct crypto_aead *parent,
  879. unsigned int authsize)
  880. {
  881. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(parent);
  882. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  883. switch (authsize) {
  884. case 8:
  885. case 12:
  886. case 16:
  887. break;
  888. default:
  889. return -EINVAL;
  890. }
  891. crypto_aead_crt(parent)->authsize = authsize;
  892. crypto_aead_crt(cryptd_child)->authsize = authsize;
  893. return 0;
  894. }
  895. static int rfc4106_encrypt(struct aead_request *req)
  896. {
  897. int ret;
  898. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  899. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  900. if (!irq_fpu_usable()) {
  901. struct aead_request *cryptd_req =
  902. (struct aead_request *) aead_request_ctx(req);
  903. memcpy(cryptd_req, req, sizeof(*req));
  904. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  905. return crypto_aead_encrypt(cryptd_req);
  906. } else {
  907. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  908. kernel_fpu_begin();
  909. ret = cryptd_child->base.crt_aead.encrypt(req);
  910. kernel_fpu_end();
  911. return ret;
  912. }
  913. }
  914. static int rfc4106_decrypt(struct aead_request *req)
  915. {
  916. int ret;
  917. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  918. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  919. if (!irq_fpu_usable()) {
  920. struct aead_request *cryptd_req =
  921. (struct aead_request *) aead_request_ctx(req);
  922. memcpy(cryptd_req, req, sizeof(*req));
  923. aead_request_set_tfm(cryptd_req, &ctx->cryptd_tfm->base);
  924. return crypto_aead_decrypt(cryptd_req);
  925. } else {
  926. struct crypto_aead *cryptd_child = cryptd_aead_child(ctx->cryptd_tfm);
  927. kernel_fpu_begin();
  928. ret = cryptd_child->base.crt_aead.decrypt(req);
  929. kernel_fpu_end();
  930. return ret;
  931. }
  932. }
  933. static struct crypto_alg rfc4106_alg = {
  934. .cra_name = "rfc4106(gcm(aes))",
  935. .cra_driver_name = "rfc4106-gcm-aesni",
  936. .cra_priority = 400,
  937. .cra_flags = CRYPTO_ALG_TYPE_AEAD | CRYPTO_ALG_ASYNC,
  938. .cra_blocksize = 1,
  939. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,
  940. .cra_alignmask = 0,
  941. .cra_type = &crypto_nivaead_type,
  942. .cra_module = THIS_MODULE,
  943. .cra_list = LIST_HEAD_INIT(rfc4106_alg.cra_list),
  944. .cra_init = rfc4106_init,
  945. .cra_exit = rfc4106_exit,
  946. .cra_u = {
  947. .aead = {
  948. .setkey = rfc4106_set_key,
  949. .setauthsize = rfc4106_set_authsize,
  950. .encrypt = rfc4106_encrypt,
  951. .decrypt = rfc4106_decrypt,
  952. .geniv = "seqiv",
  953. .ivsize = 8,
  954. .maxauthsize = 16,
  955. },
  956. },
  957. };
  958. static int __driver_rfc4106_encrypt(struct aead_request *req)
  959. {
  960. u8 one_entry_in_sg = 0;
  961. u8 *src, *dst, *assoc;
  962. __be32 counter = cpu_to_be32(1);
  963. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  964. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  965. void *aes_ctx = &(ctx->aes_key_expanded);
  966. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  967. u8 iv_tab[16+AESNI_ALIGN];
  968. u8* iv = (u8 *) PTR_ALIGN((u8 *)iv_tab, AESNI_ALIGN);
  969. struct scatter_walk src_sg_walk;
  970. struct scatter_walk assoc_sg_walk;
  971. struct scatter_walk dst_sg_walk;
  972. unsigned int i;
  973. /* Assuming we are supporting rfc4106 64-bit extended */
  974. /* sequence numbers We need to have the AAD length equal */
  975. /* to 8 or 12 bytes */
  976. if (unlikely(req->assoclen != 8 && req->assoclen != 12))
  977. return -EINVAL;
  978. /* IV below built */
  979. for (i = 0; i < 4; i++)
  980. *(iv+i) = ctx->nonce[i];
  981. for (i = 0; i < 8; i++)
  982. *(iv+4+i) = req->iv[i];
  983. *((__be32 *)(iv+12)) = counter;
  984. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  985. one_entry_in_sg = 1;
  986. scatterwalk_start(&src_sg_walk, req->src);
  987. scatterwalk_start(&assoc_sg_walk, req->assoc);
  988. src = scatterwalk_map(&src_sg_walk, 0);
  989. assoc = scatterwalk_map(&assoc_sg_walk, 0);
  990. dst = src;
  991. if (unlikely(req->src != req->dst)) {
  992. scatterwalk_start(&dst_sg_walk, req->dst);
  993. dst = scatterwalk_map(&dst_sg_walk, 0);
  994. }
  995. } else {
  996. /* Allocate memory for src, dst, assoc */
  997. src = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  998. GFP_ATOMIC);
  999. if (unlikely(!src))
  1000. return -ENOMEM;
  1001. assoc = (src + req->cryptlen + auth_tag_len);
  1002. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  1003. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  1004. req->assoclen, 0);
  1005. dst = src;
  1006. }
  1007. aesni_gcm_enc(aes_ctx, dst, src, (unsigned long)req->cryptlen, iv,
  1008. ctx->hash_subkey, assoc, (unsigned long)req->assoclen, dst
  1009. + ((unsigned long)req->cryptlen), auth_tag_len);
  1010. /* The authTag (aka the Integrity Check Value) needs to be written
  1011. * back to the packet. */
  1012. if (one_entry_in_sg) {
  1013. if (unlikely(req->src != req->dst)) {
  1014. scatterwalk_unmap(dst, 0);
  1015. scatterwalk_done(&dst_sg_walk, 0, 0);
  1016. }
  1017. scatterwalk_unmap(src, 0);
  1018. scatterwalk_unmap(assoc, 0);
  1019. scatterwalk_done(&src_sg_walk, 0, 0);
  1020. scatterwalk_done(&assoc_sg_walk, 0, 0);
  1021. } else {
  1022. scatterwalk_map_and_copy(dst, req->dst, 0,
  1023. req->cryptlen + auth_tag_len, 1);
  1024. kfree(src);
  1025. }
  1026. return 0;
  1027. }
  1028. static int __driver_rfc4106_decrypt(struct aead_request *req)
  1029. {
  1030. u8 one_entry_in_sg = 0;
  1031. u8 *src, *dst, *assoc;
  1032. unsigned long tempCipherLen = 0;
  1033. __be32 counter = cpu_to_be32(1);
  1034. int retval = 0;
  1035. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  1036. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  1037. void *aes_ctx = &(ctx->aes_key_expanded);
  1038. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  1039. u8 iv_and_authTag[32+AESNI_ALIGN];
  1040. u8 *iv = (u8 *) PTR_ALIGN((u8 *)iv_and_authTag, AESNI_ALIGN);
  1041. u8 *authTag = iv + 16;
  1042. struct scatter_walk src_sg_walk;
  1043. struct scatter_walk assoc_sg_walk;
  1044. struct scatter_walk dst_sg_walk;
  1045. unsigned int i;
  1046. if (unlikely((req->cryptlen < auth_tag_len) ||
  1047. (req->assoclen != 8 && req->assoclen != 12)))
  1048. return -EINVAL;
  1049. /* Assuming we are supporting rfc4106 64-bit extended */
  1050. /* sequence numbers We need to have the AAD length */
  1051. /* equal to 8 or 12 bytes */
  1052. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  1053. /* IV below built */
  1054. for (i = 0; i < 4; i++)
  1055. *(iv+i) = ctx->nonce[i];
  1056. for (i = 0; i < 8; i++)
  1057. *(iv+4+i) = req->iv[i];
  1058. *((__be32 *)(iv+12)) = counter;
  1059. if ((sg_is_last(req->src)) && (sg_is_last(req->assoc))) {
  1060. one_entry_in_sg = 1;
  1061. scatterwalk_start(&src_sg_walk, req->src);
  1062. scatterwalk_start(&assoc_sg_walk, req->assoc);
  1063. src = scatterwalk_map(&src_sg_walk, 0);
  1064. assoc = scatterwalk_map(&assoc_sg_walk, 0);
  1065. dst = src;
  1066. if (unlikely(req->src != req->dst)) {
  1067. scatterwalk_start(&dst_sg_walk, req->dst);
  1068. dst = scatterwalk_map(&dst_sg_walk, 0);
  1069. }
  1070. } else {
  1071. /* Allocate memory for src, dst, assoc */
  1072. src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  1073. if (!src)
  1074. return -ENOMEM;
  1075. assoc = (src + req->cryptlen + auth_tag_len);
  1076. scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
  1077. scatterwalk_map_and_copy(assoc, req->assoc, 0,
  1078. req->assoclen, 0);
  1079. dst = src;
  1080. }
  1081. aesni_gcm_dec(aes_ctx, dst, src, tempCipherLen, iv,
  1082. ctx->hash_subkey, assoc, (unsigned long)req->assoclen,
  1083. authTag, auth_tag_len);
  1084. /* Compare generated tag with passed in tag. */
  1085. retval = memcmp(src + tempCipherLen, authTag, auth_tag_len) ?
  1086. -EBADMSG : 0;
  1087. if (one_entry_in_sg) {
  1088. if (unlikely(req->src != req->dst)) {
  1089. scatterwalk_unmap(dst, 0);
  1090. scatterwalk_done(&dst_sg_walk, 0, 0);
  1091. }
  1092. scatterwalk_unmap(src, 0);
  1093. scatterwalk_unmap(assoc, 0);
  1094. scatterwalk_done(&src_sg_walk, 0, 0);
  1095. scatterwalk_done(&assoc_sg_walk, 0, 0);
  1096. } else {
  1097. scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1);
  1098. kfree(src);
  1099. }
  1100. return retval;
  1101. }
  1102. static struct crypto_alg __rfc4106_alg = {
  1103. .cra_name = "__gcm-aes-aesni",
  1104. .cra_driver_name = "__driver-gcm-aes-aesni",
  1105. .cra_priority = 0,
  1106. .cra_flags = CRYPTO_ALG_TYPE_AEAD,
  1107. .cra_blocksize = 1,
  1108. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx) + AESNI_ALIGN,
  1109. .cra_alignmask = 0,
  1110. .cra_type = &crypto_aead_type,
  1111. .cra_module = THIS_MODULE,
  1112. .cra_list = LIST_HEAD_INIT(__rfc4106_alg.cra_list),
  1113. .cra_u = {
  1114. .aead = {
  1115. .encrypt = __driver_rfc4106_encrypt,
  1116. .decrypt = __driver_rfc4106_decrypt,
  1117. },
  1118. },
  1119. };
  1120. #endif
  1121. static int __init aesni_init(void)
  1122. {
  1123. int err;
  1124. if (!cpu_has_aes) {
  1125. printk(KERN_INFO "Intel AES-NI instructions are not detected.\n");
  1126. return -ENODEV;
  1127. }
  1128. if ((err = crypto_fpu_init()))
  1129. goto fpu_err;
  1130. if ((err = crypto_register_alg(&aesni_alg)))
  1131. goto aes_err;
  1132. if ((err = crypto_register_alg(&__aesni_alg)))
  1133. goto __aes_err;
  1134. if ((err = crypto_register_alg(&blk_ecb_alg)))
  1135. goto blk_ecb_err;
  1136. if ((err = crypto_register_alg(&blk_cbc_alg)))
  1137. goto blk_cbc_err;
  1138. if ((err = crypto_register_alg(&ablk_ecb_alg)))
  1139. goto ablk_ecb_err;
  1140. if ((err = crypto_register_alg(&ablk_cbc_alg)))
  1141. goto ablk_cbc_err;
  1142. #ifdef CONFIG_X86_64
  1143. if ((err = crypto_register_alg(&blk_ctr_alg)))
  1144. goto blk_ctr_err;
  1145. if ((err = crypto_register_alg(&ablk_ctr_alg)))
  1146. goto ablk_ctr_err;
  1147. if ((err = crypto_register_alg(&__rfc4106_alg)))
  1148. goto __aead_gcm_err;
  1149. if ((err = crypto_register_alg(&rfc4106_alg)))
  1150. goto aead_gcm_err;
  1151. #ifdef HAS_CTR
  1152. if ((err = crypto_register_alg(&ablk_rfc3686_ctr_alg)))
  1153. goto ablk_rfc3686_ctr_err;
  1154. #endif
  1155. #endif
  1156. #ifdef HAS_LRW
  1157. if ((err = crypto_register_alg(&ablk_lrw_alg)))
  1158. goto ablk_lrw_err;
  1159. #endif
  1160. #ifdef HAS_PCBC
  1161. if ((err = crypto_register_alg(&ablk_pcbc_alg)))
  1162. goto ablk_pcbc_err;
  1163. #endif
  1164. #ifdef HAS_XTS
  1165. if ((err = crypto_register_alg(&ablk_xts_alg)))
  1166. goto ablk_xts_err;
  1167. #endif
  1168. return err;
  1169. #ifdef HAS_XTS
  1170. ablk_xts_err:
  1171. #endif
  1172. #ifdef HAS_PCBC
  1173. crypto_unregister_alg(&ablk_pcbc_alg);
  1174. ablk_pcbc_err:
  1175. #endif
  1176. #ifdef HAS_LRW
  1177. crypto_unregister_alg(&ablk_lrw_alg);
  1178. ablk_lrw_err:
  1179. #endif
  1180. #ifdef CONFIG_X86_64
  1181. #ifdef HAS_CTR
  1182. crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
  1183. ablk_rfc3686_ctr_err:
  1184. #endif
  1185. crypto_unregister_alg(&rfc4106_alg);
  1186. aead_gcm_err:
  1187. crypto_unregister_alg(&__rfc4106_alg);
  1188. __aead_gcm_err:
  1189. crypto_unregister_alg(&ablk_ctr_alg);
  1190. ablk_ctr_err:
  1191. crypto_unregister_alg(&blk_ctr_alg);
  1192. blk_ctr_err:
  1193. #endif
  1194. crypto_unregister_alg(&ablk_cbc_alg);
  1195. ablk_cbc_err:
  1196. crypto_unregister_alg(&ablk_ecb_alg);
  1197. ablk_ecb_err:
  1198. crypto_unregister_alg(&blk_cbc_alg);
  1199. blk_cbc_err:
  1200. crypto_unregister_alg(&blk_ecb_alg);
  1201. blk_ecb_err:
  1202. crypto_unregister_alg(&__aesni_alg);
  1203. __aes_err:
  1204. crypto_unregister_alg(&aesni_alg);
  1205. aes_err:
  1206. fpu_err:
  1207. return err;
  1208. }
  1209. static void __exit aesni_exit(void)
  1210. {
  1211. #ifdef HAS_XTS
  1212. crypto_unregister_alg(&ablk_xts_alg);
  1213. #endif
  1214. #ifdef HAS_PCBC
  1215. crypto_unregister_alg(&ablk_pcbc_alg);
  1216. #endif
  1217. #ifdef HAS_LRW
  1218. crypto_unregister_alg(&ablk_lrw_alg);
  1219. #endif
  1220. #ifdef CONFIG_X86_64
  1221. #ifdef HAS_CTR
  1222. crypto_unregister_alg(&ablk_rfc3686_ctr_alg);
  1223. #endif
  1224. crypto_unregister_alg(&rfc4106_alg);
  1225. crypto_unregister_alg(&__rfc4106_alg);
  1226. crypto_unregister_alg(&ablk_ctr_alg);
  1227. crypto_unregister_alg(&blk_ctr_alg);
  1228. #endif
  1229. crypto_unregister_alg(&ablk_cbc_alg);
  1230. crypto_unregister_alg(&ablk_ecb_alg);
  1231. crypto_unregister_alg(&blk_cbc_alg);
  1232. crypto_unregister_alg(&blk_ecb_alg);
  1233. crypto_unregister_alg(&__aesni_alg);
  1234. crypto_unregister_alg(&aesni_alg);
  1235. crypto_fpu_exit();
  1236. }
  1237. module_init(aesni_init);
  1238. module_exit(aesni_exit);
  1239. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1240. MODULE_LICENSE("GPL");
  1241. MODULE_ALIAS("aes");