ppc4xx_msi.c 6.9 KB

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  1. /*
  2. * Adding PCI-E MSI support for PPC4XX SoCs.
  3. *
  4. * Copyright (c) 2010, Applied Micro Circuits Corporation
  5. * Authors: Tirumala R Marri <tmarri@apm.com>
  6. * Feng Kan <fkan@apm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <linux/irq.h>
  24. #include <linux/bootmem.h>
  25. #include <linux/pci.h>
  26. #include <linux/msi.h>
  27. #include <linux/of_platform.h>
  28. #include <linux/interrupt.h>
  29. #include <asm/prom.h>
  30. #include <asm/hw_irq.h>
  31. #include <asm/ppc-pci.h>
  32. #include <boot/dcr.h>
  33. #include <asm/dcr-regs.h>
  34. #include <asm/msi_bitmap.h>
  35. #define PEIH_TERMADH 0x00
  36. #define PEIH_TERMADL 0x08
  37. #define PEIH_MSIED 0x10
  38. #define PEIH_MSIMK 0x18
  39. #define PEIH_MSIASS 0x20
  40. #define PEIH_FLUSH0 0x30
  41. #define PEIH_FLUSH1 0x38
  42. #define PEIH_CNTRST 0x48
  43. #define NR_MSI_IRQS 4
  44. struct ppc4xx_msi {
  45. u32 msi_addr_lo;
  46. u32 msi_addr_hi;
  47. void __iomem *msi_regs;
  48. int msi_virqs[NR_MSI_IRQS];
  49. struct msi_bitmap bitmap;
  50. struct device_node *msi_dev;
  51. };
  52. static struct ppc4xx_msi ppc4xx_msi;
  53. static int ppc4xx_msi_init_allocator(struct platform_device *dev,
  54. struct ppc4xx_msi *msi_data)
  55. {
  56. int err;
  57. err = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
  58. dev->dev.of_node);
  59. if (err)
  60. return err;
  61. err = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
  62. if (err < 0) {
  63. msi_bitmap_free(&msi_data->bitmap);
  64. return err;
  65. }
  66. return 0;
  67. }
  68. static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  69. {
  70. int int_no = -ENOMEM;
  71. unsigned int virq;
  72. struct msi_msg msg;
  73. struct msi_desc *entry;
  74. struct ppc4xx_msi *msi_data = &ppc4xx_msi;
  75. list_for_each_entry(entry, &dev->msi_list, list) {
  76. int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
  77. if (int_no >= 0)
  78. break;
  79. if (int_no < 0) {
  80. pr_debug("%s: fail allocating msi interrupt\n",
  81. __func__);
  82. }
  83. virq = irq_of_parse_and_map(msi_data->msi_dev, int_no);
  84. if (virq == NO_IRQ) {
  85. dev_err(&dev->dev, "%s: fail mapping irq\n", __func__);
  86. msi_bitmap_free_hwirqs(&msi_data->bitmap, int_no, 1);
  87. return -ENOSPC;
  88. }
  89. dev_dbg(&dev->dev, "%s: virq = %d\n", __func__, virq);
  90. /* Setup msi address space */
  91. msg.address_hi = msi_data->msi_addr_hi;
  92. msg.address_lo = msi_data->msi_addr_lo;
  93. irq_set_msi_desc(virq, entry);
  94. msg.data = int_no;
  95. write_msi_msg(virq, &msg);
  96. }
  97. return 0;
  98. }
  99. void ppc4xx_teardown_msi_irqs(struct pci_dev *dev)
  100. {
  101. struct msi_desc *entry;
  102. struct ppc4xx_msi *msi_data = &ppc4xx_msi;
  103. dev_dbg(&dev->dev, "PCIE-MSI: tearing down msi irqs\n");
  104. list_for_each_entry(entry, &dev->msi_list, list) {
  105. if (entry->irq == NO_IRQ)
  106. continue;
  107. irq_set_msi_desc(entry->irq, NULL);
  108. msi_bitmap_free_hwirqs(&msi_data->bitmap,
  109. virq_to_hw(entry->irq), 1);
  110. irq_dispose_mapping(entry->irq);
  111. }
  112. }
  113. static int ppc4xx_msi_check_device(struct pci_dev *pdev, int nvec, int type)
  114. {
  115. dev_dbg(&pdev->dev, "PCIE-MSI:%s called. vec %x type %d\n",
  116. __func__, nvec, type);
  117. if (type == PCI_CAP_ID_MSIX)
  118. pr_debug("ppc4xx msi: MSI-X untested, trying anyway.\n");
  119. return 0;
  120. }
  121. static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
  122. struct resource res, struct ppc4xx_msi *msi)
  123. {
  124. const u32 *msi_data;
  125. const u32 *msi_mask;
  126. const u32 *sdr_addr;
  127. dma_addr_t msi_phys;
  128. void *msi_virt;
  129. sdr_addr = of_get_property(dev->dev.of_node, "sdr-base", NULL);
  130. if (!sdr_addr)
  131. return -1;
  132. SDR0_WRITE(sdr_addr, (u64)res.start >> 32); /*HIGH addr */
  133. SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
  134. msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
  135. if (msi->msi_dev)
  136. return -ENODEV;
  137. msi->msi_regs = of_iomap(msi->msi_dev, 0);
  138. if (!msi->msi_regs) {
  139. dev_err(&dev->dev, "of_iomap problem failed\n");
  140. return -ENOMEM;
  141. }
  142. dev_dbg(&dev->dev, "PCIE-MSI: msi register mapped 0x%x 0x%x\n",
  143. (u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
  144. msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
  145. msi->msi_addr_hi = 0x0;
  146. msi->msi_addr_lo = (u32) msi_phys;
  147. dev_dbg(&dev->dev, "PCIE-MSI: msi address 0x%x\n", msi->msi_addr_lo);
  148. /* Progam the Interrupt handler Termination addr registers */
  149. out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
  150. out_be32(msi->msi_regs + PEIH_TERMADL, msi->msi_addr_lo);
  151. msi_data = of_get_property(dev->dev.of_node, "msi-data", NULL);
  152. if (!msi_data)
  153. return -1;
  154. msi_mask = of_get_property(dev->dev.of_node, "msi-mask", NULL);
  155. if (!msi_mask)
  156. return -1;
  157. /* Program MSI Expected data and Mask bits */
  158. out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
  159. out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
  160. return 0;
  161. }
  162. static int ppc4xx_of_msi_remove(struct platform_device *dev)
  163. {
  164. struct ppc4xx_msi *msi = dev->dev.platform_data;
  165. int i;
  166. int virq;
  167. for (i = 0; i < NR_MSI_IRQS; i++) {
  168. virq = msi->msi_virqs[i];
  169. if (virq != NO_IRQ)
  170. irq_dispose_mapping(virq);
  171. }
  172. if (msi->bitmap.bitmap)
  173. msi_bitmap_free(&msi->bitmap);
  174. iounmap(msi->msi_regs);
  175. of_node_put(msi->msi_dev);
  176. kfree(msi);
  177. return 0;
  178. }
  179. static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
  180. {
  181. struct ppc4xx_msi *msi;
  182. struct resource res;
  183. int err = 0;
  184. msi = &ppc4xx_msi;/*keep the msi data for further use*/
  185. dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
  186. msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL);
  187. if (!msi) {
  188. dev_err(&dev->dev, "No memory for MSI structure\n");
  189. return -ENOMEM;
  190. }
  191. dev->dev.platform_data = msi;
  192. /* Get MSI ranges */
  193. err = of_address_to_resource(dev->dev.of_node, 0, &res);
  194. if (err) {
  195. dev_err(&dev->dev, "%s resource error!\n",
  196. dev->dev.of_node->full_name);
  197. goto error_out;
  198. }
  199. if (ppc4xx_setup_pcieh_hw(dev, res, msi))
  200. goto error_out;
  201. err = ppc4xx_msi_init_allocator(dev, msi);
  202. if (err) {
  203. dev_err(&dev->dev, "Error allocating MSI bitmap\n");
  204. goto error_out;
  205. }
  206. ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs;
  207. ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;
  208. ppc_md.msi_check_device = ppc4xx_msi_check_device;
  209. return err;
  210. error_out:
  211. ppc4xx_of_msi_remove(dev);
  212. return err;
  213. }
  214. static const struct of_device_id ppc4xx_msi_ids[] = {
  215. {
  216. .compatible = "amcc,ppc4xx-msi",
  217. },
  218. {}
  219. };
  220. static struct platform_driver ppc4xx_msi_driver = {
  221. .probe = ppc4xx_msi_probe,
  222. .remove = ppc4xx_of_msi_remove,
  223. .driver = {
  224. .name = "ppc4xx-msi",
  225. .owner = THIS_MODULE,
  226. .of_match_table = ppc4xx_msi_ids,
  227. },
  228. };
  229. static __init int ppc4xx_msi_init(void)
  230. {
  231. return platform_driver_register(&ppc4xx_msi_driver);
  232. }
  233. subsys_initcall(ppc4xx_msi_init);