it_lp_naca.h 3.3 KB

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  1. /*
  2. * Copyright (C) 2001 Mike Corrigan IBM Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  17. */
  18. #ifndef _PLATFORMS_ISERIES_IT_LP_NACA_H
  19. #define _PLATFORMS_ISERIES_IT_LP_NACA_H
  20. #include <linux/types.h>
  21. /*
  22. * This control block contains the data that is shared between the
  23. * hypervisor (PLIC) and the OS.
  24. */
  25. struct ItLpNaca {
  26. // CACHE_LINE_1 0x0000 - 0x007F Contains read-only data
  27. u32 xDesc; // Eye catcher x00-x03
  28. u16 xSize; // Size of this class x04-x05
  29. u16 xIntHdlrOffset; // Offset to IntHdlr array x06-x07
  30. u8 xMaxIntHdlrEntries; // Number of entries in array x08-x08
  31. u8 xPrimaryLpIndex; // LP Index of Primary x09-x09
  32. u8 xServiceLpIndex; // LP Ind of Service Focal Pointx0A-x0A
  33. u8 xLpIndex; // LP Index x0B-x0B
  34. u16 xMaxLpQueues; // Number of allocated queues x0C-x0D
  35. u16 xLpQueueOffset; // Offset to start of LP queues x0E-x0F
  36. u8 xPirEnvironMode; // Piranha or hardware x10-x10
  37. u8 xPirConsoleMode; // Piranha console indicator x11-x11
  38. u8 xPirDasdMode; // Piranha dasd indicator x12-x12
  39. u8 xRsvd1_0[5]; // Reserved for Piranha related x13-x17
  40. u8 flags; // flags, see below x18-x1F
  41. u8 xSpVpdFormat; // VPD areas are in CSP format ...
  42. u8 xIntProcRatio; // Ratio of int procs to procs ...
  43. u8 xRsvd1_2[5]; // Reserved ...
  44. u16 xRsvd1_3; // Reserved x20-x21
  45. u16 xPlicVrmIndex; // VRM index of PLIC x22-x23
  46. u16 xMinSupportedSlicVrmInd;// Min supported OS VRM index x24-x25
  47. u16 xMinCompatableSlicVrmInd;// Min compatible OS VRM index x26-x27
  48. u64 xLoadAreaAddr; // ER address of load area x28-x2F
  49. u32 xLoadAreaChunks; // Chunks for the load area x30-x33
  50. u32 xPaseSysCallCRMask; // Mask used to test CR before x34-x37
  51. // doing an ASR switch on PASE
  52. // system call.
  53. u64 xSlicSegmentTablePtr; // Pointer to Slic seg table. x38-x3f
  54. u8 xRsvd1_4[64]; // x40-x7F
  55. // CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
  56. u8 xRsvd2_0[128]; // Reserved x00-x7F
  57. // CACHE_LINE_3-6 0x0100 - 0x02FF Contains LP Queue indicators
  58. // NB: Padding required to keep xInterruptHdlr at x300 which is required
  59. // for v4r4 PLIC.
  60. u8 xOldLpQueue[128]; // LP Queue needed for v4r4 100-17F
  61. u8 xRsvd3_0[384]; // Reserved 180-2FF
  62. // CACHE_LINE_7-8 0x0300 - 0x03FF Contains the address of the OS interrupt
  63. // handlers
  64. u64 xInterruptHdlr[32]; // Interrupt handlers 300-x3FF
  65. };
  66. extern struct ItLpNaca itLpNaca;
  67. #define ITLPNACA_LPAR 0x80 /* Is LPAR installed on the system */
  68. #define ITLPNACA_PARTITIONED 0x40 /* Is the system partitioned */
  69. #define ITLPNACA_HWSYNCEDTBS 0x20 /* Hardware synced TBs */
  70. #define ITLPNACA_HMTINT 0x10 /* Utilize MHT for interrupts */
  71. #endif /* _PLATFORMS_ISERIES_IT_LP_NACA_H */