tqm85xx.c 4.8 KB

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  1. /*
  2. * Based on MPC8560 ADS and arch/ppc tqm85xx ports
  3. *
  4. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5. *
  6. * Copyright 2008 Freescale Semiconductor Inc.
  7. *
  8. * Copyright (c) 2005-2006 DENX Software Engineering
  9. * Stefan Roese <sr@denx.de>
  10. *
  11. * Based on original work by
  12. * Kumar Gala <kumar.gala@freescale.com>
  13. * Copyright 2004 Freescale Semiconductor Inc.
  14. *
  15. * This program is free software; you can redistribute it and/or modify it
  16. * under the terms of the GNU General Public License as published by the
  17. * Free Software Foundation; either version 2 of the License, or (at your
  18. * option) any later version.
  19. */
  20. #include <linux/stddef.h>
  21. #include <linux/kernel.h>
  22. #include <linux/pci.h>
  23. #include <linux/kdev_t.h>
  24. #include <linux/delay.h>
  25. #include <linux/seq_file.h>
  26. #include <linux/of_platform.h>
  27. #include <asm/system.h>
  28. #include <asm/time.h>
  29. #include <asm/machdep.h>
  30. #include <asm/pci-bridge.h>
  31. #include <asm/mpic.h>
  32. #include <asm/prom.h>
  33. #include <mm/mmu_decl.h>
  34. #include <asm/udbg.h>
  35. #include <sysdev/fsl_soc.h>
  36. #include <sysdev/fsl_pci.h>
  37. #ifdef CONFIG_CPM2
  38. #include <asm/cpm2.h>
  39. #include <sysdev/cpm2_pic.h>
  40. static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
  41. {
  42. struct irq_chip *chip = irq_desc_get_chip(desc);
  43. int cascade_irq;
  44. while ((cascade_irq = cpm2_get_irq()) >= 0)
  45. generic_handle_irq(cascade_irq);
  46. chip->irq_eoi(&desc->irq_data);
  47. }
  48. #endif /* CONFIG_CPM2 */
  49. static void __init tqm85xx_pic_init(void)
  50. {
  51. struct mpic *mpic;
  52. struct resource r;
  53. struct device_node *np;
  54. #ifdef CONFIG_CPM2
  55. int irq;
  56. #endif
  57. np = of_find_node_by_type(NULL, "open-pic");
  58. if (!np) {
  59. printk(KERN_ERR "Could not find open-pic node\n");
  60. return;
  61. }
  62. if (of_address_to_resource(np, 0, &r)) {
  63. printk(KERN_ERR "Could not map mpic register space\n");
  64. of_node_put(np);
  65. return;
  66. }
  67. mpic = mpic_alloc(np, r.start,
  68. MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
  69. 0, 256, " OpenPIC ");
  70. BUG_ON(mpic == NULL);
  71. of_node_put(np);
  72. mpic_init(mpic);
  73. #ifdef CONFIG_CPM2
  74. /* Setup CPM2 PIC */
  75. np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
  76. if (np == NULL) {
  77. printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
  78. return;
  79. }
  80. irq = irq_of_parse_and_map(np, 0);
  81. if (irq == NO_IRQ) {
  82. of_node_put(np);
  83. printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
  84. return;
  85. }
  86. cpm2_pic_init(np);
  87. of_node_put(np);
  88. irq_set_chained_handler(irq, cpm2_cascade);
  89. #endif
  90. }
  91. /*
  92. * Setup the architecture
  93. */
  94. static void __init tqm85xx_setup_arch(void)
  95. {
  96. #ifdef CONFIG_PCI
  97. struct device_node *np;
  98. #endif
  99. if (ppc_md.progress)
  100. ppc_md.progress("tqm85xx_setup_arch()", 0);
  101. #ifdef CONFIG_CPM2
  102. cpm2_reset();
  103. #endif
  104. #ifdef CONFIG_PCI
  105. for_each_node_by_type(np, "pci") {
  106. if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
  107. of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
  108. struct resource rsrc;
  109. if (!of_address_to_resource(np, 0, &rsrc)) {
  110. if ((rsrc.start & 0xfffff) == 0x8000)
  111. fsl_add_bridge(np, 1);
  112. else
  113. fsl_add_bridge(np, 0);
  114. }
  115. }
  116. }
  117. #endif
  118. }
  119. static void tqm85xx_show_cpuinfo(struct seq_file *m)
  120. {
  121. uint pvid, svid, phid1;
  122. pvid = mfspr(SPRN_PVR);
  123. svid = mfspr(SPRN_SVR);
  124. seq_printf(m, "Vendor\t\t: TQ Components\n");
  125. seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
  126. seq_printf(m, "SVR\t\t: 0x%x\n", svid);
  127. /* Display cpu Pll setting */
  128. phid1 = mfspr(SPRN_HID1);
  129. seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
  130. }
  131. static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev)
  132. {
  133. unsigned int val;
  134. /* Do not do the fixup on other platforms! */
  135. if (!machine_is(tqm85xx))
  136. return;
  137. dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n");
  138. /*
  139. * Enable P2CCLK bit in system control register
  140. * to enable CLOCK output to power chip
  141. */
  142. pci_read_config_dword(pdev, 0x80, &val);
  143. pci_write_config_dword(pdev, 0x80, val | (1 << 27));
  144. }
  145. DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
  146. tqm85xx_ti1520_fixup);
  147. static struct of_device_id __initdata of_bus_ids[] = {
  148. { .compatible = "simple-bus", },
  149. { .compatible = "gianfar", },
  150. {},
  151. };
  152. static int __init declare_of_platform_devices(void)
  153. {
  154. of_platform_bus_probe(NULL, of_bus_ids, NULL);
  155. return 0;
  156. }
  157. machine_device_initcall(tqm85xx, declare_of_platform_devices);
  158. static const char *board[] __initdata = {
  159. "tqc,tqm8540",
  160. "tqc,tqm8541",
  161. "tqc,tqm8548",
  162. "tqc,tqm8555",
  163. "tqc,tqm8560",
  164. NULL
  165. };
  166. /*
  167. * Called very early, device-tree isn't unflattened
  168. */
  169. static int __init tqm85xx_probe(void)
  170. {
  171. return of_flat_dt_match(of_get_flat_dt_root(), board);
  172. }
  173. define_machine(tqm85xx) {
  174. .name = "TQM85xx",
  175. .probe = tqm85xx_probe,
  176. .setup_arch = tqm85xx_setup_arch,
  177. .init_IRQ = tqm85xx_pic_init,
  178. .show_cpuinfo = tqm85xx_show_cpuinfo,
  179. .get_irq = mpic_get_irq,
  180. .restart = fsl_rstcr_restart,
  181. .calibrate_decr = generic_calibrate_decr,
  182. .progress = udbg_progress,
  183. };