uc101.dts 3.5 KB

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  1. /*
  2. * Manroland uc101 board Device Tree Source
  3. *
  4. * Copyright (C) 2009 DENX Software Engineering GmbH
  5. * Heiko Schocher <hs@denx.de>
  6. * Copyright 2006-2007 Secret Lab Technologies Ltd.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. /include/ "mpc5200b.dtsi"
  14. / {
  15. model = "manroland,uc101";
  16. compatible = "manroland,uc101";
  17. soc5200@f0000000 {
  18. gpt0: timer@600 { // General Purpose Timer in GPIO mode
  19. gpio-controller;
  20. #gpio-cells = <2>;
  21. };
  22. gpt1: timer@610 { // General Purpose Timer in GPIO mode
  23. gpio-controller;
  24. #gpio-cells = <2>;
  25. };
  26. gpt2: timer@620 { // General Purpose Timer in GPIO mode
  27. gpio-controller;
  28. #gpio-cells = <2>;
  29. };
  30. gpt3: timer@630 { // General Purpose Timer in GPIO mode
  31. compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
  32. reg = <0x630 0x10>;
  33. interrupts = <1 12 0>;
  34. gpio-controller;
  35. #gpio-cells = <2>;
  36. };
  37. gpt4: timer@640 { // General Purpose Timer in GPIO mode
  38. gpio-controller;
  39. #gpio-cells = <2>;
  40. };
  41. gpt5: timer@650 { // General Purpose Timer in GPIO mode
  42. gpio-controller;
  43. #gpio-cells = <2>;
  44. };
  45. gpt6: timer@660 { // General Purpose Timer in GPIO mode
  46. gpio-controller;
  47. #gpio-cells = <2>;
  48. };
  49. gpt7: timer@670 { // General Purpose Timer in GPIO mode
  50. gpio-controller;
  51. #gpio-cells = <2>;
  52. };
  53. rtc@800 {
  54. status = "disabled";
  55. };
  56. can@900 {
  57. status = "disabled";
  58. };
  59. can@980 {
  60. status = "disabled";
  61. };
  62. spi@f00 {
  63. status = "disabled";
  64. };
  65. usb@1000 {
  66. status = "disabled";
  67. };
  68. psc@2000 { // PSC1
  69. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  70. };
  71. psc@2200 { // PSC2
  72. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  73. };
  74. psc@2400 { // PSC3
  75. status = "disabled";
  76. };
  77. psc@2600 { // PSC4
  78. status = "disabled";
  79. };
  80. psc@2800 { // PSC5
  81. status = "disabled";
  82. };
  83. psc@2c00 { // PSC6
  84. compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
  85. };
  86. ethernet@3000 {
  87. phy-handle = <&phy0>;
  88. };
  89. mdio@3000 {
  90. phy0: ethernet-phy@0 {
  91. compatible = "intel,lxt971";
  92. reg = <0>;
  93. };
  94. };
  95. i2c@3d00 {
  96. status = "disabled";
  97. };
  98. i2c@3d40 {
  99. fsl,preserve-clocking;
  100. clock-frequency = <400000>;
  101. hwmon@2c {
  102. compatible = "ad,adm9240";
  103. reg = <0x2c>;
  104. };
  105. rtc@51 {
  106. compatible = "nxp,pcf8563";
  107. reg = <0x51>;
  108. };
  109. };
  110. };
  111. pci@f0000d00 {
  112. status = "disabled";
  113. };
  114. localbus {
  115. ranges = <0 0 0xff800000 0x00800000
  116. 1 0 0x80000000 0x00800000
  117. 3 0 0x80000000 0x00800000>;
  118. flash@0,0 {
  119. compatible = "cfi-flash";
  120. reg = <0 0 0x00800000>;
  121. bank-width = <2>;
  122. device-width = <2>;
  123. #size-cells = <1>;
  124. #address-cells = <1>;
  125. partition@0 {
  126. label = "DTS";
  127. reg = <0x0 0x00100000>;
  128. };
  129. partition@100000 {
  130. label = "Kernel";
  131. reg = <0x100000 0x00200000>;
  132. };
  133. partition@300000 {
  134. label = "RootFS";
  135. reg = <0x00300000 0x00200000>;
  136. };
  137. partition@500000 {
  138. label = "user";
  139. reg = <0x00500000 0x00200000>;
  140. };
  141. partition@700000 {
  142. label = "U-Boot";
  143. reg = <0x00700000 0x00040000>;
  144. };
  145. partition@740000 {
  146. label = "Env";
  147. reg = <0x00740000 0x00010000>;
  148. };
  149. partition@750000 {
  150. label = "red. Env";
  151. reg = <0x00750000 0x00010000>;
  152. };
  153. partition@760000 {
  154. label = "reserve";
  155. reg = <0x00760000 0x000a0000>;
  156. };
  157. };
  158. };
  159. };