sys_sx164.c 4.5 KB

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  1. /*
  2. * linux/arch/alpha/kernel/sys_sx164.c
  3. *
  4. * Copyright (C) 1995 David A Rusling
  5. * Copyright (C) 1996 Jay A Estabrook
  6. * Copyright (C) 1998, 1999, 2000 Richard Henderson
  7. *
  8. * Code supporting the SX164 (PCA56+PYXIS).
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/types.h>
  12. #include <linux/mm.h>
  13. #include <linux/sched.h>
  14. #include <linux/pci.h>
  15. #include <linux/init.h>
  16. #include <linux/bitops.h>
  17. #include <asm/ptrace.h>
  18. #include <asm/system.h>
  19. #include <asm/dma.h>
  20. #include <asm/irq.h>
  21. #include <asm/mmu_context.h>
  22. #include <asm/io.h>
  23. #include <asm/pgtable.h>
  24. #include <asm/core_cia.h>
  25. #include <asm/hwrpb.h>
  26. #include <asm/tlbflush.h>
  27. #include "proto.h"
  28. #include "irq_impl.h"
  29. #include "pci_impl.h"
  30. #include "machvec_impl.h"
  31. static void __init
  32. sx164_init_irq(void)
  33. {
  34. outb(0, DMA1_RESET_REG);
  35. outb(0, DMA2_RESET_REG);
  36. outb(DMA_MODE_CASCADE, DMA2_MODE_REG);
  37. outb(0, DMA2_MASK_REG);
  38. if (alpha_using_srm)
  39. alpha_mv.device_interrupt = srm_device_interrupt;
  40. init_i8259a_irqs();
  41. /* Not interested in the bogus interrupts (0,3,4,5,40-47),
  42. NMI (1), or HALT (2). */
  43. if (alpha_using_srm)
  44. init_srm_irqs(40, 0x3f0000);
  45. else
  46. init_pyxis_irqs(0xff00003f0000UL);
  47. setup_irq(16+6, &timer_cascade_irqaction);
  48. }
  49. /*
  50. * PCI Fixup configuration.
  51. *
  52. * Summary @ PYXIS_INT_REQ:
  53. * Bit Meaning
  54. * 0 RSVD
  55. * 1 NMI
  56. * 2 Halt/Reset switch
  57. * 3 MBZ
  58. * 4 RAZ
  59. * 5 RAZ
  60. * 6 Interval timer (RTC)
  61. * 7 PCI-ISA Bridge
  62. * 8 Interrupt Line A from slot 3
  63. * 9 Interrupt Line A from slot 2
  64. *10 Interrupt Line A from slot 1
  65. *11 Interrupt Line A from slot 0
  66. *12 Interrupt Line B from slot 3
  67. *13 Interrupt Line B from slot 2
  68. *14 Interrupt Line B from slot 1
  69. *15 Interrupt line B from slot 0
  70. *16 Interrupt Line C from slot 3
  71. *17 Interrupt Line C from slot 2
  72. *18 Interrupt Line C from slot 1
  73. *19 Interrupt Line C from slot 0
  74. *20 Interrupt Line D from slot 3
  75. *21 Interrupt Line D from slot 2
  76. *22 Interrupt Line D from slot 1
  77. *23 Interrupt Line D from slot 0
  78. *
  79. * IdSel
  80. * 5 32 bit PCI option slot 2
  81. * 6 64 bit PCI option slot 0
  82. * 7 64 bit PCI option slot 1
  83. * 8 Cypress I/O
  84. * 9 32 bit PCI option slot 3
  85. */
  86. static int __init
  87. sx164_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
  88. {
  89. static char irq_tab[5][5] __initdata = {
  90. /*INT INTA INTB INTC INTD */
  91. { 16+ 9, 16+ 9, 16+13, 16+17, 16+21}, /* IdSel 5 slot 2 J17 */
  92. { 16+11, 16+11, 16+15, 16+19, 16+23}, /* IdSel 6 slot 0 J19 */
  93. { 16+10, 16+10, 16+14, 16+18, 16+22}, /* IdSel 7 slot 1 J18 */
  94. { -1, -1, -1, -1, -1}, /* IdSel 8 SIO */
  95. { 16+ 8, 16+ 8, 16+12, 16+16, 16+20} /* IdSel 9 slot 3 J15 */
  96. };
  97. const long min_idsel = 5, max_idsel = 9, irqs_per_slot = 5;
  98. return COMMON_TABLE_LOOKUP;
  99. }
  100. static void __init
  101. sx164_init_pci(void)
  102. {
  103. cia_init_pci();
  104. SMC669_Init(0);
  105. }
  106. static void __init
  107. sx164_init_arch(void)
  108. {
  109. /*
  110. * OSF palcode v1.23 forgets to enable PCA56 Motion Video
  111. * Instructions. Let's enable it.
  112. * We have to check palcode revision because CSERVE interface
  113. * is subject to change without notice. For example, it
  114. * has been changed completely since v1.16 (found in MILO
  115. * distribution). -ink
  116. */
  117. struct percpu_struct *cpu = (struct percpu_struct*)
  118. ((char*)hwrpb + hwrpb->processor_offset);
  119. if (amask(AMASK_MAX) != 0
  120. && alpha_using_srm
  121. && (cpu->pal_revision & 0xffff) <= 0x117) {
  122. __asm__ __volatile__(
  123. "lda $16,8($31)\n"
  124. "call_pal 9\n" /* Allow PALRES insns in kernel mode */
  125. ".long 0x64000118\n\n" /* hw_mfpr $0,icsr */
  126. "ldah $16,(1<<(19-16))($31)\n"
  127. "or $0,$16,$0\n" /* set MVE bit */
  128. ".long 0x74000118\n" /* hw_mtpr $0,icsr */
  129. "lda $16,9($31)\n"
  130. "call_pal 9" /* Disable PALRES insns */
  131. : : : "$0", "$16");
  132. printk("PCA56 MVI set enabled\n");
  133. }
  134. pyxis_init_arch();
  135. }
  136. /*
  137. * The System Vector
  138. */
  139. struct alpha_machine_vector sx164_mv __initmv = {
  140. .vector_name = "SX164",
  141. DO_EV5_MMU,
  142. DO_DEFAULT_RTC,
  143. DO_PYXIS_IO,
  144. .machine_check = cia_machine_check,
  145. .max_isa_dma_address = ALPHA_MAX_ISA_DMA_ADDRESS,
  146. .min_io_address = DEFAULT_IO_BASE,
  147. .min_mem_address = DEFAULT_MEM_BASE,
  148. .pci_dac_offset = PYXIS_DAC_OFFSET,
  149. .nr_irqs = 48,
  150. .device_interrupt = pyxis_device_interrupt,
  151. .init_arch = sx164_init_arch,
  152. .init_irq = sx164_init_irq,
  153. .init_rtc = common_init_rtc,
  154. .init_pci = sx164_init_pci,
  155. .kill_arch = cia_kill_arch,
  156. .pci_map_irq = sx164_map_irq,
  157. .pci_swizzle = common_swizzle,
  158. };
  159. ALIAS_MV(sx164)