Zedboard-Master.xdc 21 KB

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  1. # ----------------------------------------------------------------------------
  2. # _____
  3. # / \
  4. # /____ \____
  5. # / \===\ \==/
  6. # /___\===\___\/ AVNET Design Resource Center
  7. # \======/ www.em.avnet.com/drc
  8. # \====/
  9. # ----------------------------------------------------------------------------
  10. #
  11. # Created With Avnet UCF Generator V0.4.0
  12. # Date: Saturday, June 30, 2012
  13. # Time: 12:18:55 AM
  14. #
  15. # This design is the property of Avnet. Publication of this
  16. # design is not authorized without written consent from Avnet.
  17. #
  18. # Please direct any questions to:
  19. # ZedBoard.org Community Forums
  20. # http://www.zedboard.org
  21. #
  22. # Disclaimer:
  23. # Avnet, Inc. makes no warranty for the use of this code or design.
  24. # This code is provided "As Is". Avnet, Inc assumes no responsibility for
  25. # any errors, which may appear in this code, nor does it make a commitment
  26. # to update the information contained herein. Avnet, Inc specifically
  27. # disclaims any implied warranties of fitness for a particular purpose.
  28. # Copyright(c) 2012 Avnet, Inc.
  29. # All rights reserved.
  30. #
  31. # ----------------------------------------------------------------------------
  32. #
  33. # Notes:
  34. #
  35. # 10 August 2012
  36. # IO standards based upon Bank 34 and Bank 35 Vcco supply options of 1.8V,
  37. # 2.5V, or 3.3V are possible based upon the Vadj jumper (J18) settings.
  38. # By default, Vadj is expected to be set to 1.8V but if a different
  39. # voltage is used for a particular design, then the corresponding IO
  40. # standard within this UCF should also be updated to reflect the actual
  41. # Vadj jumper selection.
  42. #
  43. # 09 September 2012
  44. # Net names are not allowed to contain hyphen characters '-' since this
  45. # is not a legal VHDL87 or Verilog character within an identifier.
  46. # HDL net names are adjusted to contain no hyphen characters '-' but
  47. # rather use underscore '_' characters. Comment net name with the hyphen
  48. # characters will remain in place since these are intended to match the
  49. # schematic net names in order to better enable schematic search.
  50. #
  51. # 17 April 2014
  52. # Pin constraint for toggle switch SW7 was corrected to M15 location.
  53. #
  54. # 16 April 2015
  55. # Corrected the way that entire banks are assigned to a particular IO
  56. # standard so that it works with more recent versions of Vivado Design
  57. # Suite and moved the IO standard constraints to the end of the file
  58. # along with some better organization and notes like we do with our SOMs.
  59. #
  60. # 6 June 2016
  61. # Corrected error in signal name for package pin N19 (FMC Expansion Connector)
  62. #
  63. #
  64. # ----------------------------------------------------------------------------
  65. # ----------------------------------------------------------------------------
  66. # Audio Codec - Bank 13
  67. # ----------------------------------------------------------------------------
  68. #set_property PACKAGE_PIN AB1 [get_ports {AC_ADR0}]; # "AC-ADR0"
  69. #set_property PACKAGE_PIN Y5 [get_ports {AC_ADR1}]; # "AC-ADR1"
  70. #set_property PACKAGE_PIN Y8 [get_ports {SDATA_O}]; # "AC-GPIO0"
  71. #set_property PACKAGE_PIN AA7 [get_ports {SDATA_I}]; # "AC-GPIO1"
  72. #set_property PACKAGE_PIN AA6 [get_ports {BCLK_O}]; # "AC-GPIO2"
  73. #set_property PACKAGE_PIN Y6 [get_ports {LRCLK_O}]; # "AC-GPIO3"
  74. #set_property PACKAGE_PIN AB2 [get_ports {MCLK_O}]; # "AC-MCLK"
  75. #set_property PACKAGE_PIN AB4 [get_ports {iic_rtl_scl_io}]; # "AC-SCK"
  76. #set_property PACKAGE_PIN AB5 [get_ports {iic_rtl_sda_io}]; # "AC-SDA"
  77. # ----------------------------------------------------------------------------
  78. # Clock Source - Bank 13
  79. # ----------------------------------------------------------------------------
  80. set_property PACKAGE_PIN Y9 [get_ports {rd_clk}]; # "GCLK"
  81. # ----------------------------------------------------------------------------
  82. # JA Pmod - Bank 13
  83. # ----------------------------------------------------------------------------
  84. set_property PACKAGE_PIN Y11 [get_ports {wr_en}]; # "JA1"
  85. set_property PACKAGE_PIN AA11 [get_ports {full}]; # "JA2"
  86. #set_property PACKAGE_PIN Y10 [get_ports {JA3}]; # "JA3"
  87. set_property PACKAGE_PIN AA9 [get_ports {wr_clk}]; # "JA4"
  88. #set_property PACKAGE_PIN AB11 [get_ports {JA7}]; # "JA7"
  89. #set_property PACKAGE_PIN AB10 [get_ports {JA8}]; # "JA8"
  90. #set_property PACKAGE_PIN AB9 [get_ports {JA9}]; # "JA9"
  91. #set_property PACKAGE_PIN AA8 [get_ports {JA10}]; # "JA10"
  92. # ----------------------------------------------------------------------------
  93. # JB Pmod - Bank 13
  94. # ----------------------------------------------------------------------------
  95. set_property PACKAGE_PIN W12 [get_ports {wr_data[0]}]; # "JB1"
  96. set_property PACKAGE_PIN W11 [get_ports {wr_data[1]}]; # "JB2"
  97. set_property PACKAGE_PIN V10 [get_ports {wr_data[2]}]; # "JB3"
  98. set_property PACKAGE_PIN W8 [get_ports {wr_data[3]}]; # "JB4"
  99. set_property PACKAGE_PIN V12 [get_ports {wr_data[4]}]; # "JB7"
  100. set_property PACKAGE_PIN W10 [get_ports {wr_data[5]}]; # "JB8"
  101. set_property PACKAGE_PIN V9 [get_ports {wr_data[6]}]; # "JB9"
  102. set_property PACKAGE_PIN V8 [get_ports {wr_data[7]}]; # "JB10"
  103. # ----------------------------------------------------------------------------
  104. # JC Pmod - Bank 13
  105. # ----------------------------------------------------------------------------
  106. set_property PACKAGE_PIN AB6 [get_ports {wr_data[8]}]; # "JC1_N"
  107. set_property PACKAGE_PIN AB7 [get_ports {wr_data[9]}]; # "JC1_P"
  108. set_property PACKAGE_PIN AA4 [get_ports {wr_data[10]}]; # "JC2_N"
  109. set_property PACKAGE_PIN Y4 [get_ports {wr_data[11]}]; # "JC2_P"
  110. set_property PACKAGE_PIN T6 [get_ports {wr_data[12]}]; # "JC3_N"
  111. set_property PACKAGE_PIN R6 [get_ports {wr_data[13]}]; # "JC3_P"
  112. set_property PACKAGE_PIN U4 [get_ports {wr_data[14]}]; # "JC4_N"
  113. set_property PACKAGE_PIN T4 [get_ports {wr_data[15]}]; # "JC4_P"
  114. # ----------------------------------------------------------------------------
  115. # JD Pmod - Bank 13
  116. # ----------------------------------------------------------------------------
  117. #set_property PACKAGE_PIN W7 [get_ports {JD1_N}]; # "JD1_N"
  118. #set_property PACKAGE_PIN V7 [get_ports {JD1_P}]; # "JD1_P"
  119. #set_property PACKAGE_PIN V4 [get_ports {JD2_N}]; # "JD2_N"
  120. #set_property PACKAGE_PIN V5 [get_ports {JD2_P}]; # "JD2_P"
  121. #set_property PACKAGE_PIN W5 [get_ports {JD3_N}]; # "JD3_N"
  122. #set_property PACKAGE_PIN W6 [get_ports {JD3_P}]; # "JD3_P"
  123. #set_property PACKAGE_PIN U5 [get_ports {JD4_N}]; # "JD4_N"
  124. #set_property PACKAGE_PIN U6 [get_ports {JD4_P}]; # "JD4_P"
  125. # ----------------------------------------------------------------------------
  126. # OLED Display - Bank 13
  127. # ----------------------------------------------------------------------------
  128. #set_property PACKAGE_PIN U10 [get_ports {OLED_DC}]; # "OLED-DC"
  129. #set_property PACKAGE_PIN U9 [get_ports {OLED_RES}]; # "OLED-RES"
  130. #set_property PACKAGE_PIN AB12 [get_ports {OLED_SCLK}]; # "OLED-SCLK"
  131. #set_property PACKAGE_PIN AA12 [get_ports {OLED_SDIN}]; # "OLED-SDIN"
  132. #set_property PACKAGE_PIN U11 [get_ports {OLED_VBAT}]; # "OLED-VBAT"
  133. #set_property PACKAGE_PIN U12 [get_ports {OLED_VDD}]; # "OLED-VDD"
  134. # ----------------------------------------------------------------------------
  135. # HDMI Output - Bank 33
  136. # ----------------------------------------------------------------------------
  137. #set_property PACKAGE_PIN W18 [get_ports {HD_CLK}]; # "HD-CLK"
  138. #set_property PACKAGE_PIN Y13 [get_ports {HD_D0}]; # "HD-D0"
  139. #set_property PACKAGE_PIN AA13 [get_ports {HD_D1}]; # "HD-D1"
  140. #set_property PACKAGE_PIN W13 [get_ports {HD_D10}]; # "HD-D10"
  141. #set_property PACKAGE_PIN W15 [get_ports {HD_D11}]; # "HD-D11"
  142. #set_property PACKAGE_PIN V15 [get_ports {HD_D12}]; # "HD-D12"
  143. #set_property PACKAGE_PIN U17 [get_ports {HD_D13}]; # "HD-D13"
  144. #set_property PACKAGE_PIN V14 [get_ports {HD_D14}]; # "HD-D14"
  145. #set_property PACKAGE_PIN V13 [get_ports {HS_D15}]; # "HD-D15"
  146. #set_property PACKAGE_PIN AA14 [get_ports {HD_D2}]; # "HD-D2"
  147. #set_property PACKAGE_PIN Y14 [get_ports {HD_D3}]; # "HD-D3"
  148. #set_property PACKAGE_PIN AB15 [get_ports {HD_D4}]; # "HD-D4"
  149. #set_property PACKAGE_PIN AB16 [get_ports {HD_D5}]; # "HD-D5"
  150. #set_property PACKAGE_PIN AA16 [get_ports {HD_D6}]; # "HD-D6"
  151. #set_property PACKAGE_PIN AB17 [get_ports {HD_D7}]; # "HD-D7"
  152. #set_property PACKAGE_PIN AA17 [get_ports {HD_D8}]; # "HD-D8"
  153. #set_property PACKAGE_PIN Y15 [get_ports {HD_D9}]; # "HD-D9"
  154. #set_property PACKAGE_PIN U16 [get_ports {HD_DE}]; # "HD-DE"
  155. #set_property PACKAGE_PIN V17 [get_ports {HD_HSYNC}]; # "HD-HSYNC"
  156. #set_property PACKAGE_PIN W16 [get_ports {HD_INT}]; # "HD-INT"
  157. #set_property PACKAGE_PIN AA18 [get_ports {HD_SCL}]; # "HD-SCL"
  158. #set_property PACKAGE_PIN Y16 [get_ports {HD_SDA}]; # "HD-SDA"
  159. #set_property PACKAGE_PIN U15 [get_ports {HD_SPDIF}]; # "HD-SPDIF"
  160. #set_property PACKAGE_PIN Y18 [get_ports {HD_SPDIFO}]; # "HD-SPDIFO"
  161. #set_property PACKAGE_PIN W17 [get_ports {HD_VSYNC}]; # "HD-VSYNC"
  162. # ----------------------------------------------------------------------------
  163. # User LEDs - Bank 33
  164. # ----------------------------------------------------------------------------
  165. set_property PACKAGE_PIN T22 [get_ports {led[0]}]; # "LD0"
  166. set_property PACKAGE_PIN T21 [get_ports {led[1]}]; # "LD1"
  167. set_property PACKAGE_PIN U22 [get_ports {led[2]}]; # "LD2"
  168. set_property PACKAGE_PIN U21 [get_ports {led[3]}]; # "LD3"
  169. set_property PACKAGE_PIN V22 [get_ports {led[4]}]; # "LD4"
  170. #set_property PACKAGE_PIN W22 [get_ports {led[5]}]; # "LD5"
  171. #set_property PACKAGE_PIN U19 [get_ports {led[6]}]; # "LD6"
  172. #set_property PACKAGE_PIN U14 [get_ports {led[7]}]; # "LD7"
  173. # ----------------------------------------------------------------------------
  174. # VGA Output - Bank 33
  175. # ----------------------------------------------------------------------------
  176. #set_property PACKAGE_PIN Y21 [get_ports {VGA_B1}]; # "VGA-B1"
  177. #set_property PACKAGE_PIN Y20 [get_ports {VGA_B2}]; # "VGA-B2"
  178. #set_property PACKAGE_PIN AB20 [get_ports {VGA_B3}]; # "VGA-B3"
  179. #set_property PACKAGE_PIN AB19 [get_ports {VGA_B4}]; # "VGA-B4"
  180. #set_property PACKAGE_PIN AB22 [get_ports {VGA_G1}]; # "VGA-G1"
  181. #set_property PACKAGE_PIN AA22 [get_ports {VGA_G2}]; # "VGA-G2"
  182. #set_property PACKAGE_PIN AB21 [get_ports {VGA_G3}]; # "VGA-G3"
  183. #set_property PACKAGE_PIN AA21 [get_ports {VGA_G4}]; # "VGA-G4"
  184. #set_property PACKAGE_PIN AA19 [get_ports {VGA_HS}]; # "VGA-HS"
  185. #set_property PACKAGE_PIN V20 [get_ports {VGA_R1}]; # "VGA-R1"
  186. #set_property PACKAGE_PIN U20 [get_ports {VGA_R2}]; # "VGA-R2"
  187. #set_property PACKAGE_PIN V19 [get_ports {VGA_R3}]; # "VGA-R3"
  188. #set_property PACKAGE_PIN V18 [get_ports {VGA_R4}]; # "VGA-R4"
  189. #set_property PACKAGE_PIN Y19 [get_ports {VGA_VS}]; # "VGA-VS"
  190. # ----------------------------------------------------------------------------
  191. # User Push Buttons - Bank 34
  192. # ----------------------------------------------------------------------------
  193. set_property PACKAGE_PIN P16 [get_ports {reset}]; # "BTNC"
  194. #set_property PACKAGE_PIN R16 [get_ports {BTND}]; # "BTND"
  195. #set_property PACKAGE_PIN N15 [get_ports {BTNL}]; # "BTNL"
  196. #set_property PACKAGE_PIN R18 [get_ports {BTNR}]; # "BTNR"
  197. #set_property PACKAGE_PIN T18 [get_ports {BTNU}]; # "BTNU"
  198. # ----------------------------------------------------------------------------
  199. # USB OTG Reset - Bank 34
  200. # ----------------------------------------------------------------------------
  201. #set_property PACKAGE_PIN L16 [get_ports {OTG_VBUSOC}]; # "OTG-VBUSOC"
  202. # ----------------------------------------------------------------------------
  203. # XADC GIO - Bank 34
  204. # ----------------------------------------------------------------------------
  205. #set_property PACKAGE_PIN H15 [get_ports {XADC_GIO0}]; # "XADC-GIO0"
  206. #set_property PACKAGE_PIN R15 [get_ports {XADC_GIO1}]; # "XADC-GIO1"
  207. #set_property PACKAGE_PIN K15 [get_ports {XADC_GIO2}]; # "XADC-GIO2"
  208. #set_property PACKAGE_PIN J15 [get_ports {XADC_GIO3}]; # "XADC-GIO3"
  209. # ----------------------------------------------------------------------------
  210. # Miscellaneous - Bank 34
  211. # ----------------------------------------------------------------------------
  212. #set_property PACKAGE_PIN K16 [get_ports {PUDC_B}]; # "PUDC_B"
  213. ## ----------------------------------------------------------------------------
  214. ## USB OTG Reset - Bank 35
  215. ## ----------------------------------------------------------------------------
  216. #set_property PACKAGE_PIN G17 [get_ports {OTG_RESETN}]; # "OTG-RESETN"
  217. ## ----------------------------------------------------------------------------
  218. ## User DIP Switches - Bank 35
  219. ## ----------------------------------------------------------------------------
  220. #set_property PACKAGE_PIN F22 [get_ports {SW0}]; # "SW0"
  221. #set_property PACKAGE_PIN G22 [get_ports {SW1}]; # "SW1"
  222. #set_property PACKAGE_PIN H22 [get_ports {SW2}]; # "SW2"
  223. #set_property PACKAGE_PIN F21 [get_ports {SW3}]; # "SW3"
  224. #set_property PACKAGE_PIN H19 [get_ports {SW4}]; # "SW4"
  225. #set_property PACKAGE_PIN H18 [get_ports {SW5}]; # "SW5"
  226. #set_property PACKAGE_PIN H17 [get_ports {SW6}]; # "SW6"
  227. #set_property PACKAGE_PIN M15 [get_ports {SW7}]; # "SW7"
  228. ## ----------------------------------------------------------------------------
  229. ## XADC AD Channels - Bank 35
  230. ## ----------------------------------------------------------------------------
  231. #set_property PACKAGE_PIN E16 [get_ports {AD0N_R}]; # "XADC-AD0N-R"
  232. #set_property PACKAGE_PIN F16 [get_ports {AD0P_R}]; # "XADC-AD0P-R"
  233. #set_property PACKAGE_PIN D17 [get_ports {AD8N_N}]; # "XADC-AD8N-R"
  234. #set_property PACKAGE_PIN D16 [get_ports {AD8P_R}]; # "XADC-AD8P-R"
  235. ## ----------------------------------------------------------------------------
  236. ## FMC Expansion Connector - Bank 13
  237. ## ----------------------------------------------------------------------------
  238. #set_property PACKAGE_PIN R7 [get_ports {FMC_SCL}]; # "FMC-SCL"
  239. #set_property PACKAGE_PIN U7 [get_ports {FMC_SDA}]; # "FMC-SDA"
  240. ## ----------------------------------------------------------------------------
  241. ## FMC Expansion Connector - Bank 33
  242. ## ----------------------------------------------------------------------------
  243. #set_property PACKAGE_PIN AB14 [get_ports {FMC_PRSNT}]; # "FMC-PRSNT"
  244. ## ----------------------------------------------------------------------------
  245. ## FMC Expansion Connector - Bank 34
  246. ## ----------------------------------------------------------------------------
  247. #set_property PACKAGE_PIN L19 [get_ports {FMC_CLK0_N}]; # "FMC-CLK0_N"
  248. #set_property PACKAGE_PIN L18 [get_ports {FMC_CLK0_P}]; # "FMC-CLK0_P"
  249. #set_property PACKAGE_PIN M20 [get_ports {FMC_LA00_CC_N}]; # "FMC-LA00_CC_N"
  250. #set_property PACKAGE_PIN M19 [get_ports {FMC_LA00_CC_P}]; # "FMC-LA00_CC_P"
  251. #set_property PACKAGE_PIN N20 [get_ports {FMC_LA01_CC_N}]; # "FMC-LA01_CC_N"
  252. #set_property PACKAGE_PIN N19 [get_ports {FMC_LA01_CC_P}]; # "FMC-LA01_CC_P" - corrected 6/6/16 GE
  253. #set_property PACKAGE_PIN P18 [get_ports {FMC_LA02_N}]; # "FMC-LA02_N"
  254. #set_property PACKAGE_PIN P17 [get_ports {FMC_LA02_P}]; # "FMC-LA02_P"
  255. #set_property PACKAGE_PIN P22 [get_ports {FMC_LA03_N}]; # "FMC-LA03_N"
  256. #set_property PACKAGE_PIN N22 [get_ports {FMC_LA03_P}]; # "FMC-LA03_P"
  257. #set_property PACKAGE_PIN M22 [get_ports {FMC_LA04_N}]; # "FMC-LA04_N"
  258. #set_property PACKAGE_PIN M21 [get_ports {FMC_LA04_P}]; # "FMC-LA04_P"
  259. #set_property PACKAGE_PIN K18 [get_ports {FMC_LA05_N}]; # "FMC-LA05_N"
  260. #set_property PACKAGE_PIN J18 [get_ports {FMC_LA05_P}]; # "FMC-LA05_P"
  261. #set_property PACKAGE_PIN L22 [get_ports {FMC_LA06_N}]; # "FMC-LA06_N"
  262. #set_property PACKAGE_PIN L21 [get_ports {FMC_LA06_P}]; # "FMC-LA06_P"
  263. #set_property PACKAGE_PIN T17 [get_ports {FMC_LA07_N}]; # "FMC-LA07_N"
  264. #set_property PACKAGE_PIN T16 [get_ports {FMC_LA07_P}]; # "FMC-LA07_P"
  265. #set_property PACKAGE_PIN J22 [get_ports {FMC_LA08_N}]; # "FMC-LA08_N"
  266. #set_property PACKAGE_PIN J21 [get_ports {FMC_LA08_P}]; # "FMC-LA08_P"
  267. #set_property PACKAGE_PIN R21 [get_ports {FMC_LA09_N}]; # "FMC-LA09_N"
  268. #set_property PACKAGE_PIN R20 [get_ports {FMC_LA09_P}]; # "FMC-LA09_P"
  269. #set_property PACKAGE_PIN T19 [get_ports {FMC_LA10_N}]; # "FMC-LA10_N"
  270. #set_property PACKAGE_PIN R19 [get_ports {FMC_LA10_P}]; # "FMC-LA10_P"
  271. #set_property PACKAGE_PIN N18 [get_ports {FMC_LA11_N}]; # "FMC-LA11_N"
  272. #set_property PACKAGE_PIN N17 [get_ports {FMC_LA11_P}]; # "FMC-LA11_P"
  273. #set_property PACKAGE_PIN P21 [get_ports {FMC_LA12_N}]; # "FMC-LA12_N"
  274. #set_property PACKAGE_PIN P20 [get_ports {FMC_LA12_P}]; # "FMC-LA12_P"
  275. #set_property PACKAGE_PIN M17 [get_ports {FMC_LA13_N}]; # "FMC-LA13_N"
  276. #set_property PACKAGE_PIN L17 [get_ports {FMC_LA13_P}]; # "FMC-LA13_P"
  277. #set_property PACKAGE_PIN K20 [get_ports {FMC_LA14_N}]; # "FMC-LA14_N"
  278. #set_property PACKAGE_PIN K19 [get_ports {FMC_LA14_P}]; # "FMC-LA14_P"
  279. #set_property PACKAGE_PIN J17 [get_ports {FMC_LA15_N}]; # "FMC-LA15_N"
  280. #set_property PACKAGE_PIN J16 [get_ports {FMC_LA15_P}]; # "FMC-LA15_P"
  281. #set_property PACKAGE_PIN K21 [get_ports {FMC_LA16_N}]; # "FMC-LA16_N"
  282. #set_property PACKAGE_PIN J20 [get_ports {FMC_LA16_P}]; # "FMC-LA16_P"
  283. ## ----------------------------------------------------------------------------
  284. ## FMC Expansion Connector - Bank 35
  285. ## ----------------------------------------------------------------------------
  286. #set_property PACKAGE_PIN C19 [get_ports {FMC_CLK1_N}]; # "FMC-CLK1_N"
  287. #set_property PACKAGE_PIN D18 [get_ports {FMC_CLK1_P}]; # "FMC-CLK1_P"
  288. #set_property PACKAGE_PIN B20 [get_ports {FMC_LA17_CC_N}]; # "FMC-LA17_CC_N"
  289. #set_property PACKAGE_PIN B19 [get_ports {FMC_LA17_CC_P}]; # "FMC-LA17_CC_P"
  290. #set_property PACKAGE_PIN C20 [get_ports {FMC_LA18_CC_N}]; # "FMC-LA18_CC_N"
  291. #set_property PACKAGE_PIN D20 [get_ports {FMC_LA18_CC_P}]; # "FMC-LA18_CC_P"
  292. #set_property PACKAGE_PIN G16 [get_ports {FMC_LA19_N}]; # "FMC-LA19_N"
  293. #set_property PACKAGE_PIN G15 [get_ports {FMC_LA19_P}]; # "FMC-LA19_P"
  294. #set_property PACKAGE_PIN G21 [get_ports {FMC_LA20_N}]; # "FMC-LA20_N"
  295. #set_property PACKAGE_PIN G20 [get_ports {FMC_LA20_P}]; # "FMC-LA20_P"
  296. #set_property PACKAGE_PIN E20 [get_ports {FMC_LA21_N}]; # "FMC-LA21_N"
  297. #set_property PACKAGE_PIN E19 [get_ports {FMC_LA21_P}]; # "FMC-LA21_P"
  298. #set_property PACKAGE_PIN F19 [get_ports {FMC_LA22_N}]; # "FMC-LA22_N"
  299. #set_property PACKAGE_PIN G19 [get_ports {FMC_LA22_P}]; # "FMC-LA22_P"
  300. #set_property PACKAGE_PIN D15 [get_ports {FMC_LA23_N}]; # "FMC-LA23_N"
  301. #set_property PACKAGE_PIN E15 [get_ports {FMC_LA23_P}]; # "FMC-LA23_P"
  302. #set_property PACKAGE_PIN A19 [get_ports {FMC_LA24_N}]; # "FMC-LA24_N"
  303. #set_property PACKAGE_PIN A18 [get_ports {FMC_LA24_P}]; # "FMC-LA24_P"
  304. #set_property PACKAGE_PIN C22 [get_ports {FMC_LA25_N}]; # "FMC-LA25_N"
  305. #set_property PACKAGE_PIN D22 [get_ports {FMC_LA25_P}]; # "FMC-LA25_P"
  306. #set_property PACKAGE_PIN E18 [get_ports {FMC_LA26_N}]; # "FMC-LA26_N"
  307. #set_property PACKAGE_PIN F18 [get_ports {FMC_LA26_P}]; # "FMC-LA26_P"
  308. #set_property PACKAGE_PIN D21 [get_ports {FMC_LA27_N}]; # "FMC-LA27_N"
  309. #set_property PACKAGE_PIN E21 [get_ports {FMC_LA27_P}]; # "FMC-LA27_P"
  310. #set_property PACKAGE_PIN A17 [get_ports {FMC_LA28_N}]; # "FMC-LA28_N"
  311. #set_property PACKAGE_PIN A16 [get_ports {FMC_LA28_P}]; # "FMC-LA28_P"
  312. #set_property PACKAGE_PIN C18 [get_ports {FMC_LA29_N}]; # "FMC-LA29_N"
  313. #set_property PACKAGE_PIN C17 [get_ports {FMC_LA29_P}]; # "FMC-LA29_P"
  314. #set_property PACKAGE_PIN B15 [get_ports {FMC_LA30_N}]; # "FMC-LA30_N"
  315. #set_property PACKAGE_PIN C15 [get_ports {FMC_LA30_P}]; # "FMC-LA30_P"
  316. #set_property PACKAGE_PIN B17 [get_ports {FMC_LA31_N}]; # "FMC-LA31_N"
  317. #set_property PACKAGE_PIN B16 [get_ports {FMC_LA31_P}]; # "FMC-LA31_P"
  318. #set_property PACKAGE_PIN A22 [get_ports {FMC_LA32_N}]; # "FMC-LA32_N"
  319. #set_property PACKAGE_PIN A21 [get_ports {FMC_LA32_P}]; # "FMC-LA32_P"
  320. #set_property PACKAGE_PIN B22 [get_ports {FMC_LA33_N}]; # "FMC-LA33_N"
  321. #set_property PACKAGE_PIN B21 [get_ports {FMC_LA33_P}]; # "FMC-LA33_P"
  322. # ----------------------------------------------------------------------------
  323. # IOSTANDARD Constraints
  324. #
  325. # Note that these IOSTANDARD constraints are applied to all IOs currently
  326. # assigned within an I/O bank. If these IOSTANDARD constraints are
  327. # evaluated prior to other PACKAGE_PIN constraints being applied, then
  328. # the IOSTANDARD specified will likely not be applied properly to those
  329. # pins. Therefore, bank wide IOSTANDARD constraints should be placed
  330. # within the XDC file in a location that is evaluated AFTER all
  331. # PACKAGE_PIN constraints within the target bank have been evaluated.
  332. #
  333. # Un-comment one or more of the following IOSTANDARD constraints according to
  334. # the bank pin assignments that are required within a design.
  335. # ----------------------------------------------------------------------------
  336. # define wr_clk associated pin as a clock source with 200 MHz
  337. create_clock -name wr_clk -period 5 [get_ports {wr_clk}];
  338. # Note that the bank voltage for IO Bank 33 is fixed to 3.3V on ZedBoard.
  339. set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 33]];
  340. # Set the bank voltage for IO Bank 34 to 1.8V by default.
  341. # set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 34]];
  342. # set_property IOSTANDARD LVCMOS25 [get_ports -of_objects [get_iobanks 34]];
  343. set_property IOSTANDARD LVCMOS18 [get_ports -of_objects [get_iobanks 34]];
  344. # Set the bank voltage for IO Bank 35 to 1.8V by default.
  345. # set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 35]];
  346. # set_property IOSTANDARD LVCMOS25 [get_ports -of_objects [get_iobanks 35]];
  347. #set_property IOSTANDARD LVCMOS18 [get_ports -of_objects [get_iobanks 35]];
  348. # Note that the bank voltage for IO Bank 13 is fixed to 3.3V on ZedBoard.
  349. set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 13]];