ci_mul_hw.tcl 1.8 KB

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  1. # TCL File Generated by Component Editor 22.1
  2. # Sat Oct 21 13:18:33 CEST 2023
  3. # DO NOT MODIFY
  4. #
  5. # ci_mul "ci_mul" v1.0
  6. # 2023.10.21.13:18:33
  7. # custom instruction multiplier
  8. #
  9. #
  10. # request TCL package from ACDS 16.1
  11. #
  12. package require -exact qsys 16.1
  13. #
  14. # module ci_mul
  15. #
  16. set_module_property DESCRIPTION "custom instruction multiplier"
  17. set_module_property NAME ci_mul
  18. set_module_property VERSION 1.0
  19. set_module_property INTERNAL false
  20. set_module_property OPAQUE_ADDRESS_MAP true
  21. set_module_property AUTHOR ""
  22. set_module_property DISPLAY_NAME ci_mul
  23. set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
  24. set_module_property EDITABLE true
  25. set_module_property REPORT_TO_TALKBACK false
  26. set_module_property ALLOW_GREYBOX_GENERATION false
  27. set_module_property REPORT_HIERARCHY false
  28. #
  29. # file sets
  30. #
  31. add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
  32. set_fileset_property QUARTUS_SYNTH TOP_LEVEL ci_mul
  33. set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
  34. set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
  35. add_fileset_file ci_mul.vhd VHDL PATH ../vhdl/mul/ci_mul.vhd TOP_LEVEL_FILE
  36. #
  37. # parameters
  38. #
  39. #
  40. # display items
  41. #
  42. #
  43. # connection point ci_mul
  44. #
  45. add_interface ci_mul nios_custom_instruction end
  46. set_interface_property ci_mul clockCycle 2
  47. set_interface_property ci_mul operands 2
  48. set_interface_property ci_mul ENABLED true
  49. set_interface_property ci_mul EXPORT_OF ""
  50. set_interface_property ci_mul PORT_NAME_MAP ""
  51. set_interface_property ci_mul CMSIS_SVD_VARIABLES ""
  52. set_interface_property ci_mul SVD_ADDRESS_GROUP ""
  53. add_interface_port ci_mul clk_en clk_en Input 1
  54. add_interface_port ci_mul dataa dataa Input 32
  55. add_interface_port ci_mul datab datab Input 32
  56. add_interface_port ci_mul result result Output 32
  57. add_interface_port ci_mul clk clk Input 1
  58. add_interface_port ci_mul reset reset Input 1