# TCL File Generated by Component Editor 22.1
# Fri Oct 27 15:17:16 CEST 2023
# DO NOT MODIFY


# 
# avalon_mm_sqrt "avalon_mm_sqrt" v1.0
#  2023.10.27.15:17:16
# memory-mapped sqrt comonentp
# 

# 
# request TCL package from ACDS 16.1
# 
package require -exact qsys 16.1


# 
# module avalon_mm_sqrt
# 
set_module_property DESCRIPTION "memory-mapped sqrt comonentp"
set_module_property NAME avalon_mm_sqrt
set_module_property VERSION 1.0
set_module_property INTERNAL false
set_module_property OPAQUE_ADDRESS_MAP true
set_module_property AUTHOR ""
set_module_property DISPLAY_NAME avalon_mm_sqrt
set_module_property INSTANTIATE_IN_SYSTEM_MODULE true
set_module_property EDITABLE true
set_module_property REPORT_TO_TALKBACK false
set_module_property ALLOW_GREYBOX_GENERATION false
set_module_property REPORT_HIERARCHY false


# 
# file sets
# 
add_fileset QUARTUS_SYNTH QUARTUS_SYNTH "" ""
set_fileset_property QUARTUS_SYNTH TOP_LEVEL avalon_mm_sqrt
set_fileset_property QUARTUS_SYNTH ENABLE_RELATIVE_INCLUDE_PATHS false
set_fileset_property QUARTUS_SYNTH ENABLE_FILE_OVERWRITE_MODE false
add_fileset_file mm_avalon_sqrt.vhd VHDL PATH ../vhdl/sqrt/mm_avalon_sqrt.vhd TOP_LEVEL_FILE


# 
# parameters
# 


# 
# display items
# 


# 
# connection point clock
# 
add_interface clock clock end
set_interface_property clock clockRate 0
set_interface_property clock ENABLED true
set_interface_property clock EXPORT_OF ""
set_interface_property clock PORT_NAME_MAP ""
set_interface_property clock CMSIS_SVD_VARIABLES ""
set_interface_property clock SVD_ADDRESS_GROUP ""

add_interface_port clock clk clk Input 1


# 
# connection point reset
# 
add_interface reset reset end
set_interface_property reset associatedClock clock
set_interface_property reset synchronousEdges DEASSERT
set_interface_property reset ENABLED true
set_interface_property reset EXPORT_OF ""
set_interface_property reset PORT_NAME_MAP ""
set_interface_property reset CMSIS_SVD_VARIABLES ""
set_interface_property reset SVD_ADDRESS_GROUP ""

add_interface_port reset res_n reset_n Input 1


# 
# connection point avalon_mm_sqrt
# 
add_interface avalon_mm_sqrt avalon end
set_interface_property avalon_mm_sqrt addressUnits WORDS
set_interface_property avalon_mm_sqrt associatedClock clock
set_interface_property avalon_mm_sqrt associatedReset reset
set_interface_property avalon_mm_sqrt bitsPerSymbol 8
set_interface_property avalon_mm_sqrt burstOnBurstBoundariesOnly false
set_interface_property avalon_mm_sqrt burstcountUnits WORDS
set_interface_property avalon_mm_sqrt explicitAddressSpan 0
set_interface_property avalon_mm_sqrt holdTime 0
set_interface_property avalon_mm_sqrt linewrapBursts false
set_interface_property avalon_mm_sqrt maximumPendingReadTransactions 0
set_interface_property avalon_mm_sqrt maximumPendingWriteTransactions 0
set_interface_property avalon_mm_sqrt readLatency 0
set_interface_property avalon_mm_sqrt readWaitStates 0
set_interface_property avalon_mm_sqrt readWaitTime 0
set_interface_property avalon_mm_sqrt setupTime 0
set_interface_property avalon_mm_sqrt timingUnits Cycles
set_interface_property avalon_mm_sqrt writeWaitTime 0
set_interface_property avalon_mm_sqrt ENABLED true
set_interface_property avalon_mm_sqrt EXPORT_OF ""
set_interface_property avalon_mm_sqrt PORT_NAME_MAP ""
set_interface_property avalon_mm_sqrt CMSIS_SVD_VARIABLES ""
set_interface_property avalon_mm_sqrt SVD_ADDRESS_GROUP ""

add_interface_port avalon_mm_sqrt address address Input 1
add_interface_port avalon_mm_sqrt write write Input 1
add_interface_port avalon_mm_sqrt read read Input 1
add_interface_port avalon_mm_sqrt writedata writedata Input 32
add_interface_port avalon_mm_sqrt readdata readdata Output 32
set_interface_assignment avalon_mm_sqrt embeddedsw.configuration.isFlash 0
set_interface_assignment avalon_mm_sqrt embeddedsw.configuration.isMemoryDevice 0
set_interface_assignment avalon_mm_sqrt embeddedsw.configuration.isNonVolatileStorage 0
set_interface_assignment avalon_mm_sqrt embeddedsw.configuration.isPrintableDevice 0

