pfc-sh7722.c 51 KB

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  1. #include <linux/init.h>
  2. #include <linux/kernel.h>
  3. #include <linux/gpio.h>
  4. #include <cpu/sh7722.h>
  5. #include "sh_pfc.h"
  6. enum {
  7. PINMUX_RESERVED = 0,
  8. PINMUX_DATA_BEGIN,
  9. PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
  10. PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA,
  11. PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
  12. PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA,
  13. PTC7_DATA, PTC5_DATA, PTC4_DATA, PTC3_DATA, PTC2_DATA, PTC0_DATA,
  14. PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
  15. PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA,
  16. PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA, PTE1_DATA, PTE0_DATA,
  17. PTF6_DATA, PTF5_DATA, PTF4_DATA,
  18. PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA,
  19. PTG4_DATA, PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA,
  20. PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
  21. PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA,
  22. PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, PTJ1_DATA, PTJ0_DATA,
  23. PTK6_DATA, PTK5_DATA, PTK4_DATA,
  24. PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA,
  25. PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
  26. PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA,
  27. PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
  28. PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA,
  29. PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
  30. PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA,
  31. PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
  32. PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA,
  33. PTR4_DATA, PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA,
  34. PTS4_DATA, PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA,
  35. PTT4_DATA, PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA,
  36. PTU4_DATA, PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA,
  37. PTV4_DATA, PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA,
  38. PTW6_DATA, PTW5_DATA, PTW4_DATA,
  39. PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA,
  40. PTX6_DATA, PTX5_DATA, PTX4_DATA,
  41. PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA,
  42. PTY6_DATA, PTY5_DATA, PTY4_DATA,
  43. PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA,
  44. PTZ5_DATA, PTZ4_DATA, PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA,
  45. PINMUX_DATA_END,
  46. PINMUX_INPUT_BEGIN,
  47. PTA7_IN, PTA6_IN, PTA5_IN, PTA4_IN,
  48. PTA3_IN, PTA2_IN, PTA1_IN, PTA0_IN,
  49. PTB7_IN, PTB6_IN, PTB5_IN, PTB4_IN,
  50. PTB3_IN, PTB2_IN, PTB1_IN, PTB0_IN,
  51. PTC7_IN, PTC5_IN, PTC4_IN, PTC3_IN, PTC2_IN, PTC0_IN,
  52. PTD7_IN, PTD6_IN, PTD5_IN, PTD4_IN, PTD3_IN, PTD2_IN, PTD1_IN,
  53. PTE7_IN, PTE6_IN, PTE5_IN, PTE4_IN, PTE1_IN, PTE0_IN,
  54. PTF6_IN, PTF5_IN, PTF4_IN, PTF3_IN, PTF2_IN, PTF1_IN,
  55. PTH6_IN, PTH5_IN, PTH1_IN, PTH0_IN,
  56. PTJ1_IN, PTJ0_IN,
  57. PTK6_IN, PTK5_IN, PTK4_IN, PTK3_IN, PTK2_IN, PTK0_IN,
  58. PTL7_IN, PTL6_IN, PTL5_IN, PTL4_IN,
  59. PTL3_IN, PTL2_IN, PTL1_IN, PTL0_IN,
  60. PTM7_IN, PTM6_IN, PTM5_IN, PTM4_IN,
  61. PTM3_IN, PTM2_IN, PTM1_IN, PTM0_IN,
  62. PTN7_IN, PTN6_IN, PTN5_IN, PTN4_IN,
  63. PTN3_IN, PTN2_IN, PTN1_IN, PTN0_IN,
  64. PTQ5_IN, PTQ4_IN, PTQ3_IN, PTQ2_IN, PTQ0_IN,
  65. PTR2_IN,
  66. PTS4_IN, PTS2_IN, PTS1_IN,
  67. PTT4_IN, PTT3_IN, PTT2_IN, PTT1_IN,
  68. PTU4_IN, PTU3_IN, PTU2_IN, PTU1_IN, PTU0_IN,
  69. PTV4_IN, PTV3_IN, PTV2_IN, PTV1_IN, PTV0_IN,
  70. PTW6_IN, PTW4_IN, PTW3_IN, PTW2_IN, PTW1_IN, PTW0_IN,
  71. PTX6_IN, PTX5_IN, PTX4_IN, PTX3_IN, PTX2_IN, PTX1_IN, PTX0_IN,
  72. PTY5_IN, PTY4_IN, PTY3_IN, PTY2_IN, PTY0_IN,
  73. PTZ5_IN, PTZ4_IN, PTZ3_IN, PTZ2_IN, PTZ1_IN,
  74. PINMUX_INPUT_END,
  75. PINMUX_OUTPUT_BEGIN,
  76. PTA7_OUT, PTA5_OUT,
  77. PTB7_OUT, PTB6_OUT, PTB5_OUT, PTB4_OUT,
  78. PTB3_OUT, PTB2_OUT, PTB1_OUT, PTB0_OUT,
  79. PTC4_OUT, PTC3_OUT, PTC2_OUT, PTC0_OUT,
  80. PTD6_OUT, PTD5_OUT, PTD4_OUT,
  81. PTD3_OUT, PTD2_OUT, PTD1_OUT, PTD0_OUT,
  82. PTE7_OUT, PTE6_OUT, PTE5_OUT, PTE4_OUT, PTE1_OUT, PTE0_OUT,
  83. PTF6_OUT, PTF5_OUT, PTF4_OUT, PTF3_OUT, PTF2_OUT, PTF0_OUT,
  84. PTG4_OUT, PTG3_OUT, PTG2_OUT, PTG1_OUT, PTG0_OUT,
  85. PTH7_OUT, PTH6_OUT, PTH5_OUT, PTH4_OUT,
  86. PTH3_OUT, PTH2_OUT, PTH1_OUT, PTH0_OUT,
  87. PTJ7_OUT, PTJ6_OUT, PTJ5_OUT, PTJ1_OUT, PTJ0_OUT,
  88. PTK6_OUT, PTK5_OUT, PTK4_OUT, PTK3_OUT, PTK1_OUT, PTK0_OUT,
  89. PTL7_OUT, PTL6_OUT, PTL5_OUT, PTL4_OUT,
  90. PTL3_OUT, PTL2_OUT, PTL1_OUT, PTL0_OUT,
  91. PTM7_OUT, PTM6_OUT, PTM5_OUT, PTM4_OUT,
  92. PTM3_OUT, PTM2_OUT, PTM1_OUT, PTM0_OUT,
  93. PTN7_OUT, PTN6_OUT, PTN5_OUT, PTN4_OUT,
  94. PTN3_OUT, PTN2_OUT, PTN1_OUT, PTN0_OUT, PTQ6_OUT, PTQ5_OUT, PTQ4_OUT,
  95. PTQ3_OUT, PTQ2_OUT, PTQ1_OUT, PTQ0_OUT,
  96. PTR4_OUT, PTR3_OUT, PTR1_OUT, PTR0_OUT,
  97. PTS3_OUT, PTS2_OUT, PTS0_OUT,
  98. PTT4_OUT, PTT3_OUT, PTT2_OUT, PTT0_OUT,
  99. PTU4_OUT, PTU3_OUT, PTU2_OUT, PTU0_OUT,
  100. PTV4_OUT, PTV3_OUT, PTV2_OUT, PTV1_OUT, PTV0_OUT,
  101. PTW5_OUT, PTW4_OUT, PTW3_OUT, PTW2_OUT, PTW1_OUT, PTW0_OUT,
  102. PTX6_OUT, PTX5_OUT, PTX4_OUT, PTX3_OUT, PTX2_OUT, PTX1_OUT, PTX0_OUT,
  103. PTY5_OUT, PTY4_OUT, PTY3_OUT, PTY2_OUT, PTY1_OUT, PTY0_OUT,
  104. PINMUX_OUTPUT_END,
  105. PINMUX_MARK_BEGIN,
  106. SCIF0_TXD_MARK, SCIF0_RXD_MARK,
  107. SCIF0_RTS_MARK, SCIF0_CTS_MARK, SCIF0_SCK_MARK,
  108. SCIF1_TXD_MARK, SCIF1_RXD_MARK,
  109. SCIF1_RTS_MARK, SCIF1_CTS_MARK, SCIF1_SCK_MARK,
  110. SCIF2_TXD_MARK, SCIF2_RXD_MARK,
  111. SCIF2_RTS_MARK, SCIF2_CTS_MARK, SCIF2_SCK_MARK,
  112. SIOTXD_MARK, SIORXD_MARK,
  113. SIOD_MARK, SIOSTRB0_MARK, SIOSTRB1_MARK,
  114. SIOSCK_MARK, SIOMCK_MARK,
  115. VIO_D15_MARK, VIO_D14_MARK, VIO_D13_MARK, VIO_D12_MARK,
  116. VIO_D11_MARK, VIO_D10_MARK, VIO_D9_MARK, VIO_D8_MARK,
  117. VIO_D7_MARK, VIO_D6_MARK, VIO_D5_MARK, VIO_D4_MARK,
  118. VIO_D3_MARK, VIO_D2_MARK, VIO_D1_MARK, VIO_D0_MARK,
  119. VIO_CLK_MARK, VIO_VD_MARK, VIO_HD_MARK, VIO_FLD_MARK,
  120. VIO_CKO_MARK, VIO_STEX_MARK, VIO_STEM_MARK, VIO_VD2_MARK,
  121. VIO_HD2_MARK, VIO_CLK2_MARK,
  122. LCDD23_MARK, LCDD22_MARK, LCDD21_MARK, LCDD20_MARK,
  123. LCDD19_MARK, LCDD18_MARK, LCDD17_MARK, LCDD16_MARK,
  124. LCDD15_MARK, LCDD14_MARK, LCDD13_MARK, LCDD12_MARK,
  125. LCDD11_MARK, LCDD10_MARK, LCDD9_MARK, LCDD8_MARK,
  126. LCDD7_MARK, LCDD6_MARK, LCDD5_MARK, LCDD4_MARK,
  127. LCDD3_MARK, LCDD2_MARK, LCDD1_MARK, LCDD0_MARK,
  128. LCDLCLK_MARK, LCDDON_MARK, LCDVCPWC_MARK, LCDVEPWC_MARK,
  129. LCDVSYN_MARK, LCDDCK_MARK, LCDHSYN_MARK, LCDDISP_MARK,
  130. LCDRS_MARK, LCDCS_MARK, LCDWR_MARK, LCDRD_MARK,
  131. LCDDON2_MARK, LCDVCPWC2_MARK, LCDVEPWC2_MARK, LCDVSYN2_MARK,
  132. LCDCS2_MARK,
  133. IOIS16_MARK, A25_MARK, A24_MARK, A23_MARK, A22_MARK,
  134. BS_MARK, CS6B_CE1B_MARK, WAIT_MARK, CS6A_CE2B_MARK,
  135. HPD63_MARK, HPD62_MARK, HPD61_MARK, HPD60_MARK,
  136. HPD59_MARK, HPD58_MARK, HPD57_MARK, HPD56_MARK,
  137. HPD55_MARK, HPD54_MARK, HPD53_MARK, HPD52_MARK,
  138. HPD51_MARK, HPD50_MARK, HPD49_MARK, HPD48_MARK,
  139. HPDQM7_MARK, HPDQM6_MARK, HPDQM5_MARK, HPDQM4_MARK,
  140. IRQ0_MARK, IRQ1_MARK, IRQ2_MARK, IRQ3_MARK,
  141. IRQ4_MARK, IRQ5_MARK, IRQ6_MARK, IRQ7_MARK,
  142. SDHICD_MARK, SDHIWP_MARK, SDHID3_MARK, SDHID2_MARK,
  143. SDHID1_MARK, SDHID0_MARK, SDHICMD_MARK, SDHICLK_MARK,
  144. SIUAOLR_MARK, SIUAOBT_MARK, SIUAISLD_MARK, SIUAILR_MARK,
  145. SIUAIBT_MARK, SIUAOSLD_MARK, SIUMCKA_MARK, SIUFCKA_MARK,
  146. SIUBOLR_MARK, SIUBOBT_MARK, SIUBISLD_MARK, SIUBILR_MARK,
  147. SIUBIBT_MARK, SIUBOSLD_MARK, SIUMCKB_MARK, SIUFCKB_MARK,
  148. AUDSYNC_MARK, AUDATA3_MARK, AUDATA2_MARK, AUDATA1_MARK, AUDATA0_MARK,
  149. DACK_MARK, DREQ0_MARK,
  150. DV_CLKI_MARK, DV_CLK_MARK, DV_HSYNC_MARK, DV_VSYNC_MARK,
  151. DV_D15_MARK, DV_D14_MARK, DV_D13_MARK, DV_D12_MARK,
  152. DV_D11_MARK, DV_D10_MARK, DV_D9_MARK, DV_D8_MARK,
  153. DV_D7_MARK, DV_D6_MARK, DV_D5_MARK, DV_D4_MARK,
  154. DV_D3_MARK, DV_D2_MARK, DV_D1_MARK, DV_D0_MARK,
  155. STATUS0_MARK, PDSTATUS_MARK,
  156. SIOF0_MCK_MARK, SIOF0_SCK_MARK,
  157. SIOF0_SYNC_MARK, SIOF0_SS1_MARK, SIOF0_SS2_MARK,
  158. SIOF0_TXD_MARK, SIOF0_RXD_MARK,
  159. SIOF1_MCK_MARK, SIOF1_SCK_MARK,
  160. SIOF1_SYNC_MARK, SIOF1_SS1_MARK, SIOF1_SS2_MARK,
  161. SIOF1_TXD_MARK, SIOF1_RXD_MARK,
  162. SIM_D_MARK, SIM_CLK_MARK, SIM_RST_MARK,
  163. TS_SDAT_MARK, TS_SCK_MARK, TS_SDEN_MARK, TS_SPSYNC_MARK,
  164. IRDA_IN_MARK, IRDA_OUT_MARK,
  165. TPUTO_MARK,
  166. FCE_MARK, NAF7_MARK, NAF6_MARK, NAF5_MARK, NAF4_MARK,
  167. NAF3_MARK, NAF2_MARK, NAF1_MARK, NAF0_MARK, FCDE_MARK,
  168. FOE_MARK, FSC_MARK, FWE_MARK, FRB_MARK,
  169. KEYIN0_MARK, KEYIN1_MARK, KEYIN2_MARK, KEYIN3_MARK, KEYIN4_MARK,
  170. KEYOUT0_MARK, KEYOUT1_MARK, KEYOUT2_MARK, KEYOUT3_MARK,
  171. KEYOUT4_IN6_MARK, KEYOUT5_IN5_MARK,
  172. PINMUX_MARK_END,
  173. PINMUX_FUNCTION_BEGIN,
  174. VIO_D7_SCIF1_SCK, VIO_D6_SCIF1_RXD, VIO_D5_SCIF1_TXD, VIO_D4,
  175. VIO_D3, VIO_D2, VIO_D1, VIO_D0_LCDLCLK,
  176. HPD55, HPD54, HPD53, HPD52, HPD51, HPD50, HPD49, HPD48,
  177. IOIS16, HPDQM7, HPDQM6, HPDQM5, HPDQM4,
  178. SDHICD, SDHIWP, SDHID3, IRQ2_SDHID2, SDHID1, SDHID0, SDHICMD, SDHICLK,
  179. A25, A24, A23, A22, IRQ5, IRQ4_BS,
  180. PTF6, SIOSCK_SIUBOBT, SIOSTRB1_SIUBOLR,
  181. SIOSTRB0_SIUBIBT, SIOD_SIUBILR, SIORXD_SIUBISLD, SIOTXD_SIUBOSLD,
  182. AUDSYNC, AUDATA3, AUDATA2, AUDATA1, AUDATA0,
  183. LCDVCPWC_LCDVCPWC2, LCDVSYN2_DACK, LCDVSYN, LCDDISP_LCDRS,
  184. LCDHSYN_LCDCS, LCDDON_LCDDON2, LCDD17_DV_HSYNC, LCDD16_DV_VSYNC,
  185. STATUS0, PDSTATUS, IRQ1, IRQ0,
  186. SIUAILR_SIOF1_SS2, SIUAIBT_SIOF1_SS1, SIUAOLR_SIOF1_SYNC,
  187. SIUAOBT_SIOF1_SCK, SIUAISLD_SIOF1_RXD, SIUAOSLD_SIOF1_TXD, PTK0,
  188. LCDD15_DV_D15, LCDD14_DV_D14, LCDD13_DV_D13, LCDD12_DV_D12,
  189. LCDD11_DV_D11, LCDD10_DV_D10, LCDD9_DV_D9, LCDD8_DV_D8,
  190. LCDD7_DV_D7, LCDD6_DV_D6, LCDD5_DV_D5, LCDD4_DV_D4,
  191. LCDD3_DV_D3, LCDD2_DV_D2, LCDD1_DV_D1, LCDD0_DV_D0,
  192. HPD63, HPD62, HPD61, HPD60, HPD59, HPD58, HPD57, HPD56,
  193. SIOF0_SS2_SIM_RST, SIOF0_SS1_TS_SPSYNC, SIOF0_SYNC_TS_SDEN,
  194. SIOF0_SCK_TS_SCK, PTQ2, PTQ1, PTQ0,
  195. LCDRD, CS6B_CE1B_LCDCS2, WAIT, LCDDCK_LCDWR, LCDVEPWC_LCDVEPWC2,
  196. SCIF0_CTS_SIUAISPD, SCIF0_RTS_SIUAOSPD,
  197. SCIF0_SCK_TPUTO, SCIF0_RXD, SCIF0_TXD,
  198. FOE_VIO_VD2, FWE, FSC, DREQ0, FCDE,
  199. NAF2_VIO_D10, NAF1_VIO_D9, NAF0_VIO_D8,
  200. FRB_VIO_CLK2, FCE_VIO_HD2,
  201. NAF7_VIO_D15, NAF6_VIO_D14, NAF5_VIO_D13, NAF4_VIO_D12, NAF3_VIO_D11,
  202. VIO_FLD_SCIF2_CTS, VIO_CKO_SCIF2_RTS, VIO_STEX_SCIF2_SCK,
  203. VIO_STEM_SCIF2_TXD, VIO_HD_SCIF2_RXD,
  204. VIO_VD_SCIF1_CTS, VIO_CLK_SCIF1_RTS,
  205. CS6A_CE2B, LCDD23, LCDD22, LCDD21, LCDD20,
  206. LCDD19_DV_CLKI, LCDD18_DV_CLK,
  207. KEYOUT5_IN5, KEYOUT4_IN6, KEYOUT3, KEYOUT2, KEYOUT1, KEYOUT0,
  208. KEYIN4_IRQ7, KEYIN3, KEYIN2, KEYIN1, KEYIN0_IRQ6,
  209. PSA15_KEYIN0, PSA15_IRQ6, PSA14_KEYIN4, PSA14_IRQ7,
  210. PSA9_IRQ4, PSA9_BS, PSA4_IRQ2, PSA4_SDHID2,
  211. PSB15_SIOTXD, PSB15_SIUBOSLD, PSB14_SIORXD, PSB14_SIUBISLD,
  212. PSB13_SIOD, PSB13_SIUBILR, PSB12_SIOSTRB0, PSB12_SIUBIBT,
  213. PSB11_SIOSTRB1, PSB11_SIUBOLR, PSB10_SIOSCK, PSB10_SIUBOBT,
  214. PSB9_SIOMCK, PSB9_SIUMCKB, PSB8_SIOF0_MCK, PSB8_IRQ3,
  215. PSB7_SIOF0_TXD, PSB7_IRDA_OUT, PSB6_SIOF0_RXD, PSB6_IRDA_IN,
  216. PSB5_SIOF0_SCK, PSB5_TS_SCK, PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
  217. PSB3_SIOF0_SS1, PSB3_TS_SPSYNC, PSB2_SIOF0_SS2, PSB2_SIM_RST,
  218. PSB1_SIUMCKA, PSB1_SIOF1_MCK, PSB0_SIUAOSLD, PSB0_SIOF1_TXD,
  219. PSC15_SIUAISLD, PSC15_SIOF1_RXD, PSC14_SIUAOBT, PSC14_SIOF1_SCK,
  220. PSC13_SIUAOLR, PSC13_SIOF1_SYNC, PSC12_SIUAIBT, PSC12_SIOF1_SS1,
  221. PSC11_SIUAILR, PSC11_SIOF1_SS2, PSC0_NAF, PSC0_VIO,
  222. PSD13_VIO, PSD13_SCIF2, PSD12_VIO, PSD12_SCIF1,
  223. PSD11_VIO, PSD11_SCIF1, PSD10_VIO_D0, PSD10_LCDLCLK,
  224. PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB, PSD8_SCIF0_SCK, PSD8_TPUTO,
  225. PSD7_SCIF0_RTS, PSD7_SIUAOSPD, PSD6_SCIF0_CTS, PSD6_SIUAISPD,
  226. PSD5_CS6B_CE1B, PSD5_LCDCS2,
  227. PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
  228. PSD2_LCDDON, PSD2_LCDDON2, PSD0_LCDD19_LCDD0, PSD0_DV,
  229. PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
  230. PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
  231. PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT, PSE12_LCDVSYN2, PSE12_DACK,
  232. PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
  233. PSE3_FLCTL, PSE3_VIO, PSE2_NAF2, PSE2_VIO_D10,
  234. PSE1_NAF1, PSE1_VIO_D9, PSE0_NAF0, PSE0_VIO_D8,
  235. HIZA14_KEYSC, HIZA14_HIZ,
  236. HIZA10_NAF, HIZA10_HIZ,
  237. HIZA9_VIO, HIZA9_HIZ,
  238. HIZA8_LCDC, HIZA8_HIZ,
  239. HIZA7_LCDC, HIZA7_HIZ,
  240. HIZA6_LCDC, HIZA6_HIZ,
  241. HIZB4_SIUA, HIZB4_HIZ,
  242. HIZB1_VIO, HIZB1_HIZ,
  243. HIZB0_VIO, HIZB0_HIZ,
  244. HIZC15_IRQ7, HIZC15_HIZ,
  245. HIZC14_IRQ6, HIZC14_HIZ,
  246. HIZC13_IRQ5, HIZC13_HIZ,
  247. HIZC12_IRQ4, HIZC12_HIZ,
  248. HIZC11_IRQ3, HIZC11_HIZ,
  249. HIZC10_IRQ2, HIZC10_HIZ,
  250. HIZC9_IRQ1, HIZC9_HIZ,
  251. HIZC8_IRQ0, HIZC8_HIZ,
  252. MSELB9_VIO, MSELB9_VIO2,
  253. MSELB8_RGB, MSELB8_SYS,
  254. PINMUX_FUNCTION_END,
  255. };
  256. static const u16 pinmux_data[] = {
  257. /* PTA */
  258. PINMUX_DATA(PTA7_DATA, PTA7_IN, PTA7_OUT),
  259. PINMUX_DATA(PTA6_DATA, PTA6_IN),
  260. PINMUX_DATA(PTA5_DATA, PTA5_IN, PTA5_OUT),
  261. PINMUX_DATA(PTA4_DATA, PTA4_IN),
  262. PINMUX_DATA(PTA3_DATA, PTA3_IN),
  263. PINMUX_DATA(PTA2_DATA, PTA2_IN),
  264. PINMUX_DATA(PTA1_DATA, PTA1_IN),
  265. PINMUX_DATA(PTA0_DATA, PTA0_IN),
  266. /* PTB */
  267. PINMUX_DATA(PTB7_DATA, PTB7_IN, PTB7_OUT),
  268. PINMUX_DATA(PTB6_DATA, PTB6_IN, PTB6_OUT),
  269. PINMUX_DATA(PTB5_DATA, PTB5_IN, PTB5_OUT),
  270. PINMUX_DATA(PTB4_DATA, PTB4_IN, PTB4_OUT),
  271. PINMUX_DATA(PTB3_DATA, PTB3_IN, PTB3_OUT),
  272. PINMUX_DATA(PTB2_DATA, PTB2_IN, PTB2_OUT),
  273. PINMUX_DATA(PTB1_DATA, PTB1_IN, PTB1_OUT),
  274. PINMUX_DATA(PTB0_DATA, PTB0_IN, PTB0_OUT),
  275. /* PTC */
  276. PINMUX_DATA(PTC7_DATA, PTC7_IN),
  277. PINMUX_DATA(PTC5_DATA, PTC5_IN),
  278. PINMUX_DATA(PTC4_DATA, PTC4_IN, PTC4_OUT),
  279. PINMUX_DATA(PTC3_DATA, PTC3_IN, PTC3_OUT),
  280. PINMUX_DATA(PTC2_DATA, PTC2_IN, PTC2_OUT),
  281. PINMUX_DATA(PTC0_DATA, PTC0_IN, PTC0_OUT),
  282. /* PTD */
  283. PINMUX_DATA(PTD7_DATA, PTD7_IN),
  284. PINMUX_DATA(PTD6_DATA, PTD6_OUT, PTD6_IN),
  285. PINMUX_DATA(PTD5_DATA, PTD5_OUT, PTD5_IN),
  286. PINMUX_DATA(PTD4_DATA, PTD4_OUT, PTD4_IN),
  287. PINMUX_DATA(PTD3_DATA, PTD3_OUT, PTD3_IN),
  288. PINMUX_DATA(PTD2_DATA, PTD2_OUT, PTD2_IN),
  289. PINMUX_DATA(PTD1_DATA, PTD1_OUT, PTD1_IN),
  290. PINMUX_DATA(PTD0_DATA, PTD0_OUT),
  291. /* PTE */
  292. PINMUX_DATA(PTE7_DATA, PTE7_OUT, PTE7_IN),
  293. PINMUX_DATA(PTE6_DATA, PTE6_OUT, PTE6_IN),
  294. PINMUX_DATA(PTE5_DATA, PTE5_OUT, PTE5_IN),
  295. PINMUX_DATA(PTE4_DATA, PTE4_OUT, PTE4_IN),
  296. PINMUX_DATA(PTE1_DATA, PTE1_OUT, PTE1_IN),
  297. PINMUX_DATA(PTE0_DATA, PTE0_OUT, PTE0_IN),
  298. /* PTF */
  299. PINMUX_DATA(PTF6_DATA, PTF6_OUT, PTF6_IN),
  300. PINMUX_DATA(PTF5_DATA, PTF5_OUT, PTF5_IN),
  301. PINMUX_DATA(PTF4_DATA, PTF4_OUT, PTF4_IN),
  302. PINMUX_DATA(PTF3_DATA, PTF3_OUT, PTF3_IN),
  303. PINMUX_DATA(PTF2_DATA, PTF2_OUT, PTF2_IN),
  304. PINMUX_DATA(PTF1_DATA, PTF1_IN),
  305. PINMUX_DATA(PTF0_DATA, PTF0_OUT),
  306. /* PTG */
  307. PINMUX_DATA(PTG4_DATA, PTG4_OUT),
  308. PINMUX_DATA(PTG3_DATA, PTG3_OUT),
  309. PINMUX_DATA(PTG2_DATA, PTG2_OUT),
  310. PINMUX_DATA(PTG1_DATA, PTG1_OUT),
  311. PINMUX_DATA(PTG0_DATA, PTG0_OUT),
  312. /* PTH */
  313. PINMUX_DATA(PTH7_DATA, PTH7_OUT),
  314. PINMUX_DATA(PTH6_DATA, PTH6_OUT, PTH6_IN),
  315. PINMUX_DATA(PTH5_DATA, PTH5_OUT, PTH5_IN),
  316. PINMUX_DATA(PTH4_DATA, PTH4_OUT),
  317. PINMUX_DATA(PTH3_DATA, PTH3_OUT),
  318. PINMUX_DATA(PTH2_DATA, PTH2_OUT),
  319. PINMUX_DATA(PTH1_DATA, PTH1_OUT, PTH1_IN),
  320. PINMUX_DATA(PTH0_DATA, PTH0_OUT, PTH0_IN),
  321. /* PTJ */
  322. PINMUX_DATA(PTJ7_DATA, PTJ7_OUT),
  323. PINMUX_DATA(PTJ6_DATA, PTJ6_OUT),
  324. PINMUX_DATA(PTJ5_DATA, PTJ5_OUT),
  325. PINMUX_DATA(PTJ1_DATA, PTJ1_OUT, PTJ1_IN),
  326. PINMUX_DATA(PTJ0_DATA, PTJ0_OUT, PTJ0_IN),
  327. /* PTK */
  328. PINMUX_DATA(PTK6_DATA, PTK6_OUT, PTK6_IN),
  329. PINMUX_DATA(PTK5_DATA, PTK5_OUT, PTK5_IN),
  330. PINMUX_DATA(PTK4_DATA, PTK4_OUT, PTK4_IN),
  331. PINMUX_DATA(PTK3_DATA, PTK3_OUT, PTK3_IN),
  332. PINMUX_DATA(PTK2_DATA, PTK2_IN),
  333. PINMUX_DATA(PTK1_DATA, PTK1_OUT),
  334. PINMUX_DATA(PTK0_DATA, PTK0_OUT, PTK0_IN),
  335. /* PTL */
  336. PINMUX_DATA(PTL7_DATA, PTL7_OUT, PTL7_IN),
  337. PINMUX_DATA(PTL6_DATA, PTL6_OUT, PTL6_IN),
  338. PINMUX_DATA(PTL5_DATA, PTL5_OUT, PTL5_IN),
  339. PINMUX_DATA(PTL4_DATA, PTL4_OUT, PTL4_IN),
  340. PINMUX_DATA(PTL3_DATA, PTL3_OUT, PTL3_IN),
  341. PINMUX_DATA(PTL2_DATA, PTL2_OUT, PTL2_IN),
  342. PINMUX_DATA(PTL1_DATA, PTL1_OUT, PTL1_IN),
  343. PINMUX_DATA(PTL0_DATA, PTL0_OUT, PTL0_IN),
  344. /* PTM */
  345. PINMUX_DATA(PTM7_DATA, PTM7_OUT, PTM7_IN),
  346. PINMUX_DATA(PTM6_DATA, PTM6_OUT, PTM6_IN),
  347. PINMUX_DATA(PTM5_DATA, PTM5_OUT, PTM5_IN),
  348. PINMUX_DATA(PTM4_DATA, PTM4_OUT, PTM4_IN),
  349. PINMUX_DATA(PTM3_DATA, PTM3_OUT, PTM3_IN),
  350. PINMUX_DATA(PTM2_DATA, PTM2_OUT, PTM2_IN),
  351. PINMUX_DATA(PTM1_DATA, PTM1_OUT, PTM1_IN),
  352. PINMUX_DATA(PTM0_DATA, PTM0_OUT, PTM0_IN),
  353. /* PTN */
  354. PINMUX_DATA(PTN7_DATA, PTN7_OUT, PTN7_IN),
  355. PINMUX_DATA(PTN6_DATA, PTN6_OUT, PTN6_IN),
  356. PINMUX_DATA(PTN5_DATA, PTN5_OUT, PTN5_IN),
  357. PINMUX_DATA(PTN4_DATA, PTN4_OUT, PTN4_IN),
  358. PINMUX_DATA(PTN3_DATA, PTN3_OUT, PTN3_IN),
  359. PINMUX_DATA(PTN2_DATA, PTN2_OUT, PTN2_IN),
  360. PINMUX_DATA(PTN1_DATA, PTN1_OUT, PTN1_IN),
  361. PINMUX_DATA(PTN0_DATA, PTN0_OUT, PTN0_IN),
  362. /* PTQ */
  363. PINMUX_DATA(PTQ6_DATA, PTQ6_OUT),
  364. PINMUX_DATA(PTQ5_DATA, PTQ5_OUT, PTQ5_IN),
  365. PINMUX_DATA(PTQ4_DATA, PTQ4_OUT, PTQ4_IN),
  366. PINMUX_DATA(PTQ3_DATA, PTQ3_OUT, PTQ3_IN),
  367. PINMUX_DATA(PTQ2_DATA, PTQ2_IN),
  368. PINMUX_DATA(PTQ1_DATA, PTQ1_OUT),
  369. PINMUX_DATA(PTQ0_DATA, PTQ0_OUT, PTQ0_IN),
  370. /* PTR */
  371. PINMUX_DATA(PTR4_DATA, PTR4_OUT),
  372. PINMUX_DATA(PTR3_DATA, PTR3_OUT),
  373. PINMUX_DATA(PTR2_DATA, PTR2_IN),
  374. PINMUX_DATA(PTR1_DATA, PTR1_OUT),
  375. PINMUX_DATA(PTR0_DATA, PTR0_OUT),
  376. /* PTS */
  377. PINMUX_DATA(PTS4_DATA, PTS4_IN),
  378. PINMUX_DATA(PTS3_DATA, PTS3_OUT),
  379. PINMUX_DATA(PTS2_DATA, PTS2_OUT, PTS2_IN),
  380. PINMUX_DATA(PTS1_DATA, PTS1_IN),
  381. PINMUX_DATA(PTS0_DATA, PTS0_OUT),
  382. /* PTT */
  383. PINMUX_DATA(PTT4_DATA, PTT4_OUT, PTT4_IN),
  384. PINMUX_DATA(PTT3_DATA, PTT3_OUT, PTT3_IN),
  385. PINMUX_DATA(PTT2_DATA, PTT2_OUT, PTT2_IN),
  386. PINMUX_DATA(PTT1_DATA, PTT1_IN),
  387. PINMUX_DATA(PTT0_DATA, PTT0_OUT),
  388. /* PTU */
  389. PINMUX_DATA(PTU4_DATA, PTU4_OUT, PTU4_IN),
  390. PINMUX_DATA(PTU3_DATA, PTU3_OUT, PTU3_IN),
  391. PINMUX_DATA(PTU2_DATA, PTU2_OUT, PTU2_IN),
  392. PINMUX_DATA(PTU1_DATA, PTU1_IN),
  393. PINMUX_DATA(PTU0_DATA, PTU0_OUT, PTU0_IN),
  394. /* PTV */
  395. PINMUX_DATA(PTV4_DATA, PTV4_OUT, PTV4_IN),
  396. PINMUX_DATA(PTV3_DATA, PTV3_OUT, PTV3_IN),
  397. PINMUX_DATA(PTV2_DATA, PTV2_OUT, PTV2_IN),
  398. PINMUX_DATA(PTV1_DATA, PTV1_OUT, PTV1_IN),
  399. PINMUX_DATA(PTV0_DATA, PTV0_OUT, PTV0_IN),
  400. /* PTW */
  401. PINMUX_DATA(PTW6_DATA, PTW6_IN),
  402. PINMUX_DATA(PTW5_DATA, PTW5_OUT),
  403. PINMUX_DATA(PTW4_DATA, PTW4_OUT, PTW4_IN),
  404. PINMUX_DATA(PTW3_DATA, PTW3_OUT, PTW3_IN),
  405. PINMUX_DATA(PTW2_DATA, PTW2_OUT, PTW2_IN),
  406. PINMUX_DATA(PTW1_DATA, PTW1_OUT, PTW1_IN),
  407. PINMUX_DATA(PTW0_DATA, PTW0_OUT, PTW0_IN),
  408. /* PTX */
  409. PINMUX_DATA(PTX6_DATA, PTX6_OUT, PTX6_IN),
  410. PINMUX_DATA(PTX5_DATA, PTX5_OUT, PTX5_IN),
  411. PINMUX_DATA(PTX4_DATA, PTX4_OUT, PTX4_IN),
  412. PINMUX_DATA(PTX3_DATA, PTX3_OUT, PTX3_IN),
  413. PINMUX_DATA(PTX2_DATA, PTX2_OUT, PTX2_IN),
  414. PINMUX_DATA(PTX1_DATA, PTX1_OUT, PTX1_IN),
  415. PINMUX_DATA(PTX0_DATA, PTX0_OUT, PTX0_IN),
  416. /* PTY */
  417. PINMUX_DATA(PTY5_DATA, PTY5_OUT, PTY5_IN),
  418. PINMUX_DATA(PTY4_DATA, PTY4_OUT, PTY4_IN),
  419. PINMUX_DATA(PTY3_DATA, PTY3_OUT, PTY3_IN),
  420. PINMUX_DATA(PTY2_DATA, PTY2_OUT, PTY2_IN),
  421. PINMUX_DATA(PTY1_DATA, PTY1_OUT),
  422. PINMUX_DATA(PTY0_DATA, PTY0_OUT, PTY0_IN),
  423. /* PTZ */
  424. PINMUX_DATA(PTZ5_DATA, PTZ5_IN),
  425. PINMUX_DATA(PTZ4_DATA, PTZ4_IN),
  426. PINMUX_DATA(PTZ3_DATA, PTZ3_IN),
  427. PINMUX_DATA(PTZ2_DATA, PTZ2_IN),
  428. PINMUX_DATA(PTZ1_DATA, PTZ1_IN),
  429. /* SCIF0 */
  430. PINMUX_DATA(SCIF0_TXD_MARK, SCIF0_TXD),
  431. PINMUX_DATA(SCIF0_RXD_MARK, SCIF0_RXD),
  432. PINMUX_DATA(SCIF0_RTS_MARK, PSD7_SCIF0_RTS, SCIF0_RTS_SIUAOSPD),
  433. PINMUX_DATA(SCIF0_CTS_MARK, PSD6_SCIF0_CTS, SCIF0_CTS_SIUAISPD),
  434. PINMUX_DATA(SCIF0_SCK_MARK, PSD8_SCIF0_SCK, SCIF0_SCK_TPUTO),
  435. /* SCIF1 */
  436. PINMUX_DATA(SCIF1_TXD_MARK, PSD11_SCIF1, VIO_D5_SCIF1_TXD),
  437. PINMUX_DATA(SCIF1_RXD_MARK, PSD11_SCIF1, VIO_D6_SCIF1_RXD),
  438. PINMUX_DATA(SCIF1_RTS_MARK, PSD12_SCIF1, VIO_CLK_SCIF1_RTS),
  439. PINMUX_DATA(SCIF1_CTS_MARK, PSD12_SCIF1, VIO_VD_SCIF1_CTS),
  440. PINMUX_DATA(SCIF1_SCK_MARK, PSD11_SCIF1, VIO_D7_SCIF1_SCK),
  441. /* SCIF2 */
  442. PINMUX_DATA(SCIF2_TXD_MARK, PSD13_SCIF2, VIO_STEM_SCIF2_TXD),
  443. PINMUX_DATA(SCIF2_RXD_MARK, PSD13_SCIF2, VIO_HD_SCIF2_RXD),
  444. PINMUX_DATA(SCIF2_RTS_MARK, PSD13_SCIF2, VIO_CKO_SCIF2_RTS),
  445. PINMUX_DATA(SCIF2_CTS_MARK, PSD13_SCIF2, VIO_FLD_SCIF2_CTS),
  446. PINMUX_DATA(SCIF2_SCK_MARK, PSD13_SCIF2, VIO_STEX_SCIF2_SCK),
  447. /* SIO */
  448. PINMUX_DATA(SIOTXD_MARK, PSB15_SIOTXD, SIOTXD_SIUBOSLD),
  449. PINMUX_DATA(SIORXD_MARK, PSB14_SIORXD, SIORXD_SIUBISLD),
  450. PINMUX_DATA(SIOD_MARK, PSB13_SIOD, SIOD_SIUBILR),
  451. PINMUX_DATA(SIOSTRB0_MARK, PSB12_SIOSTRB0, SIOSTRB0_SIUBIBT),
  452. PINMUX_DATA(SIOSTRB1_MARK, PSB11_SIOSTRB1, SIOSTRB1_SIUBOLR),
  453. PINMUX_DATA(SIOSCK_MARK, PSB10_SIOSCK, SIOSCK_SIUBOBT),
  454. PINMUX_DATA(SIOMCK_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIOMCK, PTF6),
  455. /* CEU */
  456. PINMUX_DATA(VIO_D15_MARK, PSC0_VIO, HIZA10_NAF, NAF7_VIO_D15),
  457. PINMUX_DATA(VIO_D14_MARK, PSC0_VIO, HIZA10_NAF, NAF6_VIO_D14),
  458. PINMUX_DATA(VIO_D13_MARK, PSC0_VIO, HIZA10_NAF, NAF5_VIO_D13),
  459. PINMUX_DATA(VIO_D12_MARK, PSC0_VIO, HIZA10_NAF, NAF4_VIO_D12),
  460. PINMUX_DATA(VIO_D11_MARK, PSC0_VIO, HIZA10_NAF, NAF3_VIO_D11),
  461. PINMUX_DATA(VIO_D10_MARK, PSE2_VIO_D10, HIZB0_VIO, NAF2_VIO_D10),
  462. PINMUX_DATA(VIO_D9_MARK, PSE1_VIO_D9, HIZB0_VIO, NAF1_VIO_D9),
  463. PINMUX_DATA(VIO_D8_MARK, PSE0_VIO_D8, HIZB0_VIO, NAF0_VIO_D8),
  464. PINMUX_DATA(VIO_D7_MARK, PSD11_VIO, VIO_D7_SCIF1_SCK),
  465. PINMUX_DATA(VIO_D6_MARK, PSD11_VIO, VIO_D6_SCIF1_RXD),
  466. PINMUX_DATA(VIO_D5_MARK, PSD11_VIO, VIO_D5_SCIF1_TXD),
  467. PINMUX_DATA(VIO_D4_MARK, VIO_D4),
  468. PINMUX_DATA(VIO_D3_MARK, VIO_D3),
  469. PINMUX_DATA(VIO_D2_MARK, VIO_D2),
  470. PINMUX_DATA(VIO_D1_MARK, VIO_D1),
  471. PINMUX_DATA(VIO_D0_MARK, PSD10_VIO_D0, VIO_D0_LCDLCLK),
  472. PINMUX_DATA(VIO_CLK_MARK, PSD12_VIO, MSELB9_VIO, VIO_CLK_SCIF1_RTS),
  473. PINMUX_DATA(VIO_VD_MARK, PSD12_VIO, MSELB9_VIO, VIO_VD_SCIF1_CTS),
  474. PINMUX_DATA(VIO_HD_MARK, PSD13_VIO, MSELB9_VIO, VIO_HD_SCIF2_RXD),
  475. PINMUX_DATA(VIO_FLD_MARK, PSD13_VIO, HIZA9_VIO, VIO_FLD_SCIF2_CTS),
  476. PINMUX_DATA(VIO_CKO_MARK, PSD13_VIO, HIZA9_VIO, VIO_CKO_SCIF2_RTS),
  477. PINMUX_DATA(VIO_STEX_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEX_SCIF2_SCK),
  478. PINMUX_DATA(VIO_STEM_MARK, PSD13_VIO, HIZA9_VIO, VIO_STEM_SCIF2_TXD),
  479. PINMUX_DATA(VIO_VD2_MARK, PSE3_VIO, MSELB9_VIO2,
  480. HIZB0_VIO, FOE_VIO_VD2),
  481. PINMUX_DATA(VIO_HD2_MARK, PSE3_VIO, MSELB9_VIO2,
  482. HIZB1_VIO, FCE_VIO_HD2),
  483. PINMUX_DATA(VIO_CLK2_MARK, PSE3_VIO, MSELB9_VIO2,
  484. HIZB1_VIO, FRB_VIO_CLK2),
  485. /* LCDC */
  486. PINMUX_DATA(LCDD23_MARK, HIZA8_LCDC, LCDD23),
  487. PINMUX_DATA(LCDD22_MARK, HIZA8_LCDC, LCDD22),
  488. PINMUX_DATA(LCDD21_MARK, HIZA8_LCDC, LCDD21),
  489. PINMUX_DATA(LCDD20_MARK, HIZA8_LCDC, LCDD20),
  490. PINMUX_DATA(LCDD19_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD19_DV_CLKI),
  491. PINMUX_DATA(LCDD18_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD18_DV_CLK),
  492. PINMUX_DATA(LCDD17_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
  493. LCDD17_DV_HSYNC),
  494. PINMUX_DATA(LCDD16_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC,
  495. LCDD16_DV_VSYNC),
  496. PINMUX_DATA(LCDD15_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD15_DV_D15),
  497. PINMUX_DATA(LCDD14_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD14_DV_D14),
  498. PINMUX_DATA(LCDD13_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD13_DV_D13),
  499. PINMUX_DATA(LCDD12_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD12_DV_D12),
  500. PINMUX_DATA(LCDD11_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD11_DV_D11),
  501. PINMUX_DATA(LCDD10_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD10_DV_D10),
  502. PINMUX_DATA(LCDD9_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD9_DV_D9),
  503. PINMUX_DATA(LCDD8_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD8_DV_D8),
  504. PINMUX_DATA(LCDD7_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD7_DV_D7),
  505. PINMUX_DATA(LCDD6_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD6_DV_D6),
  506. PINMUX_DATA(LCDD5_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD5_DV_D5),
  507. PINMUX_DATA(LCDD4_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD4_DV_D4),
  508. PINMUX_DATA(LCDD3_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD3_DV_D3),
  509. PINMUX_DATA(LCDD2_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD2_DV_D2),
  510. PINMUX_DATA(LCDD1_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD1_DV_D1),
  511. PINMUX_DATA(LCDD0_MARK, PSD0_LCDD19_LCDD0, HIZA8_LCDC, LCDD0_DV_D0),
  512. PINMUX_DATA(LCDLCLK_MARK, PSD10_LCDLCLK, VIO_D0_LCDLCLK),
  513. /* Main LCD */
  514. PINMUX_DATA(LCDDON_MARK, PSD2_LCDDON, HIZA7_LCDC, LCDDON_LCDDON2),
  515. PINMUX_DATA(LCDVCPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
  516. HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
  517. PINMUX_DATA(LCDVEPWC_MARK, PSD3_LCDVEPWC_LCDVCPWC,
  518. HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
  519. PINMUX_DATA(LCDVSYN_MARK, HIZA7_LCDC, LCDVSYN),
  520. /* Main LCD - RGB Mode */
  521. PINMUX_DATA(LCDDCK_MARK, MSELB8_RGB, HIZA8_LCDC, LCDDCK_LCDWR),
  522. PINMUX_DATA(LCDHSYN_MARK, MSELB8_RGB, HIZA7_LCDC, LCDHSYN_LCDCS),
  523. PINMUX_DATA(LCDDISP_MARK, MSELB8_RGB, HIZA7_LCDC, LCDDISP_LCDRS),
  524. /* Main LCD - SYS Mode */
  525. PINMUX_DATA(LCDRS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDDISP_LCDRS),
  526. PINMUX_DATA(LCDCS_MARK, MSELB8_SYS, HIZA7_LCDC, LCDHSYN_LCDCS),
  527. PINMUX_DATA(LCDWR_MARK, MSELB8_SYS, HIZA8_LCDC, LCDDCK_LCDWR),
  528. PINMUX_DATA(LCDRD_MARK, HIZA7_LCDC, LCDRD),
  529. /* Sub LCD - SYS Mode */
  530. PINMUX_DATA(LCDDON2_MARK, PSD2_LCDDON2, HIZA7_LCDC, LCDDON_LCDDON2),
  531. PINMUX_DATA(LCDVCPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
  532. HIZA6_LCDC, LCDVCPWC_LCDVCPWC2),
  533. PINMUX_DATA(LCDVEPWC2_MARK, PSD3_LCDVEPWC2_LCDVCPWC2,
  534. HIZA6_LCDC, LCDVEPWC_LCDVEPWC2),
  535. PINMUX_DATA(LCDVSYN2_MARK, PSE12_LCDVSYN2, HIZA8_LCDC, LCDVSYN2_DACK),
  536. PINMUX_DATA(LCDCS2_MARK, PSD5_LCDCS2, CS6B_CE1B_LCDCS2),
  537. /* BSC */
  538. PINMUX_DATA(IOIS16_MARK, IOIS16),
  539. PINMUX_DATA(A25_MARK, A25),
  540. PINMUX_DATA(A24_MARK, A24),
  541. PINMUX_DATA(A23_MARK, A23),
  542. PINMUX_DATA(A22_MARK, A22),
  543. PINMUX_DATA(BS_MARK, PSA9_BS, IRQ4_BS),
  544. PINMUX_DATA(CS6B_CE1B_MARK, PSD5_CS6B_CE1B, CS6B_CE1B_LCDCS2),
  545. PINMUX_DATA(WAIT_MARK, WAIT),
  546. PINMUX_DATA(CS6A_CE2B_MARK, CS6A_CE2B),
  547. /* SBSC */
  548. PINMUX_DATA(HPD63_MARK, HPD63),
  549. PINMUX_DATA(HPD62_MARK, HPD62),
  550. PINMUX_DATA(HPD61_MARK, HPD61),
  551. PINMUX_DATA(HPD60_MARK, HPD60),
  552. PINMUX_DATA(HPD59_MARK, HPD59),
  553. PINMUX_DATA(HPD58_MARK, HPD58),
  554. PINMUX_DATA(HPD57_MARK, HPD57),
  555. PINMUX_DATA(HPD56_MARK, HPD56),
  556. PINMUX_DATA(HPD55_MARK, HPD55),
  557. PINMUX_DATA(HPD54_MARK, HPD54),
  558. PINMUX_DATA(HPD53_MARK, HPD53),
  559. PINMUX_DATA(HPD52_MARK, HPD52),
  560. PINMUX_DATA(HPD51_MARK, HPD51),
  561. PINMUX_DATA(HPD50_MARK, HPD50),
  562. PINMUX_DATA(HPD49_MARK, HPD49),
  563. PINMUX_DATA(HPD48_MARK, HPD48),
  564. PINMUX_DATA(HPDQM7_MARK, HPDQM7),
  565. PINMUX_DATA(HPDQM6_MARK, HPDQM6),
  566. PINMUX_DATA(HPDQM5_MARK, HPDQM5),
  567. PINMUX_DATA(HPDQM4_MARK, HPDQM4),
  568. /* IRQ */
  569. PINMUX_DATA(IRQ0_MARK, HIZC8_IRQ0, IRQ0),
  570. PINMUX_DATA(IRQ1_MARK, HIZC9_IRQ1, IRQ1),
  571. PINMUX_DATA(IRQ2_MARK, PSA4_IRQ2, HIZC10_IRQ2, IRQ2_SDHID2),
  572. PINMUX_DATA(IRQ3_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_IRQ3,
  573. HIZC11_IRQ3, PTQ0),
  574. PINMUX_DATA(IRQ4_MARK, PSA9_IRQ4, HIZC12_IRQ4, IRQ4_BS),
  575. PINMUX_DATA(IRQ5_MARK, HIZC13_IRQ5, IRQ5),
  576. PINMUX_DATA(IRQ6_MARK, PSA15_IRQ6, HIZC14_IRQ6, KEYIN0_IRQ6),
  577. PINMUX_DATA(IRQ7_MARK, PSA14_IRQ7, HIZC15_IRQ7, KEYIN4_IRQ7),
  578. /* SDHI */
  579. PINMUX_DATA(SDHICD_MARK, SDHICD),
  580. PINMUX_DATA(SDHIWP_MARK, SDHIWP),
  581. PINMUX_DATA(SDHID3_MARK, SDHID3),
  582. PINMUX_DATA(SDHID2_MARK, PSA4_SDHID2, IRQ2_SDHID2),
  583. PINMUX_DATA(SDHID1_MARK, SDHID1),
  584. PINMUX_DATA(SDHID0_MARK, SDHID0),
  585. PINMUX_DATA(SDHICMD_MARK, SDHICMD),
  586. PINMUX_DATA(SDHICLK_MARK, SDHICLK),
  587. /* SIU - Port A */
  588. PINMUX_DATA(SIUAOLR_MARK, PSC13_SIUAOLR, HIZB4_SIUA, SIUAOLR_SIOF1_SYNC),
  589. PINMUX_DATA(SIUAOBT_MARK, PSC14_SIUAOBT, HIZB4_SIUA, SIUAOBT_SIOF1_SCK),
  590. PINMUX_DATA(SIUAISLD_MARK, PSC15_SIUAISLD, HIZB4_SIUA, SIUAISLD_SIOF1_RXD),
  591. PINMUX_DATA(SIUAILR_MARK, PSC11_SIUAILR, HIZB4_SIUA, SIUAILR_SIOF1_SS2),
  592. PINMUX_DATA(SIUAIBT_MARK, PSC12_SIUAIBT, HIZB4_SIUA, SIUAIBT_SIOF1_SS1),
  593. PINMUX_DATA(SIUAOSLD_MARK, PSB0_SIUAOSLD, HIZB4_SIUA, SIUAOSLD_SIOF1_TXD),
  594. PINMUX_DATA(SIUMCKA_MARK, PSE11_SIUMCKA_SIOF1_MCK, HIZB4_SIUA, PSB1_SIUMCKA, PTK0),
  595. PINMUX_DATA(SIUFCKA_MARK, PSE11_SIUFCKA, HIZB4_SIUA, PTK0),
  596. /* SIU - Port B */
  597. PINMUX_DATA(SIUBOLR_MARK, PSB11_SIUBOLR, SIOSTRB1_SIUBOLR),
  598. PINMUX_DATA(SIUBOBT_MARK, PSB10_SIUBOBT, SIOSCK_SIUBOBT),
  599. PINMUX_DATA(SIUBISLD_MARK, PSB14_SIUBISLD, SIORXD_SIUBISLD),
  600. PINMUX_DATA(SIUBILR_MARK, PSB13_SIUBILR, SIOD_SIUBILR),
  601. PINMUX_DATA(SIUBIBT_MARK, PSB12_SIUBIBT, SIOSTRB0_SIUBIBT),
  602. PINMUX_DATA(SIUBOSLD_MARK, PSB15_SIUBOSLD, SIOTXD_SIUBOSLD),
  603. PINMUX_DATA(SIUMCKB_MARK, PSD9_SIOMCK_SIUMCKB, PSB9_SIUMCKB, PTF6),
  604. PINMUX_DATA(SIUFCKB_MARK, PSD9_SIUFCKB, PTF6),
  605. /* AUD */
  606. PINMUX_DATA(AUDSYNC_MARK, AUDSYNC),
  607. PINMUX_DATA(AUDATA3_MARK, AUDATA3),
  608. PINMUX_DATA(AUDATA2_MARK, AUDATA2),
  609. PINMUX_DATA(AUDATA1_MARK, AUDATA1),
  610. PINMUX_DATA(AUDATA0_MARK, AUDATA0),
  611. /* DMAC */
  612. PINMUX_DATA(DACK_MARK, PSE12_DACK, LCDVSYN2_DACK),
  613. PINMUX_DATA(DREQ0_MARK, DREQ0),
  614. /* VOU */
  615. PINMUX_DATA(DV_CLKI_MARK, PSD0_DV, LCDD19_DV_CLKI),
  616. PINMUX_DATA(DV_CLK_MARK, PSD0_DV, LCDD18_DV_CLK),
  617. PINMUX_DATA(DV_HSYNC_MARK, PSD0_DV, LCDD17_DV_HSYNC),
  618. PINMUX_DATA(DV_VSYNC_MARK, PSD0_DV, LCDD16_DV_VSYNC),
  619. PINMUX_DATA(DV_D15_MARK, PSD0_DV, LCDD15_DV_D15),
  620. PINMUX_DATA(DV_D14_MARK, PSD0_DV, LCDD14_DV_D14),
  621. PINMUX_DATA(DV_D13_MARK, PSD0_DV, LCDD13_DV_D13),
  622. PINMUX_DATA(DV_D12_MARK, PSD0_DV, LCDD12_DV_D12),
  623. PINMUX_DATA(DV_D11_MARK, PSD0_DV, LCDD11_DV_D11),
  624. PINMUX_DATA(DV_D10_MARK, PSD0_DV, LCDD10_DV_D10),
  625. PINMUX_DATA(DV_D9_MARK, PSD0_DV, LCDD9_DV_D9),
  626. PINMUX_DATA(DV_D8_MARK, PSD0_DV, LCDD8_DV_D8),
  627. PINMUX_DATA(DV_D7_MARK, PSD0_DV, LCDD7_DV_D7),
  628. PINMUX_DATA(DV_D6_MARK, PSD0_DV, LCDD6_DV_D6),
  629. PINMUX_DATA(DV_D5_MARK, PSD0_DV, LCDD5_DV_D5),
  630. PINMUX_DATA(DV_D4_MARK, PSD0_DV, LCDD4_DV_D4),
  631. PINMUX_DATA(DV_D3_MARK, PSD0_DV, LCDD3_DV_D3),
  632. PINMUX_DATA(DV_D2_MARK, PSD0_DV, LCDD2_DV_D2),
  633. PINMUX_DATA(DV_D1_MARK, PSD0_DV, LCDD1_DV_D1),
  634. PINMUX_DATA(DV_D0_MARK, PSD0_DV, LCDD0_DV_D0),
  635. /* CPG */
  636. PINMUX_DATA(STATUS0_MARK, STATUS0),
  637. PINMUX_DATA(PDSTATUS_MARK, PDSTATUS),
  638. /* SIOF0 */
  639. PINMUX_DATA(SIOF0_MCK_MARK, PSE15_SIOF0_MCK_IRQ3, PSB8_SIOF0_MCK, PTQ0),
  640. PINMUX_DATA(SIOF0_SCK_MARK, PSB5_SIOF0_SCK, SIOF0_SCK_TS_SCK),
  641. PINMUX_DATA(SIOF0_SYNC_MARK, PSB4_SIOF0_SYNC, SIOF0_SYNC_TS_SDEN),
  642. PINMUX_DATA(SIOF0_SS1_MARK, PSB3_SIOF0_SS1, SIOF0_SS1_TS_SPSYNC),
  643. PINMUX_DATA(SIOF0_SS2_MARK, PSB2_SIOF0_SS2, SIOF0_SS2_SIM_RST),
  644. PINMUX_DATA(SIOF0_TXD_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
  645. PSB7_SIOF0_TXD, PTQ1),
  646. PINMUX_DATA(SIOF0_RXD_MARK, PSE13_SIOF0_RXD_IRDA_IN,
  647. PSB6_SIOF0_RXD, PTQ2),
  648. /* SIOF1 */
  649. PINMUX_DATA(SIOF1_MCK_MARK, PSE11_SIUMCKA_SIOF1_MCK,
  650. PSB1_SIOF1_MCK, PTK0),
  651. PINMUX_DATA(SIOF1_SCK_MARK, PSC14_SIOF1_SCK, SIUAOBT_SIOF1_SCK),
  652. PINMUX_DATA(SIOF1_SYNC_MARK, PSC13_SIOF1_SYNC, SIUAOLR_SIOF1_SYNC),
  653. PINMUX_DATA(SIOF1_SS1_MARK, PSC12_SIOF1_SS1, SIUAIBT_SIOF1_SS1),
  654. PINMUX_DATA(SIOF1_SS2_MARK, PSC11_SIOF1_SS2, SIUAILR_SIOF1_SS2),
  655. PINMUX_DATA(SIOF1_TXD_MARK, PSB0_SIOF1_TXD, SIUAOSLD_SIOF1_TXD),
  656. PINMUX_DATA(SIOF1_RXD_MARK, PSC15_SIOF1_RXD, SIUAISLD_SIOF1_RXD),
  657. /* SIM */
  658. PINMUX_DATA(SIM_D_MARK, PSE15_SIM_D, PTQ0),
  659. PINMUX_DATA(SIM_CLK_MARK, PSE14_SIM_CLK, PTQ1),
  660. PINMUX_DATA(SIM_RST_MARK, PSB2_SIM_RST, SIOF0_SS2_SIM_RST),
  661. /* TSIF */
  662. PINMUX_DATA(TS_SDAT_MARK, PSE13_TS_SDAT, PTQ2),
  663. PINMUX_DATA(TS_SCK_MARK, PSB5_TS_SCK, SIOF0_SCK_TS_SCK),
  664. PINMUX_DATA(TS_SDEN_MARK, PSB4_TS_SDEN, SIOF0_SYNC_TS_SDEN),
  665. PINMUX_DATA(TS_SPSYNC_MARK, PSB3_TS_SPSYNC, SIOF0_SS1_TS_SPSYNC),
  666. /* IRDA */
  667. PINMUX_DATA(IRDA_IN_MARK, PSE13_SIOF0_RXD_IRDA_IN, PSB6_IRDA_IN, PTQ2),
  668. PINMUX_DATA(IRDA_OUT_MARK, PSE14_SIOF0_TXD_IRDA_OUT,
  669. PSB7_IRDA_OUT, PTQ1),
  670. /* TPU */
  671. PINMUX_DATA(TPUTO_MARK, PSD8_TPUTO, SCIF0_SCK_TPUTO),
  672. /* FLCTL */
  673. PINMUX_DATA(FCE_MARK, PSE3_FLCTL, FCE_VIO_HD2),
  674. PINMUX_DATA(NAF7_MARK, PSC0_NAF, HIZA10_NAF, NAF7_VIO_D15),
  675. PINMUX_DATA(NAF6_MARK, PSC0_NAF, HIZA10_NAF, NAF6_VIO_D14),
  676. PINMUX_DATA(NAF5_MARK, PSC0_NAF, HIZA10_NAF, NAF5_VIO_D13),
  677. PINMUX_DATA(NAF4_MARK, PSC0_NAF, HIZA10_NAF, NAF4_VIO_D12),
  678. PINMUX_DATA(NAF3_MARK, PSC0_NAF, HIZA10_NAF, NAF3_VIO_D11),
  679. PINMUX_DATA(NAF2_MARK, PSE2_NAF2, HIZB0_VIO, NAF2_VIO_D10),
  680. PINMUX_DATA(NAF1_MARK, PSE1_NAF1, HIZB0_VIO, NAF1_VIO_D9),
  681. PINMUX_DATA(NAF0_MARK, PSE0_NAF0, HIZB0_VIO, NAF0_VIO_D8),
  682. PINMUX_DATA(FCDE_MARK, FCDE),
  683. PINMUX_DATA(FOE_MARK, PSE3_FLCTL, HIZB0_VIO, FOE_VIO_VD2),
  684. PINMUX_DATA(FSC_MARK, FSC),
  685. PINMUX_DATA(FWE_MARK, FWE),
  686. PINMUX_DATA(FRB_MARK, PSE3_FLCTL, FRB_VIO_CLK2),
  687. /* KEYSC */
  688. PINMUX_DATA(KEYIN0_MARK, PSA15_KEYIN0, HIZC14_IRQ6, KEYIN0_IRQ6),
  689. PINMUX_DATA(KEYIN1_MARK, HIZA14_KEYSC, KEYIN1),
  690. PINMUX_DATA(KEYIN2_MARK, HIZA14_KEYSC, KEYIN2),
  691. PINMUX_DATA(KEYIN3_MARK, HIZA14_KEYSC, KEYIN3),
  692. PINMUX_DATA(KEYIN4_MARK, PSA14_KEYIN4, HIZC15_IRQ7, KEYIN4_IRQ7),
  693. PINMUX_DATA(KEYOUT0_MARK, HIZA14_KEYSC, KEYOUT0),
  694. PINMUX_DATA(KEYOUT1_MARK, HIZA14_KEYSC, KEYOUT1),
  695. PINMUX_DATA(KEYOUT2_MARK, HIZA14_KEYSC, KEYOUT2),
  696. PINMUX_DATA(KEYOUT3_MARK, HIZA14_KEYSC, KEYOUT3),
  697. PINMUX_DATA(KEYOUT4_IN6_MARK, HIZA14_KEYSC, KEYOUT4_IN6),
  698. PINMUX_DATA(KEYOUT5_IN5_MARK, HIZA14_KEYSC, KEYOUT5_IN5),
  699. };
  700. static const struct sh_pfc_pin pinmux_pins[] = {
  701. /* PTA */
  702. PINMUX_GPIO(PTA7),
  703. PINMUX_GPIO(PTA6),
  704. PINMUX_GPIO(PTA5),
  705. PINMUX_GPIO(PTA4),
  706. PINMUX_GPIO(PTA3),
  707. PINMUX_GPIO(PTA2),
  708. PINMUX_GPIO(PTA1),
  709. PINMUX_GPIO(PTA0),
  710. /* PTB */
  711. PINMUX_GPIO(PTB7),
  712. PINMUX_GPIO(PTB6),
  713. PINMUX_GPIO(PTB5),
  714. PINMUX_GPIO(PTB4),
  715. PINMUX_GPIO(PTB3),
  716. PINMUX_GPIO(PTB2),
  717. PINMUX_GPIO(PTB1),
  718. PINMUX_GPIO(PTB0),
  719. /* PTC */
  720. PINMUX_GPIO(PTC7),
  721. PINMUX_GPIO(PTC5),
  722. PINMUX_GPIO(PTC4),
  723. PINMUX_GPIO(PTC3),
  724. PINMUX_GPIO(PTC2),
  725. PINMUX_GPIO(PTC0),
  726. /* PTD */
  727. PINMUX_GPIO(PTD7),
  728. PINMUX_GPIO(PTD6),
  729. PINMUX_GPIO(PTD5),
  730. PINMUX_GPIO(PTD4),
  731. PINMUX_GPIO(PTD3),
  732. PINMUX_GPIO(PTD2),
  733. PINMUX_GPIO(PTD1),
  734. PINMUX_GPIO(PTD0),
  735. /* PTE */
  736. PINMUX_GPIO(PTE7),
  737. PINMUX_GPIO(PTE6),
  738. PINMUX_GPIO(PTE5),
  739. PINMUX_GPIO(PTE4),
  740. PINMUX_GPIO(PTE1),
  741. PINMUX_GPIO(PTE0),
  742. /* PTF */
  743. PINMUX_GPIO(PTF6),
  744. PINMUX_GPIO(PTF5),
  745. PINMUX_GPIO(PTF4),
  746. PINMUX_GPIO(PTF3),
  747. PINMUX_GPIO(PTF2),
  748. PINMUX_GPIO(PTF1),
  749. PINMUX_GPIO(PTF0),
  750. /* PTG */
  751. PINMUX_GPIO(PTG4),
  752. PINMUX_GPIO(PTG3),
  753. PINMUX_GPIO(PTG2),
  754. PINMUX_GPIO(PTG1),
  755. PINMUX_GPIO(PTG0),
  756. /* PTH */
  757. PINMUX_GPIO(PTH7),
  758. PINMUX_GPIO(PTH6),
  759. PINMUX_GPIO(PTH5),
  760. PINMUX_GPIO(PTH4),
  761. PINMUX_GPIO(PTH3),
  762. PINMUX_GPIO(PTH2),
  763. PINMUX_GPIO(PTH1),
  764. PINMUX_GPIO(PTH0),
  765. /* PTJ */
  766. PINMUX_GPIO(PTJ7),
  767. PINMUX_GPIO(PTJ6),
  768. PINMUX_GPIO(PTJ5),
  769. PINMUX_GPIO(PTJ1),
  770. PINMUX_GPIO(PTJ0),
  771. /* PTK */
  772. PINMUX_GPIO(PTK6),
  773. PINMUX_GPIO(PTK5),
  774. PINMUX_GPIO(PTK4),
  775. PINMUX_GPIO(PTK3),
  776. PINMUX_GPIO(PTK2),
  777. PINMUX_GPIO(PTK1),
  778. PINMUX_GPIO(PTK0),
  779. /* PTL */
  780. PINMUX_GPIO(PTL7),
  781. PINMUX_GPIO(PTL6),
  782. PINMUX_GPIO(PTL5),
  783. PINMUX_GPIO(PTL4),
  784. PINMUX_GPIO(PTL3),
  785. PINMUX_GPIO(PTL2),
  786. PINMUX_GPIO(PTL1),
  787. PINMUX_GPIO(PTL0),
  788. /* PTM */
  789. PINMUX_GPIO(PTM7),
  790. PINMUX_GPIO(PTM6),
  791. PINMUX_GPIO(PTM5),
  792. PINMUX_GPIO(PTM4),
  793. PINMUX_GPIO(PTM3),
  794. PINMUX_GPIO(PTM2),
  795. PINMUX_GPIO(PTM1),
  796. PINMUX_GPIO(PTM0),
  797. /* PTN */
  798. PINMUX_GPIO(PTN7),
  799. PINMUX_GPIO(PTN6),
  800. PINMUX_GPIO(PTN5),
  801. PINMUX_GPIO(PTN4),
  802. PINMUX_GPIO(PTN3),
  803. PINMUX_GPIO(PTN2),
  804. PINMUX_GPIO(PTN1),
  805. PINMUX_GPIO(PTN0),
  806. /* PTQ */
  807. PINMUX_GPIO(PTQ6),
  808. PINMUX_GPIO(PTQ5),
  809. PINMUX_GPIO(PTQ4),
  810. PINMUX_GPIO(PTQ3),
  811. PINMUX_GPIO(PTQ2),
  812. PINMUX_GPIO(PTQ1),
  813. PINMUX_GPIO(PTQ0),
  814. /* PTR */
  815. PINMUX_GPIO(PTR4),
  816. PINMUX_GPIO(PTR3),
  817. PINMUX_GPIO(PTR2),
  818. PINMUX_GPIO(PTR1),
  819. PINMUX_GPIO(PTR0),
  820. /* PTS */
  821. PINMUX_GPIO(PTS4),
  822. PINMUX_GPIO(PTS3),
  823. PINMUX_GPIO(PTS2),
  824. PINMUX_GPIO(PTS1),
  825. PINMUX_GPIO(PTS0),
  826. /* PTT */
  827. PINMUX_GPIO(PTT4),
  828. PINMUX_GPIO(PTT3),
  829. PINMUX_GPIO(PTT2),
  830. PINMUX_GPIO(PTT1),
  831. PINMUX_GPIO(PTT0),
  832. /* PTU */
  833. PINMUX_GPIO(PTU4),
  834. PINMUX_GPIO(PTU3),
  835. PINMUX_GPIO(PTU2),
  836. PINMUX_GPIO(PTU1),
  837. PINMUX_GPIO(PTU0),
  838. /* PTV */
  839. PINMUX_GPIO(PTV4),
  840. PINMUX_GPIO(PTV3),
  841. PINMUX_GPIO(PTV2),
  842. PINMUX_GPIO(PTV1),
  843. PINMUX_GPIO(PTV0),
  844. /* PTW */
  845. PINMUX_GPIO(PTW6),
  846. PINMUX_GPIO(PTW5),
  847. PINMUX_GPIO(PTW4),
  848. PINMUX_GPIO(PTW3),
  849. PINMUX_GPIO(PTW2),
  850. PINMUX_GPIO(PTW1),
  851. PINMUX_GPIO(PTW0),
  852. /* PTX */
  853. PINMUX_GPIO(PTX6),
  854. PINMUX_GPIO(PTX5),
  855. PINMUX_GPIO(PTX4),
  856. PINMUX_GPIO(PTX3),
  857. PINMUX_GPIO(PTX2),
  858. PINMUX_GPIO(PTX1),
  859. PINMUX_GPIO(PTX0),
  860. /* PTY */
  861. PINMUX_GPIO(PTY5),
  862. PINMUX_GPIO(PTY4),
  863. PINMUX_GPIO(PTY3),
  864. PINMUX_GPIO(PTY2),
  865. PINMUX_GPIO(PTY1),
  866. PINMUX_GPIO(PTY0),
  867. /* PTZ */
  868. PINMUX_GPIO(PTZ5),
  869. PINMUX_GPIO(PTZ4),
  870. PINMUX_GPIO(PTZ3),
  871. PINMUX_GPIO(PTZ2),
  872. PINMUX_GPIO(PTZ1),
  873. };
  874. #define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
  875. static const struct pinmux_func pinmux_func_gpios[] = {
  876. /* SCIF0 */
  877. GPIO_FN(SCIF0_TXD),
  878. GPIO_FN(SCIF0_RXD),
  879. GPIO_FN(SCIF0_RTS),
  880. GPIO_FN(SCIF0_CTS),
  881. GPIO_FN(SCIF0_SCK),
  882. /* SCIF1 */
  883. GPIO_FN(SCIF1_TXD),
  884. GPIO_FN(SCIF1_RXD),
  885. GPIO_FN(SCIF1_RTS),
  886. GPIO_FN(SCIF1_CTS),
  887. GPIO_FN(SCIF1_SCK),
  888. /* SCIF2 */
  889. GPIO_FN(SCIF2_TXD),
  890. GPIO_FN(SCIF2_RXD),
  891. GPIO_FN(SCIF2_RTS),
  892. GPIO_FN(SCIF2_CTS),
  893. GPIO_FN(SCIF2_SCK),
  894. /* SIO */
  895. GPIO_FN(SIOTXD),
  896. GPIO_FN(SIORXD),
  897. GPIO_FN(SIOD),
  898. GPIO_FN(SIOSTRB0),
  899. GPIO_FN(SIOSTRB1),
  900. GPIO_FN(SIOSCK),
  901. GPIO_FN(SIOMCK),
  902. /* CEU */
  903. GPIO_FN(VIO_D15),
  904. GPIO_FN(VIO_D14),
  905. GPIO_FN(VIO_D13),
  906. GPIO_FN(VIO_D12),
  907. GPIO_FN(VIO_D11),
  908. GPIO_FN(VIO_D10),
  909. GPIO_FN(VIO_D9),
  910. GPIO_FN(VIO_D8),
  911. GPIO_FN(VIO_D7),
  912. GPIO_FN(VIO_D6),
  913. GPIO_FN(VIO_D5),
  914. GPIO_FN(VIO_D4),
  915. GPIO_FN(VIO_D3),
  916. GPIO_FN(VIO_D2),
  917. GPIO_FN(VIO_D1),
  918. GPIO_FN(VIO_D0),
  919. GPIO_FN(VIO_CLK),
  920. GPIO_FN(VIO_VD),
  921. GPIO_FN(VIO_HD),
  922. GPIO_FN(VIO_FLD),
  923. GPIO_FN(VIO_CKO),
  924. GPIO_FN(VIO_STEX),
  925. GPIO_FN(VIO_STEM),
  926. GPIO_FN(VIO_VD2),
  927. GPIO_FN(VIO_HD2),
  928. GPIO_FN(VIO_CLK2),
  929. /* LCDC */
  930. GPIO_FN(LCDD23),
  931. GPIO_FN(LCDD22),
  932. GPIO_FN(LCDD21),
  933. GPIO_FN(LCDD20),
  934. GPIO_FN(LCDD19),
  935. GPIO_FN(LCDD18),
  936. GPIO_FN(LCDD17),
  937. GPIO_FN(LCDD16),
  938. GPIO_FN(LCDD15),
  939. GPIO_FN(LCDD14),
  940. GPIO_FN(LCDD13),
  941. GPIO_FN(LCDD12),
  942. GPIO_FN(LCDD11),
  943. GPIO_FN(LCDD10),
  944. GPIO_FN(LCDD9),
  945. GPIO_FN(LCDD8),
  946. GPIO_FN(LCDD7),
  947. GPIO_FN(LCDD6),
  948. GPIO_FN(LCDD5),
  949. GPIO_FN(LCDD4),
  950. GPIO_FN(LCDD3),
  951. GPIO_FN(LCDD2),
  952. GPIO_FN(LCDD1),
  953. GPIO_FN(LCDD0),
  954. GPIO_FN(LCDLCLK),
  955. /* Main LCD */
  956. GPIO_FN(LCDDON),
  957. GPIO_FN(LCDVCPWC),
  958. GPIO_FN(LCDVEPWC),
  959. GPIO_FN(LCDVSYN),
  960. /* Main LCD - RGB Mode */
  961. GPIO_FN(LCDDCK),
  962. GPIO_FN(LCDHSYN),
  963. GPIO_FN(LCDDISP),
  964. /* Main LCD - SYS Mode */
  965. GPIO_FN(LCDRS),
  966. GPIO_FN(LCDCS),
  967. GPIO_FN(LCDWR),
  968. GPIO_FN(LCDRD),
  969. /* Sub LCD - SYS Mode */
  970. GPIO_FN(LCDDON2),
  971. GPIO_FN(LCDVCPWC2),
  972. GPIO_FN(LCDVEPWC2),
  973. GPIO_FN(LCDVSYN2),
  974. GPIO_FN(LCDCS2),
  975. /* BSC */
  976. GPIO_FN(IOIS16),
  977. GPIO_FN(A25),
  978. GPIO_FN(A24),
  979. GPIO_FN(A23),
  980. GPIO_FN(A22),
  981. GPIO_FN(BS),
  982. GPIO_FN(CS6B_CE1B),
  983. GPIO_FN(WAIT),
  984. GPIO_FN(CS6A_CE2B),
  985. /* SBSC */
  986. GPIO_FN(HPD63),
  987. GPIO_FN(HPD62),
  988. GPIO_FN(HPD61),
  989. GPIO_FN(HPD60),
  990. GPIO_FN(HPD59),
  991. GPIO_FN(HPD58),
  992. GPIO_FN(HPD57),
  993. GPIO_FN(HPD56),
  994. GPIO_FN(HPD55),
  995. GPIO_FN(HPD54),
  996. GPIO_FN(HPD53),
  997. GPIO_FN(HPD52),
  998. GPIO_FN(HPD51),
  999. GPIO_FN(HPD50),
  1000. GPIO_FN(HPD49),
  1001. GPIO_FN(HPD48),
  1002. GPIO_FN(HPDQM7),
  1003. GPIO_FN(HPDQM6),
  1004. GPIO_FN(HPDQM5),
  1005. GPIO_FN(HPDQM4),
  1006. /* IRQ */
  1007. GPIO_FN(IRQ0),
  1008. GPIO_FN(IRQ1),
  1009. GPIO_FN(IRQ2),
  1010. GPIO_FN(IRQ3),
  1011. GPIO_FN(IRQ4),
  1012. GPIO_FN(IRQ5),
  1013. GPIO_FN(IRQ6),
  1014. GPIO_FN(IRQ7),
  1015. /* SDHI */
  1016. GPIO_FN(SDHICD),
  1017. GPIO_FN(SDHIWP),
  1018. GPIO_FN(SDHID3),
  1019. GPIO_FN(SDHID2),
  1020. GPIO_FN(SDHID1),
  1021. GPIO_FN(SDHID0),
  1022. GPIO_FN(SDHICMD),
  1023. GPIO_FN(SDHICLK),
  1024. /* SIU - Port A */
  1025. GPIO_FN(SIUAOLR),
  1026. GPIO_FN(SIUAOBT),
  1027. GPIO_FN(SIUAISLD),
  1028. GPIO_FN(SIUAILR),
  1029. GPIO_FN(SIUAIBT),
  1030. GPIO_FN(SIUAOSLD),
  1031. GPIO_FN(SIUMCKA),
  1032. GPIO_FN(SIUFCKA),
  1033. /* SIU - Port B */
  1034. GPIO_FN(SIUBOLR),
  1035. GPIO_FN(SIUBOBT),
  1036. GPIO_FN(SIUBISLD),
  1037. GPIO_FN(SIUBILR),
  1038. GPIO_FN(SIUBIBT),
  1039. GPIO_FN(SIUBOSLD),
  1040. GPIO_FN(SIUMCKB),
  1041. GPIO_FN(SIUFCKB),
  1042. /* AUD */
  1043. GPIO_FN(AUDSYNC),
  1044. GPIO_FN(AUDATA3),
  1045. GPIO_FN(AUDATA2),
  1046. GPIO_FN(AUDATA1),
  1047. GPIO_FN(AUDATA0),
  1048. /* DMAC */
  1049. GPIO_FN(DACK),
  1050. GPIO_FN(DREQ0),
  1051. /* VOU */
  1052. GPIO_FN(DV_CLKI),
  1053. GPIO_FN(DV_CLK),
  1054. GPIO_FN(DV_HSYNC),
  1055. GPIO_FN(DV_VSYNC),
  1056. GPIO_FN(DV_D15),
  1057. GPIO_FN(DV_D14),
  1058. GPIO_FN(DV_D13),
  1059. GPIO_FN(DV_D12),
  1060. GPIO_FN(DV_D11),
  1061. GPIO_FN(DV_D10),
  1062. GPIO_FN(DV_D9),
  1063. GPIO_FN(DV_D8),
  1064. GPIO_FN(DV_D7),
  1065. GPIO_FN(DV_D6),
  1066. GPIO_FN(DV_D5),
  1067. GPIO_FN(DV_D4),
  1068. GPIO_FN(DV_D3),
  1069. GPIO_FN(DV_D2),
  1070. GPIO_FN(DV_D1),
  1071. GPIO_FN(DV_D0),
  1072. /* CPG */
  1073. GPIO_FN(STATUS0),
  1074. GPIO_FN(PDSTATUS),
  1075. /* SIOF0 */
  1076. GPIO_FN(SIOF0_MCK),
  1077. GPIO_FN(SIOF0_SCK),
  1078. GPIO_FN(SIOF0_SYNC),
  1079. GPIO_FN(SIOF0_SS1),
  1080. GPIO_FN(SIOF0_SS2),
  1081. GPIO_FN(SIOF0_TXD),
  1082. GPIO_FN(SIOF0_RXD),
  1083. /* SIOF1 */
  1084. GPIO_FN(SIOF1_MCK),
  1085. GPIO_FN(SIOF1_SCK),
  1086. GPIO_FN(SIOF1_SYNC),
  1087. GPIO_FN(SIOF1_SS1),
  1088. GPIO_FN(SIOF1_SS2),
  1089. GPIO_FN(SIOF1_TXD),
  1090. GPIO_FN(SIOF1_RXD),
  1091. /* SIM */
  1092. GPIO_FN(SIM_D),
  1093. GPIO_FN(SIM_CLK),
  1094. GPIO_FN(SIM_RST),
  1095. /* TSIF */
  1096. GPIO_FN(TS_SDAT),
  1097. GPIO_FN(TS_SCK),
  1098. GPIO_FN(TS_SDEN),
  1099. GPIO_FN(TS_SPSYNC),
  1100. /* IRDA */
  1101. GPIO_FN(IRDA_IN),
  1102. GPIO_FN(IRDA_OUT),
  1103. /* TPU */
  1104. GPIO_FN(TPUTO),
  1105. /* FLCTL */
  1106. GPIO_FN(FCE),
  1107. GPIO_FN(NAF7),
  1108. GPIO_FN(NAF6),
  1109. GPIO_FN(NAF5),
  1110. GPIO_FN(NAF4),
  1111. GPIO_FN(NAF3),
  1112. GPIO_FN(NAF2),
  1113. GPIO_FN(NAF1),
  1114. GPIO_FN(NAF0),
  1115. GPIO_FN(FCDE),
  1116. GPIO_FN(FOE),
  1117. GPIO_FN(FSC),
  1118. GPIO_FN(FWE),
  1119. GPIO_FN(FRB),
  1120. /* KEYSC */
  1121. GPIO_FN(KEYIN0),
  1122. GPIO_FN(KEYIN1),
  1123. GPIO_FN(KEYIN2),
  1124. GPIO_FN(KEYIN3),
  1125. GPIO_FN(KEYIN4),
  1126. GPIO_FN(KEYOUT0),
  1127. GPIO_FN(KEYOUT1),
  1128. GPIO_FN(KEYOUT2),
  1129. GPIO_FN(KEYOUT3),
  1130. GPIO_FN(KEYOUT4_IN6),
  1131. GPIO_FN(KEYOUT5_IN5),
  1132. };
  1133. static const struct pinmux_cfg_reg pinmux_config_regs[] = {
  1134. { PINMUX_CFG_REG("PACR", 0xa4050100, 16, 2) {
  1135. VIO_D7_SCIF1_SCK, PTA7_OUT, 0, PTA7_IN,
  1136. VIO_D6_SCIF1_RXD, 0, 0, PTA6_IN,
  1137. VIO_D5_SCIF1_TXD, PTA5_OUT, 0, PTA5_IN,
  1138. VIO_D4, 0, 0, PTA4_IN,
  1139. VIO_D3, 0, 0, PTA3_IN,
  1140. VIO_D2, 0, 0, PTA2_IN,
  1141. VIO_D1, 0, 0, PTA1_IN,
  1142. VIO_D0_LCDLCLK, 0, 0, PTA0_IN }
  1143. },
  1144. { PINMUX_CFG_REG("PBCR", 0xa4050102, 16, 2) {
  1145. HPD55, PTB7_OUT, 0, PTB7_IN,
  1146. HPD54, PTB6_OUT, 0, PTB6_IN,
  1147. HPD53, PTB5_OUT, 0, PTB5_IN,
  1148. HPD52, PTB4_OUT, 0, PTB4_IN,
  1149. HPD51, PTB3_OUT, 0, PTB3_IN,
  1150. HPD50, PTB2_OUT, 0, PTB2_IN,
  1151. HPD49, PTB1_OUT, 0, PTB1_IN,
  1152. HPD48, PTB0_OUT, 0, PTB0_IN }
  1153. },
  1154. { PINMUX_CFG_REG("PCCR", 0xa4050104, 16, 2) {
  1155. 0, 0, 0, PTC7_IN,
  1156. 0, 0, 0, 0,
  1157. IOIS16, 0, 0, PTC5_IN,
  1158. HPDQM7, PTC4_OUT, 0, PTC4_IN,
  1159. HPDQM6, PTC3_OUT, 0, PTC3_IN,
  1160. HPDQM5, PTC2_OUT, 0, PTC2_IN,
  1161. 0, 0, 0, 0,
  1162. HPDQM4, PTC0_OUT, 0, PTC0_IN }
  1163. },
  1164. { PINMUX_CFG_REG("PDCR", 0xa4050106, 16, 2) {
  1165. SDHICD, 0, 0, PTD7_IN,
  1166. SDHIWP, PTD6_OUT, 0, PTD6_IN,
  1167. SDHID3, PTD5_OUT, 0, PTD5_IN,
  1168. IRQ2_SDHID2, PTD4_OUT, 0, PTD4_IN,
  1169. SDHID1, PTD3_OUT, 0, PTD3_IN,
  1170. SDHID0, PTD2_OUT, 0, PTD2_IN,
  1171. SDHICMD, PTD1_OUT, 0, PTD1_IN,
  1172. SDHICLK, PTD0_OUT, 0, 0 }
  1173. },
  1174. { PINMUX_CFG_REG("PECR", 0xa4050108, 16, 2) {
  1175. A25, PTE7_OUT, 0, PTE7_IN,
  1176. A24, PTE6_OUT, 0, PTE6_IN,
  1177. A23, PTE5_OUT, 0, PTE5_IN,
  1178. A22, PTE4_OUT, 0, PTE4_IN,
  1179. 0, 0, 0, 0,
  1180. 0, 0, 0, 0,
  1181. IRQ5, PTE1_OUT, 0, PTE1_IN,
  1182. IRQ4_BS, PTE0_OUT, 0, PTE0_IN }
  1183. },
  1184. { PINMUX_CFG_REG("PFCR", 0xa405010a, 16, 2) {
  1185. 0, 0, 0, 0,
  1186. PTF6, PTF6_OUT, 0, PTF6_IN,
  1187. SIOSCK_SIUBOBT, PTF5_OUT, 0, PTF5_IN,
  1188. SIOSTRB1_SIUBOLR, PTF4_OUT, 0, PTF4_IN,
  1189. SIOSTRB0_SIUBIBT, PTF3_OUT, 0, PTF3_IN,
  1190. SIOD_SIUBILR, PTF2_OUT, 0, PTF2_IN,
  1191. SIORXD_SIUBISLD, 0, 0, PTF1_IN,
  1192. SIOTXD_SIUBOSLD, PTF0_OUT, 0, 0 }
  1193. },
  1194. { PINMUX_CFG_REG("PGCR", 0xa405010c, 16, 2) {
  1195. 0, 0, 0, 0,
  1196. 0, 0, 0, 0,
  1197. 0, 0, 0, 0,
  1198. AUDSYNC, PTG4_OUT, 0, 0,
  1199. AUDATA3, PTG3_OUT, 0, 0,
  1200. AUDATA2, PTG2_OUT, 0, 0,
  1201. AUDATA1, PTG1_OUT, 0, 0,
  1202. AUDATA0, PTG0_OUT, 0, 0 }
  1203. },
  1204. { PINMUX_CFG_REG("PHCR", 0xa405010e, 16, 2) {
  1205. LCDVCPWC_LCDVCPWC2, PTH7_OUT, 0, 0,
  1206. LCDVSYN2_DACK, PTH6_OUT, 0, PTH6_IN,
  1207. LCDVSYN, PTH5_OUT, 0, PTH5_IN,
  1208. LCDDISP_LCDRS, PTH4_OUT, 0, 0,
  1209. LCDHSYN_LCDCS, PTH3_OUT, 0, 0,
  1210. LCDDON_LCDDON2, PTH2_OUT, 0, 0,
  1211. LCDD17_DV_HSYNC, PTH1_OUT, 0, PTH1_IN,
  1212. LCDD16_DV_VSYNC, PTH0_OUT, 0, PTH0_IN }
  1213. },
  1214. { PINMUX_CFG_REG("PJCR", 0xa4050110, 16, 2) {
  1215. STATUS0, PTJ7_OUT, 0, 0,
  1216. 0, PTJ6_OUT, 0, 0,
  1217. PDSTATUS, PTJ5_OUT, 0, 0,
  1218. 0, 0, 0, 0,
  1219. 0, 0, 0, 0,
  1220. 0, 0, 0, 0,
  1221. IRQ1, PTJ1_OUT, 0, PTJ1_IN,
  1222. IRQ0, PTJ0_OUT, 0, PTJ0_IN }
  1223. },
  1224. { PINMUX_CFG_REG("PKCR", 0xa4050112, 16, 2) {
  1225. 0, 0, 0, 0,
  1226. SIUAILR_SIOF1_SS2, PTK6_OUT, 0, PTK6_IN,
  1227. SIUAIBT_SIOF1_SS1, PTK5_OUT, 0, PTK5_IN,
  1228. SIUAOLR_SIOF1_SYNC, PTK4_OUT, 0, PTK4_IN,
  1229. SIUAOBT_SIOF1_SCK, PTK3_OUT, 0, PTK3_IN,
  1230. SIUAISLD_SIOF1_RXD, 0, 0, PTK2_IN,
  1231. SIUAOSLD_SIOF1_TXD, PTK1_OUT, 0, 0,
  1232. PTK0, PTK0_OUT, 0, PTK0_IN }
  1233. },
  1234. { PINMUX_CFG_REG("PLCR", 0xa4050114, 16, 2) {
  1235. LCDD15_DV_D15, PTL7_OUT, 0, PTL7_IN,
  1236. LCDD14_DV_D14, PTL6_OUT, 0, PTL6_IN,
  1237. LCDD13_DV_D13, PTL5_OUT, 0, PTL5_IN,
  1238. LCDD12_DV_D12, PTL4_OUT, 0, PTL4_IN,
  1239. LCDD11_DV_D11, PTL3_OUT, 0, PTL3_IN,
  1240. LCDD10_DV_D10, PTL2_OUT, 0, PTL2_IN,
  1241. LCDD9_DV_D9, PTL1_OUT, 0, PTL1_IN,
  1242. LCDD8_DV_D8, PTL0_OUT, 0, PTL0_IN }
  1243. },
  1244. { PINMUX_CFG_REG("PMCR", 0xa4050116, 16, 2) {
  1245. LCDD7_DV_D7, PTM7_OUT, 0, PTM7_IN,
  1246. LCDD6_DV_D6, PTM6_OUT, 0, PTM6_IN,
  1247. LCDD5_DV_D5, PTM5_OUT, 0, PTM5_IN,
  1248. LCDD4_DV_D4, PTM4_OUT, 0, PTM4_IN,
  1249. LCDD3_DV_D3, PTM3_OUT, 0, PTM3_IN,
  1250. LCDD2_DV_D2, PTM2_OUT, 0, PTM2_IN,
  1251. LCDD1_DV_D1, PTM1_OUT, 0, PTM1_IN,
  1252. LCDD0_DV_D0, PTM0_OUT, 0, PTM0_IN }
  1253. },
  1254. { PINMUX_CFG_REG("PNCR", 0xa4050118, 16, 2) {
  1255. HPD63, PTN7_OUT, 0, PTN7_IN,
  1256. HPD62, PTN6_OUT, 0, PTN6_IN,
  1257. HPD61, PTN5_OUT, 0, PTN5_IN,
  1258. HPD60, PTN4_OUT, 0, PTN4_IN,
  1259. HPD59, PTN3_OUT, 0, PTN3_IN,
  1260. HPD58, PTN2_OUT, 0, PTN2_IN,
  1261. HPD57, PTN1_OUT, 0, PTN1_IN,
  1262. HPD56, PTN0_OUT, 0, PTN0_IN }
  1263. },
  1264. { PINMUX_CFG_REG("PQCR", 0xa405011a, 16, 2) {
  1265. 0, 0, 0, 0,
  1266. SIOF0_SS2_SIM_RST, PTQ6_OUT, 0, 0,
  1267. SIOF0_SS1_TS_SPSYNC, PTQ5_OUT, 0, PTQ5_IN,
  1268. SIOF0_SYNC_TS_SDEN, PTQ4_OUT, 0, PTQ4_IN,
  1269. SIOF0_SCK_TS_SCK, PTQ3_OUT, 0, PTQ3_IN,
  1270. PTQ2, 0, 0, PTQ2_IN,
  1271. PTQ1, PTQ1_OUT, 0, 0,
  1272. PTQ0, PTQ0_OUT, 0, PTQ0_IN }
  1273. },
  1274. { PINMUX_CFG_REG("PRCR", 0xa405011c, 16, 2) {
  1275. 0, 0, 0, 0,
  1276. 0, 0, 0, 0,
  1277. 0, 0, 0, 0,
  1278. LCDRD, PTR4_OUT, 0, 0,
  1279. CS6B_CE1B_LCDCS2, PTR3_OUT, 0, 0,
  1280. WAIT, 0, 0, PTR2_IN,
  1281. LCDDCK_LCDWR, PTR1_OUT, 0, 0,
  1282. LCDVEPWC_LCDVEPWC2, PTR0_OUT, 0, 0 }
  1283. },
  1284. { PINMUX_CFG_REG("PSCR", 0xa405011e, 16, 2) {
  1285. 0, 0, 0, 0,
  1286. 0, 0, 0, 0,
  1287. 0, 0, 0, 0,
  1288. SCIF0_CTS_SIUAISPD, 0, 0, PTS4_IN,
  1289. SCIF0_RTS_SIUAOSPD, PTS3_OUT, 0, 0,
  1290. SCIF0_SCK_TPUTO, PTS2_OUT, 0, PTS2_IN,
  1291. SCIF0_RXD, 0, 0, PTS1_IN,
  1292. SCIF0_TXD, PTS0_OUT, 0, 0 }
  1293. },
  1294. { PINMUX_CFG_REG("PTCR", 0xa4050140, 16, 2) {
  1295. 0, 0, 0, 0,
  1296. 0, 0, 0, 0,
  1297. 0, 0, 0, 0,
  1298. FOE_VIO_VD2, PTT4_OUT, 0, PTT4_IN,
  1299. FWE, PTT3_OUT, 0, PTT3_IN,
  1300. FSC, PTT2_OUT, 0, PTT2_IN,
  1301. DREQ0, 0, 0, PTT1_IN,
  1302. FCDE, PTT0_OUT, 0, 0 }
  1303. },
  1304. { PINMUX_CFG_REG("PUCR", 0xa4050142, 16, 2) {
  1305. 0, 0, 0, 0,
  1306. 0, 0, 0, 0,
  1307. 0, 0, 0, 0,
  1308. NAF2_VIO_D10, PTU4_OUT, 0, PTU4_IN,
  1309. NAF1_VIO_D9, PTU3_OUT, 0, PTU3_IN,
  1310. NAF0_VIO_D8, PTU2_OUT, 0, PTU2_IN,
  1311. FRB_VIO_CLK2, 0, 0, PTU1_IN,
  1312. FCE_VIO_HD2, PTU0_OUT, 0, PTU0_IN }
  1313. },
  1314. { PINMUX_CFG_REG("PVCR", 0xa4050144, 16, 2) {
  1315. 0, 0, 0, 0,
  1316. 0, 0, 0, 0,
  1317. 0, 0, 0, 0,
  1318. NAF7_VIO_D15, PTV4_OUT, 0, PTV4_IN,
  1319. NAF6_VIO_D14, PTV3_OUT, 0, PTV3_IN,
  1320. NAF5_VIO_D13, PTV2_OUT, 0, PTV2_IN,
  1321. NAF4_VIO_D12, PTV1_OUT, 0, PTV1_IN,
  1322. NAF3_VIO_D11, PTV0_OUT, 0, PTV0_IN }
  1323. },
  1324. { PINMUX_CFG_REG("PWCR", 0xa4050146, 16, 2) {
  1325. 0, 0, 0, 0,
  1326. VIO_FLD_SCIF2_CTS, 0, 0, PTW6_IN,
  1327. VIO_CKO_SCIF2_RTS, PTW5_OUT, 0, 0,
  1328. VIO_STEX_SCIF2_SCK, PTW4_OUT, 0, PTW4_IN,
  1329. VIO_STEM_SCIF2_TXD, PTW3_OUT, 0, PTW3_IN,
  1330. VIO_HD_SCIF2_RXD, PTW2_OUT, 0, PTW2_IN,
  1331. VIO_VD_SCIF1_CTS, PTW1_OUT, 0, PTW1_IN,
  1332. VIO_CLK_SCIF1_RTS, PTW0_OUT, 0, PTW0_IN }
  1333. },
  1334. { PINMUX_CFG_REG("PXCR", 0xa4050148, 16, 2) {
  1335. 0, 0, 0, 0,
  1336. CS6A_CE2B, PTX6_OUT, 0, PTX6_IN,
  1337. LCDD23, PTX5_OUT, 0, PTX5_IN,
  1338. LCDD22, PTX4_OUT, 0, PTX4_IN,
  1339. LCDD21, PTX3_OUT, 0, PTX3_IN,
  1340. LCDD20, PTX2_OUT, 0, PTX2_IN,
  1341. LCDD19_DV_CLKI, PTX1_OUT, 0, PTX1_IN,
  1342. LCDD18_DV_CLK, PTX0_OUT, 0, PTX0_IN }
  1343. },
  1344. { PINMUX_CFG_REG("PYCR", 0xa405014a, 16, 2) {
  1345. 0, 0, 0, 0,
  1346. 0, 0, 0, 0,
  1347. KEYOUT5_IN5, PTY5_OUT, 0, PTY5_IN,
  1348. KEYOUT4_IN6, PTY4_OUT, 0, PTY4_IN,
  1349. KEYOUT3, PTY3_OUT, 0, PTY3_IN,
  1350. KEYOUT2, PTY2_OUT, 0, PTY2_IN,
  1351. KEYOUT1, PTY1_OUT, 0, 0,
  1352. KEYOUT0, PTY0_OUT, 0, PTY0_IN }
  1353. },
  1354. { PINMUX_CFG_REG("PZCR", 0xa405014c, 16, 2) {
  1355. 0, 0, 0, 0,
  1356. 0, 0, 0, 0,
  1357. KEYIN4_IRQ7, 0, 0, PTZ5_IN,
  1358. KEYIN3, 0, 0, PTZ4_IN,
  1359. KEYIN2, 0, 0, PTZ3_IN,
  1360. KEYIN1, 0, 0, PTZ2_IN,
  1361. KEYIN0_IRQ6, 0, 0, PTZ1_IN,
  1362. 0, 0, 0, 0 }
  1363. },
  1364. { PINMUX_CFG_REG("PSELA", 0xa405014e, 16, 1) {
  1365. PSA15_KEYIN0, PSA15_IRQ6,
  1366. PSA14_KEYIN4, PSA14_IRQ7,
  1367. 0, 0,
  1368. 0, 0,
  1369. 0, 0,
  1370. 0, 0,
  1371. PSA9_IRQ4, PSA9_BS,
  1372. 0, 0,
  1373. 0, 0,
  1374. 0, 0,
  1375. 0, 0,
  1376. PSA4_IRQ2, PSA4_SDHID2,
  1377. 0, 0,
  1378. 0, 0,
  1379. 0, 0,
  1380. 0, 0 }
  1381. },
  1382. { PINMUX_CFG_REG("PSELB", 0xa4050150, 16, 1) {
  1383. PSB15_SIOTXD, PSB15_SIUBOSLD,
  1384. PSB14_SIORXD, PSB14_SIUBISLD,
  1385. PSB13_SIOD, PSB13_SIUBILR,
  1386. PSB12_SIOSTRB0, PSB12_SIUBIBT,
  1387. PSB11_SIOSTRB1, PSB11_SIUBOLR,
  1388. PSB10_SIOSCK, PSB10_SIUBOBT,
  1389. PSB9_SIOMCK, PSB9_SIUMCKB,
  1390. PSB8_SIOF0_MCK, PSB8_IRQ3,
  1391. PSB7_SIOF0_TXD, PSB7_IRDA_OUT,
  1392. PSB6_SIOF0_RXD, PSB6_IRDA_IN,
  1393. PSB5_SIOF0_SCK, PSB5_TS_SCK,
  1394. PSB4_SIOF0_SYNC, PSB4_TS_SDEN,
  1395. PSB3_SIOF0_SS1, PSB3_TS_SPSYNC,
  1396. PSB2_SIOF0_SS2, PSB2_SIM_RST,
  1397. PSB1_SIUMCKA, PSB1_SIOF1_MCK,
  1398. PSB0_SIUAOSLD, PSB0_SIOF1_TXD }
  1399. },
  1400. { PINMUX_CFG_REG("PSELC", 0xa4050152, 16, 1) {
  1401. PSC15_SIUAISLD, PSC15_SIOF1_RXD,
  1402. PSC14_SIUAOBT, PSC14_SIOF1_SCK,
  1403. PSC13_SIUAOLR, PSC13_SIOF1_SYNC,
  1404. PSC12_SIUAIBT, PSC12_SIOF1_SS1,
  1405. PSC11_SIUAILR, PSC11_SIOF1_SS2,
  1406. 0, 0,
  1407. 0, 0,
  1408. 0, 0,
  1409. 0, 0,
  1410. 0, 0,
  1411. 0, 0,
  1412. 0, 0,
  1413. 0, 0,
  1414. 0, 0,
  1415. 0, 0,
  1416. PSC0_NAF, PSC0_VIO }
  1417. },
  1418. { PINMUX_CFG_REG("PSELD", 0xa4050154, 16, 1) {
  1419. 0, 0,
  1420. 0, 0,
  1421. PSD13_VIO, PSD13_SCIF2,
  1422. PSD12_VIO, PSD12_SCIF1,
  1423. PSD11_VIO, PSD11_SCIF1,
  1424. PSD10_VIO_D0, PSD10_LCDLCLK,
  1425. PSD9_SIOMCK_SIUMCKB, PSD9_SIUFCKB,
  1426. PSD8_SCIF0_SCK, PSD8_TPUTO,
  1427. PSD7_SCIF0_RTS, PSD7_SIUAOSPD,
  1428. PSD6_SCIF0_CTS, PSD6_SIUAISPD,
  1429. PSD5_CS6B_CE1B, PSD5_LCDCS2,
  1430. 0, 0,
  1431. PSD3_LCDVEPWC_LCDVCPWC, PSD3_LCDVEPWC2_LCDVCPWC2,
  1432. PSD2_LCDDON, PSD2_LCDDON2,
  1433. 0, 0,
  1434. PSD0_LCDD19_LCDD0, PSD0_DV }
  1435. },
  1436. { PINMUX_CFG_REG("PSELE", 0xa4050156, 16, 1) {
  1437. PSE15_SIOF0_MCK_IRQ3, PSE15_SIM_D,
  1438. PSE14_SIOF0_TXD_IRDA_OUT, PSE14_SIM_CLK,
  1439. PSE13_SIOF0_RXD_IRDA_IN, PSE13_TS_SDAT,
  1440. PSE12_LCDVSYN2, PSE12_DACK,
  1441. PSE11_SIUMCKA_SIOF1_MCK, PSE11_SIUFCKA,
  1442. 0, 0,
  1443. 0, 0,
  1444. 0, 0,
  1445. 0, 0,
  1446. 0, 0,
  1447. 0, 0,
  1448. 0, 0,
  1449. PSE3_FLCTL, PSE3_VIO,
  1450. PSE2_NAF2, PSE2_VIO_D10,
  1451. PSE1_NAF1, PSE1_VIO_D9,
  1452. PSE0_NAF0, PSE0_VIO_D8 }
  1453. },
  1454. { PINMUX_CFG_REG("HIZCRA", 0xa4050158, 16, 1) {
  1455. 0, 0,
  1456. HIZA14_KEYSC, HIZA14_HIZ,
  1457. 0, 0,
  1458. 0, 0,
  1459. 0, 0,
  1460. HIZA10_NAF, HIZA10_HIZ,
  1461. HIZA9_VIO, HIZA9_HIZ,
  1462. HIZA8_LCDC, HIZA8_HIZ,
  1463. HIZA7_LCDC, HIZA7_HIZ,
  1464. HIZA6_LCDC, HIZA6_HIZ,
  1465. 0, 0,
  1466. 0, 0,
  1467. 0, 0,
  1468. 0, 0,
  1469. 0, 0,
  1470. 0, 0 }
  1471. },
  1472. { PINMUX_CFG_REG("HIZCRB", 0xa405015a, 16, 1) {
  1473. 0, 0,
  1474. 0, 0,
  1475. 0, 0,
  1476. 0, 0,
  1477. 0, 0,
  1478. 0, 0,
  1479. 0, 0,
  1480. 0, 0,
  1481. 0, 0,
  1482. 0, 0,
  1483. 0, 0,
  1484. HIZB4_SIUA, HIZB4_HIZ,
  1485. 0, 0,
  1486. 0, 0,
  1487. HIZB1_VIO, HIZB1_HIZ,
  1488. HIZB0_VIO, HIZB0_HIZ }
  1489. },
  1490. { PINMUX_CFG_REG("HIZCRC", 0xa405015c, 16, 1) {
  1491. HIZC15_IRQ7, HIZC15_HIZ,
  1492. HIZC14_IRQ6, HIZC14_HIZ,
  1493. HIZC13_IRQ5, HIZC13_HIZ,
  1494. HIZC12_IRQ4, HIZC12_HIZ,
  1495. HIZC11_IRQ3, HIZC11_HIZ,
  1496. HIZC10_IRQ2, HIZC10_HIZ,
  1497. HIZC9_IRQ1, HIZC9_HIZ,
  1498. HIZC8_IRQ0, HIZC8_HIZ,
  1499. 0, 0,
  1500. 0, 0,
  1501. 0, 0,
  1502. 0, 0,
  1503. 0, 0,
  1504. 0, 0,
  1505. 0, 0,
  1506. 0, 0 }
  1507. },
  1508. { PINMUX_CFG_REG("MSELCRB", 0xa4050182, 16, 1) {
  1509. 0, 0,
  1510. 0, 0,
  1511. 0, 0,
  1512. 0, 0,
  1513. 0, 0,
  1514. 0, 0,
  1515. MSELB9_VIO, MSELB9_VIO2,
  1516. MSELB8_RGB, MSELB8_SYS,
  1517. 0, 0,
  1518. 0, 0,
  1519. 0, 0,
  1520. 0, 0,
  1521. 0, 0,
  1522. 0, 0,
  1523. 0, 0,
  1524. 0, 0 }
  1525. },
  1526. {}
  1527. };
  1528. static const struct pinmux_data_reg pinmux_data_regs[] = {
  1529. { PINMUX_DATA_REG("PADR", 0xa4050120, 8) {
  1530. PTA7_DATA, PTA6_DATA, PTA5_DATA, PTA4_DATA,
  1531. PTA3_DATA, PTA2_DATA, PTA1_DATA, PTA0_DATA }
  1532. },
  1533. { PINMUX_DATA_REG("PBDR", 0xa4050122, 8) {
  1534. PTB7_DATA, PTB6_DATA, PTB5_DATA, PTB4_DATA,
  1535. PTB3_DATA, PTB2_DATA, PTB1_DATA, PTB0_DATA }
  1536. },
  1537. { PINMUX_DATA_REG("PCDR", 0xa4050124, 8) {
  1538. PTC7_DATA, 0, PTC5_DATA, PTC4_DATA,
  1539. PTC3_DATA, PTC2_DATA, 0, PTC0_DATA }
  1540. },
  1541. { PINMUX_DATA_REG("PDDR", 0xa4050126, 8) {
  1542. PTD7_DATA, PTD6_DATA, PTD5_DATA, PTD4_DATA,
  1543. PTD3_DATA, PTD2_DATA, PTD1_DATA, PTD0_DATA }
  1544. },
  1545. { PINMUX_DATA_REG("PEDR", 0xa4050128, 8) {
  1546. PTE7_DATA, PTE6_DATA, PTE5_DATA, PTE4_DATA,
  1547. 0, 0, PTE1_DATA, PTE0_DATA }
  1548. },
  1549. { PINMUX_DATA_REG("PFDR", 0xa405012a, 8) {
  1550. 0, PTF6_DATA, PTF5_DATA, PTF4_DATA,
  1551. PTF3_DATA, PTF2_DATA, PTF1_DATA, PTF0_DATA }
  1552. },
  1553. { PINMUX_DATA_REG("PGDR", 0xa405012c, 8) {
  1554. 0, 0, 0, PTG4_DATA,
  1555. PTG3_DATA, PTG2_DATA, PTG1_DATA, PTG0_DATA }
  1556. },
  1557. { PINMUX_DATA_REG("PHDR", 0xa405012e, 8) {
  1558. PTH7_DATA, PTH6_DATA, PTH5_DATA, PTH4_DATA,
  1559. PTH3_DATA, PTH2_DATA, PTH1_DATA, PTH0_DATA }
  1560. },
  1561. { PINMUX_DATA_REG("PJDR", 0xa4050130, 8) {
  1562. PTJ7_DATA, PTJ6_DATA, PTJ5_DATA, 0,
  1563. 0, 0, PTJ1_DATA, PTJ0_DATA }
  1564. },
  1565. { PINMUX_DATA_REG("PKDR", 0xa4050132, 8) {
  1566. 0, PTK6_DATA, PTK5_DATA, PTK4_DATA,
  1567. PTK3_DATA, PTK2_DATA, PTK1_DATA, PTK0_DATA }
  1568. },
  1569. { PINMUX_DATA_REG("PLDR", 0xa4050134, 8) {
  1570. PTL7_DATA, PTL6_DATA, PTL5_DATA, PTL4_DATA,
  1571. PTL3_DATA, PTL2_DATA, PTL1_DATA, PTL0_DATA }
  1572. },
  1573. { PINMUX_DATA_REG("PMDR", 0xa4050136, 8) {
  1574. PTM7_DATA, PTM6_DATA, PTM5_DATA, PTM4_DATA,
  1575. PTM3_DATA, PTM2_DATA, PTM1_DATA, PTM0_DATA }
  1576. },
  1577. { PINMUX_DATA_REG("PNDR", 0xa4050138, 8) {
  1578. PTN7_DATA, PTN6_DATA, PTN5_DATA, PTN4_DATA,
  1579. PTN3_DATA, PTN2_DATA, PTN1_DATA, PTN0_DATA }
  1580. },
  1581. { PINMUX_DATA_REG("PQDR", 0xa405013a, 8) {
  1582. 0, PTQ6_DATA, PTQ5_DATA, PTQ4_DATA,
  1583. PTQ3_DATA, PTQ2_DATA, PTQ1_DATA, PTQ0_DATA }
  1584. },
  1585. { PINMUX_DATA_REG("PRDR", 0xa405013c, 8) {
  1586. 0, 0, 0, PTR4_DATA,
  1587. PTR3_DATA, PTR2_DATA, PTR1_DATA, PTR0_DATA }
  1588. },
  1589. { PINMUX_DATA_REG("PSDR", 0xa405013e, 8) {
  1590. 0, 0, 0, PTS4_DATA,
  1591. PTS3_DATA, PTS2_DATA, PTS1_DATA, PTS0_DATA }
  1592. },
  1593. { PINMUX_DATA_REG("PTDR", 0xa4050160, 8) {
  1594. 0, 0, 0, PTT4_DATA,
  1595. PTT3_DATA, PTT2_DATA, PTT1_DATA, PTT0_DATA }
  1596. },
  1597. { PINMUX_DATA_REG("PUDR", 0xa4050162, 8) {
  1598. 0, 0, 0, PTU4_DATA,
  1599. PTU3_DATA, PTU2_DATA, PTU1_DATA, PTU0_DATA }
  1600. },
  1601. { PINMUX_DATA_REG("PVDR", 0xa4050164, 8) {
  1602. 0, 0, 0, PTV4_DATA,
  1603. PTV3_DATA, PTV2_DATA, PTV1_DATA, PTV0_DATA }
  1604. },
  1605. { PINMUX_DATA_REG("PWDR", 0xa4050166, 8) {
  1606. 0, PTW6_DATA, PTW5_DATA, PTW4_DATA,
  1607. PTW3_DATA, PTW2_DATA, PTW1_DATA, PTW0_DATA }
  1608. },
  1609. { PINMUX_DATA_REG("PXDR", 0xa4050168, 8) {
  1610. 0, PTX6_DATA, PTX5_DATA, PTX4_DATA,
  1611. PTX3_DATA, PTX2_DATA, PTX1_DATA, PTX0_DATA }
  1612. },
  1613. { PINMUX_DATA_REG("PYDR", 0xa405016a, 8) {
  1614. 0, PTY6_DATA, PTY5_DATA, PTY4_DATA,
  1615. PTY3_DATA, PTY2_DATA, PTY1_DATA, PTY0_DATA }
  1616. },
  1617. { PINMUX_DATA_REG("PZDR", 0xa405016c, 8) {
  1618. 0, 0, PTZ5_DATA, PTZ4_DATA,
  1619. PTZ3_DATA, PTZ2_DATA, PTZ1_DATA, PTZ0_DATA }
  1620. },
  1621. { },
  1622. };
  1623. const struct sh_pfc_soc_info sh7722_pinmux_info = {
  1624. .name = "sh7722_pfc",
  1625. .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
  1626. .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
  1627. .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
  1628. .pins = pinmux_pins,
  1629. .nr_pins = ARRAY_SIZE(pinmux_pins),
  1630. .func_gpios = pinmux_func_gpios,
  1631. .nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
  1632. .cfg_regs = pinmux_config_regs,
  1633. .data_regs = pinmux_data_regs,
  1634. .pinmux_data = pinmux_data,
  1635. .pinmux_data_size = ARRAY_SIZE(pinmux_data),
  1636. };