pinctrl-meson8.c 30 KB

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  1. /*
  2. * Pin controller and GPIO driver for Amlogic Meson8.
  3. *
  4. * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * You should have received a copy of the GNU General Public License
  11. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  12. */
  13. #include <dt-bindings/gpio/meson8-gpio.h>
  14. #include "pinctrl-meson.h"
  15. #define AO_OFF 120
  16. static const struct pinctrl_pin_desc meson8_cbus_pins[] = {
  17. MESON_PIN(GPIOX_0, 0),
  18. MESON_PIN(GPIOX_1, 0),
  19. MESON_PIN(GPIOX_2, 0),
  20. MESON_PIN(GPIOX_3, 0),
  21. MESON_PIN(GPIOX_4, 0),
  22. MESON_PIN(GPIOX_5, 0),
  23. MESON_PIN(GPIOX_6, 0),
  24. MESON_PIN(GPIOX_7, 0),
  25. MESON_PIN(GPIOX_8, 0),
  26. MESON_PIN(GPIOX_9, 0),
  27. MESON_PIN(GPIOX_10, 0),
  28. MESON_PIN(GPIOX_11, 0),
  29. MESON_PIN(GPIOX_12, 0),
  30. MESON_PIN(GPIOX_13, 0),
  31. MESON_PIN(GPIOX_14, 0),
  32. MESON_PIN(GPIOX_15, 0),
  33. MESON_PIN(GPIOX_16, 0),
  34. MESON_PIN(GPIOX_17, 0),
  35. MESON_PIN(GPIOX_18, 0),
  36. MESON_PIN(GPIOX_19, 0),
  37. MESON_PIN(GPIOX_20, 0),
  38. MESON_PIN(GPIOX_21, 0),
  39. MESON_PIN(GPIOY_0, 0),
  40. MESON_PIN(GPIOY_1, 0),
  41. MESON_PIN(GPIOY_2, 0),
  42. MESON_PIN(GPIOY_3, 0),
  43. MESON_PIN(GPIOY_4, 0),
  44. MESON_PIN(GPIOY_5, 0),
  45. MESON_PIN(GPIOY_6, 0),
  46. MESON_PIN(GPIOY_7, 0),
  47. MESON_PIN(GPIOY_8, 0),
  48. MESON_PIN(GPIOY_9, 0),
  49. MESON_PIN(GPIOY_10, 0),
  50. MESON_PIN(GPIOY_11, 0),
  51. MESON_PIN(GPIOY_12, 0),
  52. MESON_PIN(GPIOY_13, 0),
  53. MESON_PIN(GPIOY_14, 0),
  54. MESON_PIN(GPIOY_15, 0),
  55. MESON_PIN(GPIOY_16, 0),
  56. MESON_PIN(GPIODV_0, 0),
  57. MESON_PIN(GPIODV_1, 0),
  58. MESON_PIN(GPIODV_2, 0),
  59. MESON_PIN(GPIODV_3, 0),
  60. MESON_PIN(GPIODV_4, 0),
  61. MESON_PIN(GPIODV_5, 0),
  62. MESON_PIN(GPIODV_6, 0),
  63. MESON_PIN(GPIODV_7, 0),
  64. MESON_PIN(GPIODV_8, 0),
  65. MESON_PIN(GPIODV_9, 0),
  66. MESON_PIN(GPIODV_10, 0),
  67. MESON_PIN(GPIODV_11, 0),
  68. MESON_PIN(GPIODV_12, 0),
  69. MESON_PIN(GPIODV_13, 0),
  70. MESON_PIN(GPIODV_14, 0),
  71. MESON_PIN(GPIODV_15, 0),
  72. MESON_PIN(GPIODV_16, 0),
  73. MESON_PIN(GPIODV_17, 0),
  74. MESON_PIN(GPIODV_18, 0),
  75. MESON_PIN(GPIODV_19, 0),
  76. MESON_PIN(GPIODV_20, 0),
  77. MESON_PIN(GPIODV_21, 0),
  78. MESON_PIN(GPIODV_22, 0),
  79. MESON_PIN(GPIODV_23, 0),
  80. MESON_PIN(GPIODV_24, 0),
  81. MESON_PIN(GPIODV_25, 0),
  82. MESON_PIN(GPIODV_26, 0),
  83. MESON_PIN(GPIODV_27, 0),
  84. MESON_PIN(GPIODV_28, 0),
  85. MESON_PIN(GPIODV_29, 0),
  86. MESON_PIN(GPIOH_0, 0),
  87. MESON_PIN(GPIOH_1, 0),
  88. MESON_PIN(GPIOH_2, 0),
  89. MESON_PIN(GPIOH_3, 0),
  90. MESON_PIN(GPIOH_4, 0),
  91. MESON_PIN(GPIOH_5, 0),
  92. MESON_PIN(GPIOH_6, 0),
  93. MESON_PIN(GPIOH_7, 0),
  94. MESON_PIN(GPIOH_8, 0),
  95. MESON_PIN(GPIOH_9, 0),
  96. MESON_PIN(GPIOZ_0, 0),
  97. MESON_PIN(GPIOZ_1, 0),
  98. MESON_PIN(GPIOZ_2, 0),
  99. MESON_PIN(GPIOZ_3, 0),
  100. MESON_PIN(GPIOZ_4, 0),
  101. MESON_PIN(GPIOZ_5, 0),
  102. MESON_PIN(GPIOZ_6, 0),
  103. MESON_PIN(GPIOZ_7, 0),
  104. MESON_PIN(GPIOZ_8, 0),
  105. MESON_PIN(GPIOZ_9, 0),
  106. MESON_PIN(GPIOZ_10, 0),
  107. MESON_PIN(GPIOZ_11, 0),
  108. MESON_PIN(GPIOZ_12, 0),
  109. MESON_PIN(GPIOZ_13, 0),
  110. MESON_PIN(GPIOZ_14, 0),
  111. MESON_PIN(CARD_0, 0),
  112. MESON_PIN(CARD_1, 0),
  113. MESON_PIN(CARD_2, 0),
  114. MESON_PIN(CARD_3, 0),
  115. MESON_PIN(CARD_4, 0),
  116. MESON_PIN(CARD_5, 0),
  117. MESON_PIN(CARD_6, 0),
  118. MESON_PIN(BOOT_0, 0),
  119. MESON_PIN(BOOT_1, 0),
  120. MESON_PIN(BOOT_2, 0),
  121. MESON_PIN(BOOT_3, 0),
  122. MESON_PIN(BOOT_4, 0),
  123. MESON_PIN(BOOT_5, 0),
  124. MESON_PIN(BOOT_6, 0),
  125. MESON_PIN(BOOT_7, 0),
  126. MESON_PIN(BOOT_8, 0),
  127. MESON_PIN(BOOT_9, 0),
  128. MESON_PIN(BOOT_10, 0),
  129. MESON_PIN(BOOT_11, 0),
  130. MESON_PIN(BOOT_12, 0),
  131. MESON_PIN(BOOT_13, 0),
  132. MESON_PIN(BOOT_14, 0),
  133. MESON_PIN(BOOT_15, 0),
  134. MESON_PIN(BOOT_16, 0),
  135. MESON_PIN(BOOT_17, 0),
  136. MESON_PIN(BOOT_18, 0),
  137. };
  138. static const struct pinctrl_pin_desc meson8_aobus_pins[] = {
  139. MESON_PIN(GPIOAO_0, AO_OFF),
  140. MESON_PIN(GPIOAO_1, AO_OFF),
  141. MESON_PIN(GPIOAO_2, AO_OFF),
  142. MESON_PIN(GPIOAO_3, AO_OFF),
  143. MESON_PIN(GPIOAO_4, AO_OFF),
  144. MESON_PIN(GPIOAO_5, AO_OFF),
  145. MESON_PIN(GPIOAO_6, AO_OFF),
  146. MESON_PIN(GPIOAO_7, AO_OFF),
  147. MESON_PIN(GPIOAO_8, AO_OFF),
  148. MESON_PIN(GPIOAO_9, AO_OFF),
  149. MESON_PIN(GPIOAO_10, AO_OFF),
  150. MESON_PIN(GPIOAO_11, AO_OFF),
  151. MESON_PIN(GPIOAO_12, AO_OFF),
  152. MESON_PIN(GPIOAO_13, AO_OFF),
  153. MESON_PIN(GPIO_BSD_EN, AO_OFF),
  154. MESON_PIN(GPIO_TEST_N, AO_OFF),
  155. };
  156. /* bank X */
  157. static const unsigned int sd_d0_a_pins[] = { PIN(GPIOX_0, 0) };
  158. static const unsigned int sd_d1_a_pins[] = { PIN(GPIOX_1, 0) };
  159. static const unsigned int sd_d2_a_pins[] = { PIN(GPIOX_2, 0) };
  160. static const unsigned int sd_d3_a_pins[] = { PIN(GPIOX_3, 0) };
  161. static const unsigned int sd_clk_a_pins[] = { PIN(GPIOX_8, 0) };
  162. static const unsigned int sd_cmd_a_pins[] = { PIN(GPIOX_9, 0) };
  163. static const unsigned int sdxc_d0_a_pins[] = { PIN(GPIOX_0, 0) };
  164. static const unsigned int sdxc_d13_a_pins[] = { PIN(GPIOX_1, 0), PIN(GPIOX_2, 0),
  165. PIN(GPIOX_3, 0) };
  166. static const unsigned int sdxc_d47_a_pins[] = { PIN(GPIOX_4, 0), PIN(GPIOX_5, 0),
  167. PIN(GPIOX_6, 0), PIN(GPIOX_7, 0) };
  168. static const unsigned int sdxc_clk_a_pins[] = { PIN(GPIOX_8, 0) };
  169. static const unsigned int sdxc_cmd_a_pins[] = { PIN(GPIOX_9, 0) };
  170. static const unsigned int pcm_out_a_pins[] = { PIN(GPIOX_4, 0) };
  171. static const unsigned int pcm_in_a_pins[] = { PIN(GPIOX_5, 0) };
  172. static const unsigned int pcm_fs_a_pins[] = { PIN(GPIOX_6, 0) };
  173. static const unsigned int pcm_clk_a_pins[] = { PIN(GPIOX_7, 0) };
  174. static const unsigned int uart_tx_a0_pins[] = { PIN(GPIOX_4, 0) };
  175. static const unsigned int uart_rx_a0_pins[] = { PIN(GPIOX_5, 0) };
  176. static const unsigned int uart_cts_a0_pins[] = { PIN(GPIOX_6, 0) };
  177. static const unsigned int uart_rts_a0_pins[] = { PIN(GPIOX_7, 0) };
  178. static const unsigned int uart_tx_a1_pins[] = { PIN(GPIOX_12, 0) };
  179. static const unsigned int uart_rx_a1_pins[] = { PIN(GPIOX_13, 0) };
  180. static const unsigned int uart_cts_a1_pins[] = { PIN(GPIOX_14, 0) };
  181. static const unsigned int uart_rts_a1_pins[] = { PIN(GPIOX_15, 0) };
  182. static const unsigned int uart_tx_b0_pins[] = { PIN(GPIOX_16, 0) };
  183. static const unsigned int uart_rx_b0_pins[] = { PIN(GPIOX_17, 0) };
  184. static const unsigned int uart_cts_b0_pins[] = { PIN(GPIOX_18, 0) };
  185. static const unsigned int uart_rts_b0_pins[] = { PIN(GPIOX_19, 0) };
  186. static const unsigned int iso7816_det_pins[] = { PIN(GPIOX_16, 0) };
  187. static const unsigned int iso7816_reset_pins[] = { PIN(GPIOX_17, 0) };
  188. static const unsigned int iso7816_clk_pins[] = { PIN(GPIOX_18, 0) };
  189. static const unsigned int iso7816_data_pins[] = { PIN(GPIOX_19, 0) };
  190. static const unsigned int i2c_sda_d0_pins[] = { PIN(GPIOX_16, 0) };
  191. static const unsigned int i2c_sck_d0_pins[] = { PIN(GPIOX_17, 0) };
  192. static const unsigned int xtal_32k_out_pins[] = { PIN(GPIOX_10, 0) };
  193. static const unsigned int xtal_24m_out_pins[] = { PIN(GPIOX_11, 0) };
  194. /* bank Y */
  195. static const unsigned int uart_tx_c_pins[] = { PIN(GPIOY_0, 0) };
  196. static const unsigned int uart_rx_c_pins[] = { PIN(GPIOY_1, 0) };
  197. static const unsigned int uart_cts_c_pins[] = { PIN(GPIOY_2, 0) };
  198. static const unsigned int uart_rts_c_pins[] = { PIN(GPIOY_3, 0) };
  199. static const unsigned int pcm_out_b_pins[] = { PIN(GPIOY_4, 0) };
  200. static const unsigned int pcm_in_b_pins[] = { PIN(GPIOY_5, 0) };
  201. static const unsigned int pcm_fs_b_pins[] = { PIN(GPIOY_6, 0) };
  202. static const unsigned int pcm_clk_b_pins[] = { PIN(GPIOY_7, 0) };
  203. static const unsigned int i2c_sda_c0_pins[] = { PIN(GPIOY_0, 0) };
  204. static const unsigned int i2c_sck_c0_pins[] = { PIN(GPIOY_1, 0) };
  205. /* bank DV */
  206. static const unsigned int dvin_rgb_pins[] = { PIN(GPIODV_0, 0), PIN(GPIODV_1, 0),
  207. PIN(GPIODV_2, 0), PIN(GPIODV_3, 0),
  208. PIN(GPIODV_4, 0), PIN(GPIODV_5, 0),
  209. PIN(GPIODV_6, 0), PIN(GPIODV_7, 0),
  210. PIN(GPIODV_8, 0), PIN(GPIODV_9, 0),
  211. PIN(GPIODV_10, 0), PIN(GPIODV_11, 0),
  212. PIN(GPIODV_12, 0), PIN(GPIODV_13, 0),
  213. PIN(GPIODV_14, 0), PIN(GPIODV_15, 0),
  214. PIN(GPIODV_16, 0), PIN(GPIODV_17, 0),
  215. PIN(GPIODV_18, 0), PIN(GPIODV_19, 0),
  216. PIN(GPIODV_20, 0), PIN(GPIODV_21, 0),
  217. PIN(GPIODV_22, 0), PIN(GPIODV_23, 0) };
  218. static const unsigned int dvin_vs_pins[] = { PIN(GPIODV_24, 0) };
  219. static const unsigned int dvin_hs_pins[] = { PIN(GPIODV_25, 0) };
  220. static const unsigned int dvin_clk_pins[] = { PIN(GPIODV_26, 0) };
  221. static const unsigned int dvin_de_pins[] = { PIN(GPIODV_27, 0) };
  222. static const unsigned int enc_0_pins[] = { PIN(GPIODV_0, 0) };
  223. static const unsigned int enc_1_pins[] = { PIN(GPIODV_1, 0) };
  224. static const unsigned int enc_2_pins[] = { PIN(GPIODV_2, 0) };
  225. static const unsigned int enc_3_pins[] = { PIN(GPIODV_3, 0) };
  226. static const unsigned int enc_4_pins[] = { PIN(GPIODV_4, 0) };
  227. static const unsigned int enc_5_pins[] = { PIN(GPIODV_5, 0) };
  228. static const unsigned int enc_6_pins[] = { PIN(GPIODV_6, 0) };
  229. static const unsigned int enc_7_pins[] = { PIN(GPIODV_7, 0) };
  230. static const unsigned int enc_8_pins[] = { PIN(GPIODV_8, 0) };
  231. static const unsigned int enc_9_pins[] = { PIN(GPIODV_9, 0) };
  232. static const unsigned int enc_10_pins[] = { PIN(GPIODV_10, 0) };
  233. static const unsigned int enc_11_pins[] = { PIN(GPIODV_11, 0) };
  234. static const unsigned int enc_12_pins[] = { PIN(GPIODV_12, 0) };
  235. static const unsigned int enc_13_pins[] = { PIN(GPIODV_13, 0) };
  236. static const unsigned int enc_14_pins[] = { PIN(GPIODV_14, 0) };
  237. static const unsigned int enc_15_pins[] = { PIN(GPIODV_15, 0) };
  238. static const unsigned int enc_16_pins[] = { PIN(GPIODV_16, 0) };
  239. static const unsigned int enc_17_pins[] = { PIN(GPIODV_17, 0) };
  240. static const unsigned int uart_tx_b1_pins[] = { PIN(GPIODV_24, 0) };
  241. static const unsigned int uart_rx_b1_pins[] = { PIN(GPIODV_25, 0) };
  242. static const unsigned int uart_cts_b1_pins[] = { PIN(GPIODV_26, 0) };
  243. static const unsigned int uart_rts_b1_pins[] = { PIN(GPIODV_27, 0) };
  244. static const unsigned int vga_vs_pins[] = { PIN(GPIODV_24, 0) };
  245. static const unsigned int vga_hs_pins[] = { PIN(GPIODV_25, 0) };
  246. /* bank H */
  247. static const unsigned int hdmi_hpd_pins[] = { PIN(GPIOH_0, 0) };
  248. static const unsigned int hdmi_sda_pins[] = { PIN(GPIOH_1, 0) };
  249. static const unsigned int hdmi_scl_pins[] = { PIN(GPIOH_2, 0) };
  250. static const unsigned int hdmi_cec_pins[] = { PIN(GPIOH_3, 0) };
  251. static const unsigned int spi_ss0_0_pins[] = { PIN(GPIOH_3, 0) };
  252. static const unsigned int spi_miso_0_pins[] = { PIN(GPIOH_4, 0) };
  253. static const unsigned int spi_mosi_0_pins[] = { PIN(GPIOH_5, 0) };
  254. static const unsigned int spi_sclk_0_pins[] = { PIN(GPIOH_6, 0) };
  255. static const unsigned int i2c_sda_d1_pins[] = { PIN(GPIOH_7, 0) };
  256. static const unsigned int i2c_sck_d1_pins[] = { PIN(GPIOH_8, 0) };
  257. /* bank Z */
  258. static const unsigned int spi_ss0_1_pins[] = { PIN(GPIOZ_9, 0) };
  259. static const unsigned int spi_ss1_1_pins[] = { PIN(GPIOZ_10, 0) };
  260. static const unsigned int spi_sclk_1_pins[] = { PIN(GPIOZ_11, 0) };
  261. static const unsigned int spi_mosi_1_pins[] = { PIN(GPIOZ_12, 0) };
  262. static const unsigned int spi_miso_1_pins[] = { PIN(GPIOZ_13, 0) };
  263. static const unsigned int spi_ss2_1_pins[] = { PIN(GPIOZ_14, 0) };
  264. static const unsigned int eth_tx_clk_50m_pins[] = { PIN(GPIOZ_4, 0) };
  265. static const unsigned int eth_tx_en_pins[] = { PIN(GPIOZ_5, 0) };
  266. static const unsigned int eth_txd1_pins[] = { PIN(GPIOZ_6, 0) };
  267. static const unsigned int eth_txd0_pins[] = { PIN(GPIOZ_7, 0) };
  268. static const unsigned int eth_rx_clk_in_pins[] = { PIN(GPIOZ_8, 0) };
  269. static const unsigned int eth_rx_dv_pins[] = { PIN(GPIOZ_9, 0) };
  270. static const unsigned int eth_rxd1_pins[] = { PIN(GPIOZ_10, 0) };
  271. static const unsigned int eth_rxd0_pins[] = { PIN(GPIOZ_11, 0) };
  272. static const unsigned int eth_mdio_pins[] = { PIN(GPIOZ_12, 0) };
  273. static const unsigned int eth_mdc_pins[] = { PIN(GPIOZ_13, 0) };
  274. static const unsigned int i2c_sda_a0_pins[] = { PIN(GPIOZ_0, 0) };
  275. static const unsigned int i2c_sck_a0_pins[] = { PIN(GPIOZ_1, 0) };
  276. static const unsigned int i2c_sda_b_pins[] = { PIN(GPIOZ_2, 0) };
  277. static const unsigned int i2c_sck_b_pins[] = { PIN(GPIOZ_3, 0) };
  278. static const unsigned int i2c_sda_c1_pins[] = { PIN(GPIOZ_4, 0) };
  279. static const unsigned int i2c_sck_c1_pins[] = { PIN(GPIOZ_5, 0) };
  280. static const unsigned int i2c_sda_a1_pins[] = { PIN(GPIOZ_0, 0) };
  281. static const unsigned int i2c_sck_a1_pins[] = { PIN(GPIOZ_1, 0) };
  282. static const unsigned int i2c_sda_a2_pins[] = { PIN(GPIOZ_0, 0) };
  283. static const unsigned int i2c_sck_a2_pins[] = { PIN(GPIOZ_1, 0) };
  284. /* bank BOOT */
  285. static const unsigned int sd_d0_c_pins[] = { PIN(BOOT_0, 0) };
  286. static const unsigned int sd_d1_c_pins[] = { PIN(BOOT_1, 0) };
  287. static const unsigned int sd_d2_c_pins[] = { PIN(BOOT_2, 0) };
  288. static const unsigned int sd_d3_c_pins[] = { PIN(BOOT_3, 0) };
  289. static const unsigned int sd_cmd_c_pins[] = { PIN(BOOT_16, 0) };
  290. static const unsigned int sd_clk_c_pins[] = { PIN(BOOT_17, 0) };
  291. static const unsigned int sdxc_d0_c_pins[] = { PIN(BOOT_0, 0)};
  292. static const unsigned int sdxc_d13_c_pins[] = { PIN(BOOT_1, 0), PIN(BOOT_2, 0),
  293. PIN(BOOT_3, 0) };
  294. static const unsigned int sdxc_d47_c_pins[] = { PIN(BOOT_4, 0), PIN(BOOT_5, 0),
  295. PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
  296. static const unsigned int sdxc_cmd_c_pins[] = { PIN(BOOT_16, 0) };
  297. static const unsigned int sdxc_clk_c_pins[] = { PIN(BOOT_17, 0) };
  298. static const unsigned int nand_io_pins[] = { PIN(BOOT_0, 0), PIN(BOOT_1, 0),
  299. PIN(BOOT_2, 0), PIN(BOOT_3, 0),
  300. PIN(BOOT_4, 0), PIN(BOOT_5, 0),
  301. PIN(BOOT_6, 0), PIN(BOOT_7, 0) };
  302. static const unsigned int nand_io_ce0_pins[] = { PIN(BOOT_8, 0) };
  303. static const unsigned int nand_io_ce1_pins[] = { PIN(BOOT_9, 0) };
  304. static const unsigned int nand_io_rb0_pins[] = { PIN(BOOT_10, 0) };
  305. static const unsigned int nand_ale_pins[] = { PIN(BOOT_11, 0) };
  306. static const unsigned int nand_cle_pins[] = { PIN(BOOT_12, 0) };
  307. static const unsigned int nand_wen_clk_pins[] = { PIN(BOOT_13, 0) };
  308. static const unsigned int nand_ren_clk_pins[] = { PIN(BOOT_14, 0) };
  309. static const unsigned int nand_dqs_pins[] = { PIN(BOOT_15, 0) };
  310. static const unsigned int nand_ce2_pins[] = { PIN(BOOT_16, 0) };
  311. static const unsigned int nand_ce3_pins[] = { PIN(BOOT_17, 0) };
  312. static const unsigned int nor_d_pins[] = { PIN(BOOT_11, 0) };
  313. static const unsigned int nor_q_pins[] = { PIN(BOOT_12, 0) };
  314. static const unsigned int nor_c_pins[] = { PIN(BOOT_13, 0) };
  315. static const unsigned int nor_cs_pins[] = { PIN(BOOT_18, 0) };
  316. /* bank CARD */
  317. static const unsigned int sd_d1_b_pins[] = { PIN(CARD_0, 0) };
  318. static const unsigned int sd_d0_b_pins[] = { PIN(CARD_1, 0) };
  319. static const unsigned int sd_clk_b_pins[] = { PIN(CARD_2, 0) };
  320. static const unsigned int sd_cmd_b_pins[] = { PIN(CARD_3, 0) };
  321. static const unsigned int sd_d3_b_pins[] = { PIN(CARD_4, 0) };
  322. static const unsigned int sd_d2_b_pins[] = { PIN(CARD_5, 0) };
  323. static const unsigned int sdxc_d13_b_pins[] = { PIN(CARD_0, 0), PIN(CARD_4, 0),
  324. PIN(CARD_5, 0) };
  325. static const unsigned int sdxc_d0_b_pins[] = { PIN(CARD_1, 0) };
  326. static const unsigned int sdxc_clk_b_pins[] = { PIN(CARD_2, 0) };
  327. static const unsigned int sdxc_cmd_b_pins[] = { PIN(CARD_3, 0) };
  328. /* bank AO */
  329. static const unsigned int uart_tx_ao_a_pins[] = { PIN(GPIOAO_0, AO_OFF) };
  330. static const unsigned int uart_rx_ao_a_pins[] = { PIN(GPIOAO_1, AO_OFF) };
  331. static const unsigned int uart_cts_ao_a_pins[] = { PIN(GPIOAO_2, AO_OFF) };
  332. static const unsigned int uart_rts_ao_a_pins[] = { PIN(GPIOAO_3, AO_OFF) };
  333. static const unsigned int remote_input_pins[] = { PIN(GPIOAO_7, AO_OFF) };
  334. static const unsigned int i2c_slave_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
  335. static const unsigned int i2c_slave_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
  336. static const unsigned int uart_tx_ao_b0_pins[] = { PIN(GPIOAO_0, AO_OFF) };
  337. static const unsigned int uart_rx_ao_b0_pins[] = { PIN(GPIOAO_1, AO_OFF) };
  338. static const unsigned int uart_tx_ao_b1_pins[] = { PIN(GPIOAO_4, AO_OFF) };
  339. static const unsigned int uart_rx_ao_b1_pins[] = { PIN(GPIOAO_5, AO_OFF) };
  340. static const unsigned int i2c_mst_sck_ao_pins[] = { PIN(GPIOAO_4, AO_OFF) };
  341. static const unsigned int i2c_mst_sda_ao_pins[] = { PIN(GPIOAO_5, AO_OFF) };
  342. static struct meson_pmx_group meson8_cbus_groups[] = {
  343. GPIO_GROUP(GPIOX_0, 0),
  344. GPIO_GROUP(GPIOX_1, 0),
  345. GPIO_GROUP(GPIOX_2, 0),
  346. GPIO_GROUP(GPIOX_3, 0),
  347. GPIO_GROUP(GPIOX_4, 0),
  348. GPIO_GROUP(GPIOX_5, 0),
  349. GPIO_GROUP(GPIOX_6, 0),
  350. GPIO_GROUP(GPIOX_7, 0),
  351. GPIO_GROUP(GPIOX_8, 0),
  352. GPIO_GROUP(GPIOX_9, 0),
  353. GPIO_GROUP(GPIOX_10, 0),
  354. GPIO_GROUP(GPIOX_11, 0),
  355. GPIO_GROUP(GPIOX_12, 0),
  356. GPIO_GROUP(GPIOX_13, 0),
  357. GPIO_GROUP(GPIOX_14, 0),
  358. GPIO_GROUP(GPIOX_15, 0),
  359. GPIO_GROUP(GPIOX_16, 0),
  360. GPIO_GROUP(GPIOX_17, 0),
  361. GPIO_GROUP(GPIOX_18, 0),
  362. GPIO_GROUP(GPIOX_19, 0),
  363. GPIO_GROUP(GPIOX_20, 0),
  364. GPIO_GROUP(GPIOX_21, 0),
  365. GPIO_GROUP(GPIOY_0, 0),
  366. GPIO_GROUP(GPIOY_1, 0),
  367. GPIO_GROUP(GPIOY_2, 0),
  368. GPIO_GROUP(GPIOY_3, 0),
  369. GPIO_GROUP(GPIOY_4, 0),
  370. GPIO_GROUP(GPIOY_5, 0),
  371. GPIO_GROUP(GPIOY_6, 0),
  372. GPIO_GROUP(GPIOY_7, 0),
  373. GPIO_GROUP(GPIOY_8, 0),
  374. GPIO_GROUP(GPIOY_9, 0),
  375. GPIO_GROUP(GPIOY_10, 0),
  376. GPIO_GROUP(GPIOY_11, 0),
  377. GPIO_GROUP(GPIOY_12, 0),
  378. GPIO_GROUP(GPIOY_13, 0),
  379. GPIO_GROUP(GPIOY_14, 0),
  380. GPIO_GROUP(GPIOY_15, 0),
  381. GPIO_GROUP(GPIOY_16, 0),
  382. GPIO_GROUP(GPIODV_0, 0),
  383. GPIO_GROUP(GPIODV_1, 0),
  384. GPIO_GROUP(GPIODV_2, 0),
  385. GPIO_GROUP(GPIODV_3, 0),
  386. GPIO_GROUP(GPIODV_4, 0),
  387. GPIO_GROUP(GPIODV_5, 0),
  388. GPIO_GROUP(GPIODV_6, 0),
  389. GPIO_GROUP(GPIODV_7, 0),
  390. GPIO_GROUP(GPIODV_8, 0),
  391. GPIO_GROUP(GPIODV_9, 0),
  392. GPIO_GROUP(GPIODV_10, 0),
  393. GPIO_GROUP(GPIODV_11, 0),
  394. GPIO_GROUP(GPIODV_12, 0),
  395. GPIO_GROUP(GPIODV_13, 0),
  396. GPIO_GROUP(GPIODV_14, 0),
  397. GPIO_GROUP(GPIODV_15, 0),
  398. GPIO_GROUP(GPIODV_16, 0),
  399. GPIO_GROUP(GPIODV_17, 0),
  400. GPIO_GROUP(GPIODV_18, 0),
  401. GPIO_GROUP(GPIODV_19, 0),
  402. GPIO_GROUP(GPIODV_20, 0),
  403. GPIO_GROUP(GPIODV_21, 0),
  404. GPIO_GROUP(GPIODV_22, 0),
  405. GPIO_GROUP(GPIODV_23, 0),
  406. GPIO_GROUP(GPIODV_24, 0),
  407. GPIO_GROUP(GPIODV_25, 0),
  408. GPIO_GROUP(GPIODV_26, 0),
  409. GPIO_GROUP(GPIODV_27, 0),
  410. GPIO_GROUP(GPIODV_28, 0),
  411. GPIO_GROUP(GPIODV_29, 0),
  412. GPIO_GROUP(GPIOH_0, 0),
  413. GPIO_GROUP(GPIOH_1, 0),
  414. GPIO_GROUP(GPIOH_2, 0),
  415. GPIO_GROUP(GPIOH_3, 0),
  416. GPIO_GROUP(GPIOH_4, 0),
  417. GPIO_GROUP(GPIOH_5, 0),
  418. GPIO_GROUP(GPIOH_6, 0),
  419. GPIO_GROUP(GPIOH_7, 0),
  420. GPIO_GROUP(GPIOH_8, 0),
  421. GPIO_GROUP(GPIOH_9, 0),
  422. GPIO_GROUP(GPIOZ_0, 0),
  423. GPIO_GROUP(GPIOZ_1, 0),
  424. GPIO_GROUP(GPIOZ_2, 0),
  425. GPIO_GROUP(GPIOZ_3, 0),
  426. GPIO_GROUP(GPIOZ_4, 0),
  427. GPIO_GROUP(GPIOZ_5, 0),
  428. GPIO_GROUP(GPIOZ_6, 0),
  429. GPIO_GROUP(GPIOZ_7, 0),
  430. GPIO_GROUP(GPIOZ_8, 0),
  431. GPIO_GROUP(GPIOZ_9, 0),
  432. GPIO_GROUP(GPIOZ_10, 0),
  433. GPIO_GROUP(GPIOZ_11, 0),
  434. GPIO_GROUP(GPIOZ_12, 0),
  435. GPIO_GROUP(GPIOZ_13, 0),
  436. GPIO_GROUP(GPIOZ_14, 0),
  437. /* bank X */
  438. GROUP(sd_d0_a, 8, 5),
  439. GROUP(sd_d1_a, 8, 4),
  440. GROUP(sd_d2_a, 8, 3),
  441. GROUP(sd_d3_a, 8, 2),
  442. GROUP(sd_clk_a, 8, 1),
  443. GROUP(sd_cmd_a, 8, 0),
  444. GROUP(sdxc_d0_a, 5, 14),
  445. GROUP(sdxc_d13_a, 5, 13),
  446. GROUP(sdxc_d47_a, 5, 12),
  447. GROUP(sdxc_clk_a, 5, 11),
  448. GROUP(sdxc_cmd_a, 5, 10),
  449. GROUP(pcm_out_a, 3, 30),
  450. GROUP(pcm_in_a, 3, 29),
  451. GROUP(pcm_fs_a, 3, 28),
  452. GROUP(pcm_clk_a, 3, 27),
  453. GROUP(uart_tx_a0, 4, 17),
  454. GROUP(uart_rx_a0, 4, 16),
  455. GROUP(uart_cts_a0, 4, 15),
  456. GROUP(uart_rts_a0, 4, 14),
  457. GROUP(uart_tx_a1, 4, 13),
  458. GROUP(uart_rx_a1, 4, 12),
  459. GROUP(uart_cts_a1, 4, 11),
  460. GROUP(uart_rts_a1, 4, 10),
  461. GROUP(uart_tx_b0, 4, 9),
  462. GROUP(uart_rx_b0, 4, 8),
  463. GROUP(uart_cts_b0, 4, 7),
  464. GROUP(uart_rts_b0, 4, 6),
  465. GROUP(iso7816_det, 4, 21),
  466. GROUP(iso7816_reset, 4, 20),
  467. GROUP(iso7816_clk, 4, 19),
  468. GROUP(iso7816_data, 4, 18),
  469. GROUP(i2c_sda_d0, 4, 5),
  470. GROUP(i2c_sck_d0, 4, 4),
  471. GROUP(xtal_32k_out, 3, 22),
  472. GROUP(xtal_24m_out, 3, 23),
  473. /* bank Y */
  474. GROUP(uart_tx_c, 1, 19),
  475. GROUP(uart_rx_c, 1, 18),
  476. GROUP(uart_cts_c, 1, 17),
  477. GROUP(uart_rts_c, 1, 16),
  478. GROUP(pcm_out_b, 4, 25),
  479. GROUP(pcm_in_b, 4, 24),
  480. GROUP(pcm_fs_b, 4, 23),
  481. GROUP(pcm_clk_b, 4, 22),
  482. GROUP(i2c_sda_c0, 1, 15),
  483. GROUP(i2c_sck_c0, 1, 14),
  484. /* bank DV */
  485. GROUP(dvin_rgb, 0, 6),
  486. GROUP(dvin_vs, 0, 9),
  487. GROUP(dvin_hs, 0, 8),
  488. GROUP(dvin_clk, 0, 7),
  489. GROUP(dvin_de, 0, 10),
  490. GROUP(enc_0, 7, 0),
  491. GROUP(enc_1, 7, 1),
  492. GROUP(enc_2, 7, 2),
  493. GROUP(enc_3, 7, 3),
  494. GROUP(enc_4, 7, 4),
  495. GROUP(enc_5, 7, 5),
  496. GROUP(enc_6, 7, 6),
  497. GROUP(enc_7, 7, 7),
  498. GROUP(enc_8, 7, 8),
  499. GROUP(enc_9, 7, 9),
  500. GROUP(enc_10, 7, 10),
  501. GROUP(enc_11, 7, 11),
  502. GROUP(enc_12, 7, 12),
  503. GROUP(enc_13, 7, 13),
  504. GROUP(enc_14, 7, 14),
  505. GROUP(enc_15, 7, 15),
  506. GROUP(enc_16, 7, 16),
  507. GROUP(enc_17, 7, 17),
  508. GROUP(uart_tx_b1, 6, 23),
  509. GROUP(uart_rx_b1, 6, 22),
  510. GROUP(uart_cts_b1, 6, 21),
  511. GROUP(uart_rts_b1, 6, 20),
  512. GROUP(vga_vs, 0, 21),
  513. GROUP(vga_hs, 0, 20),
  514. /* bank H */
  515. GROUP(hdmi_hpd, 1, 26),
  516. GROUP(hdmi_sda, 1, 25),
  517. GROUP(hdmi_scl, 1, 24),
  518. GROUP(hdmi_cec, 1, 23),
  519. GROUP(spi_ss0_0, 9, 13),
  520. GROUP(spi_miso_0, 9, 12),
  521. GROUP(spi_mosi_0, 9, 11),
  522. GROUP(spi_sclk_0, 9, 10),
  523. GROUP(i2c_sda_d1, 4, 3),
  524. GROUP(i2c_sck_d1, 4, 2),
  525. /* bank Z */
  526. GROUP(spi_ss0_1, 8, 16),
  527. GROUP(spi_ss1_1, 8, 12),
  528. GROUP(spi_sclk_1, 8, 15),
  529. GROUP(spi_mosi_1, 8, 14),
  530. GROUP(spi_miso_1, 8, 13),
  531. GROUP(spi_ss2_1, 8, 17),
  532. GROUP(eth_tx_clk_50m, 6, 15),
  533. GROUP(eth_tx_en, 6, 14),
  534. GROUP(eth_txd1, 6, 13),
  535. GROUP(eth_txd0, 6, 12),
  536. GROUP(eth_rx_clk_in, 6, 10),
  537. GROUP(eth_rx_dv, 6, 11),
  538. GROUP(eth_rxd1, 6, 8),
  539. GROUP(eth_rxd0, 6, 7),
  540. GROUP(eth_mdio, 6, 6),
  541. GROUP(eth_mdc, 6, 5),
  542. GROUP(i2c_sda_a0, 5, 31),
  543. GROUP(i2c_sck_a0, 5, 30),
  544. GROUP(i2c_sda_b, 5, 27),
  545. GROUP(i2c_sck_b, 5, 26),
  546. GROUP(i2c_sda_c1, 5, 25),
  547. GROUP(i2c_sck_c1, 5, 24),
  548. GROUP(i2c_sda_a1, 5, 9),
  549. GROUP(i2c_sck_a1, 5, 8),
  550. GROUP(i2c_sda_a2, 5, 7),
  551. GROUP(i2c_sck_a2, 5, 6),
  552. /* bank BOOT */
  553. GROUP(sd_d0_c, 6, 29),
  554. GROUP(sd_d1_c, 6, 28),
  555. GROUP(sd_d2_c, 6, 27),
  556. GROUP(sd_d3_c, 6, 26),
  557. GROUP(sd_cmd_c, 6, 25),
  558. GROUP(sd_clk_c, 6, 24),
  559. GROUP(sdxc_d0_c, 4, 30),
  560. GROUP(sdxc_d13_c, 4, 29),
  561. GROUP(sdxc_d47_c, 4, 28),
  562. GROUP(sdxc_cmd_c, 4, 27),
  563. GROUP(sdxc_clk_c, 4, 26),
  564. GROUP(nand_io, 2, 26),
  565. GROUP(nand_io_ce0, 2, 25),
  566. GROUP(nand_io_ce1, 2, 24),
  567. GROUP(nand_io_rb0, 2, 17),
  568. GROUP(nand_ale, 2, 21),
  569. GROUP(nand_cle, 2, 20),
  570. GROUP(nand_wen_clk, 2, 19),
  571. GROUP(nand_ren_clk, 2, 18),
  572. GROUP(nand_dqs, 2, 27),
  573. GROUP(nand_ce2, 2, 23),
  574. GROUP(nand_ce3, 2, 22),
  575. GROUP(nor_d, 5, 1),
  576. GROUP(nor_q, 5, 3),
  577. GROUP(nor_c, 5, 2),
  578. GROUP(nor_cs, 5, 0),
  579. /* bank CARD */
  580. GROUP(sd_d1_b, 2, 14),
  581. GROUP(sd_d0_b, 2, 15),
  582. GROUP(sd_clk_b, 2, 11),
  583. GROUP(sd_cmd_b, 2, 10),
  584. GROUP(sd_d3_b, 2, 12),
  585. GROUP(sd_d2_b, 2, 13),
  586. GROUP(sdxc_d13_b, 2, 6),
  587. GROUP(sdxc_d0_b, 2, 7),
  588. GROUP(sdxc_clk_b, 2, 5),
  589. GROUP(sdxc_cmd_b, 2, 4),
  590. };
  591. static struct meson_pmx_group meson8_aobus_groups[] = {
  592. GPIO_GROUP(GPIOAO_0, AO_OFF),
  593. GPIO_GROUP(GPIOAO_1, AO_OFF),
  594. GPIO_GROUP(GPIOAO_2, AO_OFF),
  595. GPIO_GROUP(GPIOAO_3, AO_OFF),
  596. GPIO_GROUP(GPIOAO_4, AO_OFF),
  597. GPIO_GROUP(GPIOAO_5, AO_OFF),
  598. GPIO_GROUP(GPIOAO_6, AO_OFF),
  599. GPIO_GROUP(GPIOAO_7, AO_OFF),
  600. GPIO_GROUP(GPIOAO_8, AO_OFF),
  601. GPIO_GROUP(GPIOAO_9, AO_OFF),
  602. GPIO_GROUP(GPIOAO_10, AO_OFF),
  603. GPIO_GROUP(GPIOAO_11, AO_OFF),
  604. GPIO_GROUP(GPIOAO_12, AO_OFF),
  605. GPIO_GROUP(GPIOAO_13, AO_OFF),
  606. GPIO_GROUP(GPIO_BSD_EN, AO_OFF),
  607. GPIO_GROUP(GPIO_TEST_N, AO_OFF),
  608. /* bank AO */
  609. GROUP(uart_tx_ao_a, 0, 12),
  610. GROUP(uart_rx_ao_a, 0, 11),
  611. GROUP(uart_cts_ao_a, 0, 10),
  612. GROUP(uart_rts_ao_a, 0, 9),
  613. GROUP(remote_input, 0, 0),
  614. GROUP(i2c_slave_sck_ao, 0, 2),
  615. GROUP(i2c_slave_sda_ao, 0, 1),
  616. GROUP(uart_tx_ao_b0, 0, 26),
  617. GROUP(uart_rx_ao_b0, 0, 25),
  618. GROUP(uart_tx_ao_b1, 0, 24),
  619. GROUP(uart_rx_ao_b1, 0, 23),
  620. GROUP(i2c_mst_sck_ao, 0, 6),
  621. GROUP(i2c_mst_sda_ao, 0, 5),
  622. };
  623. static const char * const gpio_groups[] = {
  624. "GPIOX_0", "GPIOX_1", "GPIOX_2", "GPIOX_3", "GPIOX_4",
  625. "GPIOX_5", "GPIOX_6", "GPIOX_7", "GPIOX_8", "GPIOX_9",
  626. "GPIOX_10", "GPIOX_11", "GPIOX_12", "GPIOX_13", "GPIOX_14",
  627. "GPIOX_15", "GPIOX_16", "GPIOX_17", "GPIOX_18", "GPIOX_19",
  628. "GPIOX_20", "GPIOX_21",
  629. "GPIOY_0", "GPIOY_1", "GPIOY_2", "GPIOY_3", "GPIOY_4",
  630. "GPIOY_5", "GPIOY_6", "GPIOY_7", "GPIOY_8", "GPIOY_9",
  631. "GPIOY_10", "GPIOY_11", "GPIOY_12", "GPIOY_13", "GPIOY_14",
  632. "GPIOY_15", "GPIOY_16",
  633. "GPIODV_0", "GPIODV_1", "GPIODV_2", "GPIODV_3", "GPIODV_4",
  634. "GPIODV_5", "GPIODV_6", "GPIODV_7", "GPIODV_8", "GPIODV_9",
  635. "GPIODV_10", "GPIODV_11", "GPIODV_12", "GPIODV_13", "GPIODV_14",
  636. "GPIODV_15", "GPIODV_16", "GPIODV_17", "GPIODV_18", "GPIODV_19",
  637. "GPIODV_20", "GPIODV_21", "GPIODV_22", "GPIODV_23", "GPIODV_24",
  638. "GPIODV_25", "GPIODV_26", "GPIODV_27", "GPIODV_28", "GPIODV_29",
  639. "GPIOH_0", "GPIOH_1", "GPIOH_2", "GPIOH_3", "GPIOH_4",
  640. "GPIOH_5", "GPIOH_6", "GPIOH_7", "GPIOH_8", "GPIOH_9",
  641. "GPIOZ_0", "GPIOZ_1", "GPIOZ_2", "GPIOZ_3", "GPIOZ_4",
  642. "GPIOZ_5", "GPIOZ_6", "GPIOZ_7", "GPIOZ_8", "GPIOZ_9",
  643. "GPIOZ_10", "GPIOZ_11", "GPIOZ_12", "GPIOZ_13", "GPIOZ_14",
  644. "CARD_0", "CARD_1", "CARD_2", "CARD_3", "CARD_4",
  645. "CARD_5", "CARD_6",
  646. "BOOT_0", "BOOT_1", "BOOT_2", "BOOT_3", "BOOT_4",
  647. "BOOT_5", "BOOT_6", "BOOT_7", "BOOT_8", "BOOT_9",
  648. "BOOT_10", "BOOT_11", "BOOT_12", "BOOT_13", "BOOT_14",
  649. "BOOT_15", "BOOT_16", "BOOT_17", "BOOT_18",
  650. "GPIOAO_0", "GPIOAO_1", "GPIOAO_2", "GPIOAO_3",
  651. "GPIOAO_4", "GPIOAO_5", "GPIOAO_6", "GPIOAO_7",
  652. "GPIOAO_8", "GPIOAO_9", "GPIOAO_10", "GPIOAO_11",
  653. "GPIOAO_12", "GPIOAO_13", "GPIO_BSD_EN", "GPIO_TEST_N"
  654. };
  655. static const char * const sd_a_groups[] = {
  656. "sd_d0_a", "sd_d1_a", "sd_d2_a", "sd_d3_a", "sd_clk_a", "sd_cmd_a"
  657. };
  658. static const char * const sdxc_a_groups[] = {
  659. "sdxc_d0_a", "sdxc_d13_a", "sdxc_d47_a", "sdxc_clk_a", "sdxc_cmd_a"
  660. };
  661. static const char * const pcm_a_groups[] = {
  662. "pcm_out_a", "pcm_in_a", "pcm_fs_a", "pcm_clk_a"
  663. };
  664. static const char * const uart_a_groups[] = {
  665. "uart_tx_a0", "uart_rx_a0", "uart_cts_a0", "uart_rts_a0",
  666. "uart_tx_a1", "uart_rx_a1", "uart_cts_a1", "uart_rts_a1"
  667. };
  668. static const char * const uart_b_groups[] = {
  669. "uart_tx_b0", "uart_rx_b0", "uart_cts_b0", "uart_rts_b0",
  670. "uart_tx_b1", "uart_rx_b1", "uart_cts_b1", "uart_rts_b1"
  671. };
  672. static const char * const iso7816_groups[] = {
  673. "iso7816_det", "iso7816_reset", "iso7816_clk", "iso7816_data"
  674. };
  675. static const char * const i2c_d_groups[] = {
  676. "i2c_sda_d0", "i2c_sck_d0", "i2c_sda_d1", "i2c_sck_d1"
  677. };
  678. static const char * const xtal_groups[] = {
  679. "xtal_32k_out", "xtal_24m_out"
  680. };
  681. static const char * const uart_c_groups[] = {
  682. "uart_tx_c", "uart_rx_c", "uart_cts_c", "uart_rts_c"
  683. };
  684. static const char * const pcm_b_groups[] = {
  685. "pcm_out_b", "pcm_in_b", "pcm_fs_b", "pcm_clk_b"
  686. };
  687. static const char * const i2c_c_groups[] = {
  688. "i2c_sda_c0", "i2c_sck_c0", "i2c_sda_c1", "i2c_sck_c1"
  689. };
  690. static const char * const dvin_groups[] = {
  691. "dvin_rgb", "dvin_vs", "dvin_hs", "dvin_clk", "dvin_de"
  692. };
  693. static const char * const enc_groups[] = {
  694. "enc_0", "enc_1", "enc_2", "enc_3", "enc_4", "enc_5",
  695. "enc_6", "enc_7", "enc_8", "enc_9", "enc_10", "enc_11",
  696. "enc_12", "enc_13", "enc_14", "enc_15", "enc_16", "enc_17"
  697. };
  698. static const char * const vga_groups[] = {
  699. "vga_vs", "vga_hs"
  700. };
  701. static const char * const hdmi_groups[] = {
  702. "hdmi_hpd", "hdmi_sda", "hdmi_scl", "hdmi_cec"
  703. };
  704. static const char * const spi_groups[] = {
  705. "spi_ss0_0", "spi_miso_0", "spi_mosi_0", "spi_sclk_0",
  706. "spi_ss0_1", "spi_ss1_1", "spi_sclk_1", "spi_mosi_1",
  707. "spi_miso_1", "spi_ss2_1"
  708. };
  709. static const char * const ethernet_groups[] = {
  710. "eth_tx_clk_50m", "eth_tx_en", "eth_txd1",
  711. "eth_txd0", "eth_rx_clk_in", "eth_rx_dv",
  712. "eth_rxd1", "eth_rxd0", "eth_mdio", "eth_mdc"
  713. };
  714. static const char * const i2c_a_groups[] = {
  715. "i2c_sda_a0", "i2c_sck_a0", "i2c_sda_a1", "i2c_sck_a1",
  716. "i2c_sda_a2", "i2c_sck_a2"
  717. };
  718. static const char * const i2c_b_groups[] = {
  719. "i2c_sda_b", "i2c_sck_b"
  720. };
  721. static const char * const sd_c_groups[] = {
  722. "sd_d0_c", "sd_d1_c", "sd_d2_c", "sd_d3_c",
  723. "sd_cmd_c", "sd_clk_c"
  724. };
  725. static const char * const sdxc_c_groups[] = {
  726. "sdxc_d0_c", "sdxc_d13_c", "sdxc_d47_c", "sdxc_cmd_c",
  727. "sdxc_clk_c"
  728. };
  729. static const char * const nand_groups[] = {
  730. "nand_io", "nand_io_ce0", "nand_io_ce1",
  731. "nand_io_rb0", "nand_ale", "nand_cle",
  732. "nand_wen_clk", "nand_ren_clk", "nand_dqs",
  733. "nand_ce2", "nand_ce3"
  734. };
  735. static const char * const nor_groups[] = {
  736. "nor_d", "nor_q", "nor_c", "nor_cs"
  737. };
  738. static const char * const sd_b_groups[] = {
  739. "sd_d1_b", "sd_d0_b", "sd_clk_b", "sd_cmd_b",
  740. "sd_d3_b", "sd_d2_b"
  741. };
  742. static const char * const sdxc_b_groups[] = {
  743. "sdxc_d13_b", "sdxc_d0_b", "sdxc_clk_b", "sdxc_cmd_b"
  744. };
  745. static const char * const uart_ao_groups[] = {
  746. "uart_tx_ao_a", "uart_rx_ao_a", "uart_cts_ao_a", "uart_rts_ao_a"
  747. };
  748. static const char * const remote_groups[] = {
  749. "remote_input"
  750. };
  751. static const char * const i2c_slave_ao_groups[] = {
  752. "i2c_slave_sck_ao", "i2c_slave_sda_ao"
  753. };
  754. static const char * const uart_ao_b_groups[] = {
  755. "uart_tx_ao_b0", "uart_rx_ao_b0", "uart_tx_ao_b1", "uart_rx_ao_b1"
  756. };
  757. static const char * const i2c_mst_ao_groups[] = {
  758. "i2c_mst_sck_ao", "i2c_mst_sda_ao"
  759. };
  760. static struct meson_pmx_func meson8_cbus_functions[] = {
  761. FUNCTION(gpio),
  762. FUNCTION(sd_a),
  763. FUNCTION(sdxc_a),
  764. FUNCTION(pcm_a),
  765. FUNCTION(uart_a),
  766. FUNCTION(uart_b),
  767. FUNCTION(iso7816),
  768. FUNCTION(i2c_d),
  769. FUNCTION(xtal),
  770. FUNCTION(uart_c),
  771. FUNCTION(pcm_b),
  772. FUNCTION(i2c_c),
  773. FUNCTION(dvin),
  774. FUNCTION(enc),
  775. FUNCTION(vga),
  776. FUNCTION(hdmi),
  777. FUNCTION(spi),
  778. FUNCTION(ethernet),
  779. FUNCTION(i2c_a),
  780. FUNCTION(i2c_b),
  781. FUNCTION(sd_c),
  782. FUNCTION(sdxc_c),
  783. FUNCTION(nand),
  784. FUNCTION(nor),
  785. FUNCTION(sd_b),
  786. FUNCTION(sdxc_b),
  787. };
  788. static struct meson_pmx_func meson8_aobus_functions[] = {
  789. FUNCTION(uart_ao),
  790. FUNCTION(remote),
  791. FUNCTION(i2c_slave_ao),
  792. FUNCTION(uart_ao_b),
  793. FUNCTION(i2c_mst_ao),
  794. };
  795. static struct meson_bank meson8_cbus_banks[] = {
  796. /* name first last pullen pull dir out in */
  797. BANK("X", PIN(GPIOX_0, 0), PIN(GPIOX_21, 0), 4, 0, 4, 0, 0, 0, 1, 0, 2, 0),
  798. BANK("Y", PIN(GPIOY_0, 0), PIN(GPIOY_16, 0), 3, 0, 3, 0, 3, 0, 4, 0, 5, 0),
  799. BANK("DV", PIN(GPIODV_0, 0), PIN(GPIODV_29, 0), 0, 0, 0, 0, 7, 0, 8, 0, 9, 0),
  800. BANK("H", PIN(GPIOH_0, 0), PIN(GPIOH_9, 0), 1, 16, 1, 16, 9, 19, 10, 19, 11, 19),
  801. BANK("Z", PIN(GPIOZ_0, 0), PIN(GPIOZ_14, 0), 1, 0, 1, 0, 3, 17, 4, 17, 5, 17),
  802. BANK("CARD", PIN(CARD_0, 0), PIN(CARD_6, 0), 2, 20, 2, 20, 0, 22, 1, 22, 2, 22),
  803. BANK("BOOT", PIN(BOOT_0, 0), PIN(BOOT_18, 0), 2, 0, 2, 0, 9, 0, 10, 0, 11, 0),
  804. };
  805. static struct meson_bank meson8_aobus_banks[] = {
  806. /* name first last pullen pull dir out in */
  807. BANK("AO", PIN(GPIOAO_0, AO_OFF), PIN(GPIO_TEST_N, AO_OFF), 0, 0, 0, 16, 0, 0, 0, 16, 1, 0),
  808. };
  809. struct meson_pinctrl_data meson8_cbus_pinctrl_data = {
  810. .name = "cbus-banks",
  811. .pin_base = 0,
  812. .pins = meson8_cbus_pins,
  813. .groups = meson8_cbus_groups,
  814. .funcs = meson8_cbus_functions,
  815. .banks = meson8_cbus_banks,
  816. .num_pins = ARRAY_SIZE(meson8_cbus_pins),
  817. .num_groups = ARRAY_SIZE(meson8_cbus_groups),
  818. .num_funcs = ARRAY_SIZE(meson8_cbus_functions),
  819. .num_banks = ARRAY_SIZE(meson8_cbus_banks),
  820. };
  821. struct meson_pinctrl_data meson8_aobus_pinctrl_data = {
  822. .name = "ao-bank",
  823. .pin_base = 120,
  824. .pins = meson8_aobus_pins,
  825. .groups = meson8_aobus_groups,
  826. .funcs = meson8_aobus_functions,
  827. .banks = meson8_aobus_banks,
  828. .num_pins = ARRAY_SIZE(meson8_aobus_pins),
  829. .num_groups = ARRAY_SIZE(meson8_aobus_groups),
  830. .num_funcs = ARRAY_SIZE(meson8_aobus_functions),
  831. .num_banks = ARRAY_SIZE(meson8_aobus_banks),
  832. };